From e2113c036775408348cf1bd60a5659648220973f Mon Sep 17 00:00:00 2001 From: Jose Abreu Date: Fri, 19 May 2017 01:52:17 +0100 Subject: [PATCH 1/3] drm/arm: malidp: Use crtc->mode_valid() callback MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that we have a callback to check if crtc supports a given mode we can use it in malidp so that we restrict the number of probbed modes to the ones we can actually display. Also, remove the mode_fixup() callback as this is no longer needed because mode_valid() will be called before. Signed-off-by: Jose Abreu Cc: Carlos Palminha Cc: Alexey Brodkin Cc: Ville Syrjälä Cc: Daniel Vetter Cc: Dave Airlie Cc: Andrzej Hajda Cc: Archit Taneja Cc: Laurent Pinchart Signed-off-by: Liviu Dudau --- drivers/gpu/drm/arm/malidp_crtc.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c index 9446a673d469..4bb38a21efec 100644 --- a/drivers/gpu/drm/arm/malidp_crtc.c +++ b/drivers/gpu/drm/arm/malidp_crtc.c @@ -22,9 +22,8 @@ #include "malidp_drv.h" #include "malidp_hw.h" -static bool malidp_crtc_mode_fixup(struct drm_crtc *crtc, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) +static enum drm_mode_status malidp_crtc_mode_valid(struct drm_crtc *crtc, + const struct drm_display_mode *mode) { struct malidp_drm *malidp = crtc_to_malidp_device(crtc); struct malidp_hw_device *hwdev = malidp->dev; @@ -40,11 +39,11 @@ static bool malidp_crtc_mode_fixup(struct drm_crtc *crtc, if (rate != req_rate) { DRM_DEBUG_DRIVER("pxlclk doesn't support %ld Hz\n", req_rate); - return false; + return MODE_NOCLOCK; } } - return true; + return MODE_OK; } static void malidp_crtc_enable(struct drm_crtc *crtc) @@ -408,7 +407,7 @@ static int malidp_crtc_atomic_check(struct drm_crtc *crtc, } static const struct drm_crtc_helper_funcs malidp_crtc_helper_funcs = { - .mode_fixup = malidp_crtc_mode_fixup, + .mode_valid = malidp_crtc_mode_valid, .enable = malidp_crtc_enable, .disable = malidp_crtc_disable, .atomic_check = malidp_crtc_atomic_check, From 0df34a807310325cfb910276d631c949aa008d91 Mon Sep 17 00:00:00 2001 From: Liviu Dudau Date: Tue, 23 May 2017 14:18:18 +0100 Subject: [PATCH 2/3] drm/mali-dp: Check PM status when sharing interrupt lines If an instance of Mali DP hardware shares the interrupt line with another hardware (usually another instance of the Mali DP) its interrupt handler can get called when the device is suspended. Check the PM status before making access to the hardware registers to avoid deadlocks. Signed-off-by: Liviu Dudau --- drivers/gpu/drm/arm/malidp_hw.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c index 28360b8542f7..17bca99e8ac8 100644 --- a/drivers/gpu/drm/arm/malidp_hw.c +++ b/drivers/gpu/drm/arm/malidp_hw.c @@ -766,12 +766,17 @@ static irqreturn_t malidp_de_irq(int irq, void *arg) u32 status, mask, dc_status; irqreturn_t ret = IRQ_NONE; - if (!drm->dev_private) - return IRQ_HANDLED; - hwdev = malidp->dev; de = &hwdev->map.de_irq_map; + /* + * if we are suspended it is likely that we were invoked because + * we share an interrupt line with some other driver, don't try + * to read the hardware registers + */ + if (hwdev->pm_suspended) + return IRQ_NONE; + /* first handle the config valid IRQ */ dc_status = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_REG_STATUS); if (dc_status & hwdev->map.dc_irq_map.vsync_irq) { @@ -854,6 +859,14 @@ static irqreturn_t malidp_se_irq(int irq, void *arg) struct malidp_hw_device *hwdev = malidp->dev; u32 status, mask; + /* + * if we are suspended it is likely that we were invoked because + * we share an interrupt line with some other driver, don't try + * to read the hardware registers + */ + if (hwdev->pm_suspended) + return IRQ_NONE; + status = malidp_hw_read(hwdev, hwdev->map.se_base + MALIDP_REG_STATUS); if (!(status & hwdev->map.se_irq_map.irq_mask)) return IRQ_NONE; From e40eda3dda1ef36ddef7e02c1b280a9ae91a561b Mon Sep 17 00:00:00 2001 From: Liviu Dudau Date: Tue, 13 Jun 2017 12:20:39 +0100 Subject: [PATCH 3/3] drm/arm: mali-dp: Use CMA helper for plane buffer address calculation CMA has gained a recent helper function for calculating the start of a plane buffer's physical address. Use that instead of the hand rolled version. Cc: Brian Starkey Signed-off-by: Liviu Dudau --- drivers/gpu/drm/arm/malidp_planes.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c index 063a8d2b0be3..600fa7bd7f52 100644 --- a/drivers/gpu/drm/arm/malidp_planes.c +++ b/drivers/gpu/drm/arm/malidp_planes.c @@ -264,11 +264,9 @@ static void malidp_de_set_plane_pitches(struct malidp_plane *mp, static void malidp_de_plane_update(struct drm_plane *plane, struct drm_plane_state *old_state) { - struct drm_gem_cma_object *obj; struct malidp_plane *mp; const struct malidp_hw_regmap *map; struct malidp_plane_state *ms = to_malidp_plane_state(plane->state); - u16 ptr; u32 src_w, src_h, dest_w, dest_h, val; int i; @@ -285,12 +283,12 @@ static void malidp_de_plane_update(struct drm_plane *plane, for (i = 0; i < ms->n_planes; i++) { /* calculate the offset for the layer's plane registers */ - ptr = mp->layer->ptr + (i << 4); + u16 ptr = mp->layer->ptr + (i << 4); + dma_addr_t fb_addr = drm_fb_cma_get_gem_addr(plane->state->fb, + plane->state, i); - obj = drm_fb_cma_get_gem_obj(plane->state->fb, i); - obj->paddr += plane->state->fb->offsets[i]; - malidp_hw_write(mp->hwdev, lower_32_bits(obj->paddr), ptr); - malidp_hw_write(mp->hwdev, upper_32_bits(obj->paddr), ptr + 4); + malidp_hw_write(mp->hwdev, lower_32_bits(fb_addr), ptr); + malidp_hw_write(mp->hwdev, upper_32_bits(fb_addr), ptr + 4); } malidp_de_set_plane_pitches(mp, ms->n_planes, plane->state->fb->pitches);