openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

tg3: Add function tg3_phy_shdw_write() 

For consistency with other register access functions, add shadow
register access function of the type (register/val).

Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Nithin Sujir 2013-09-20 16:46:55 -07:00 committed by David S. Miller
parent 8dda204164
commit 3ab7107133
1 changed files with 10 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/net/ethernet/broadcom/tg3.c
View File

@ -1326,6 +1326,12 @@ static int tg3_phy_toggle_auxctl_smdsp(struct tg3 *tp, bool enable)
return err; return err;
} }
static int tg3_phy_shdw_write(struct tg3 *tp, int reg, u32 val)
{
return tg3_writephy(tp, MII_TG3_MISC_SHDW,
reg | val | MII_TG3_MISC_SHDW_WREN);
}
static int tg3_bmcr_reset(struct tg3 *tp) static int tg3_bmcr_reset(struct tg3 *tp)
{ {
u32 phy_control; u32 phy_control;
@ -2218,25 +2224,21 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
return; return;
} }
reg = MII_TG3_MISC_SHDW_WREN | reg = MII_TG3_MISC_SHDW_SCR5_LPED |
MII_TG3_MISC_SHDW_SCR5_SEL |
MII_TG3_MISC_SHDW_SCR5_LPED |
MII_TG3_MISC_SHDW_SCR5_DLPTLM | MII_TG3_MISC_SHDW_SCR5_DLPTLM |
MII_TG3_MISC_SHDW_SCR5_SDTL | MII_TG3_MISC_SHDW_SCR5_SDTL |
MII_TG3_MISC_SHDW_SCR5_C125OE; MII_TG3_MISC_SHDW_SCR5_C125OE;
if (tg3_asic_rev(tp) != ASIC_REV_5784 || !enable) if (tg3_asic_rev(tp) != ASIC_REV_5784 || !enable)
reg |= MII_TG3_MISC_SHDW_SCR5_DLLAPD; reg |= MII_TG3_MISC_SHDW_SCR5_DLLAPD;
tg3_writephy(tp, MII_TG3_MISC_SHDW, reg); tg3_phy_shdw_write(tp, MII_TG3_MISC_SHDW_SCR5_SEL, reg);
reg = MII_TG3_MISC_SHDW_WREN | reg = MII_TG3_MISC_SHDW_APD_WKTM_84MS;
MII_TG3_MISC_SHDW_APD_SEL |
MII_TG3_MISC_SHDW_APD_WKTM_84MS;
if (enable) if (enable)
reg |= MII_TG3_MISC_SHDW_APD_ENABLE; reg |= MII_TG3_MISC_SHDW_APD_ENABLE;
tg3_writephy(tp, MII_TG3_MISC_SHDW, reg); tg3_phy_shdw_write(tp, MII_TG3_MISC_SHDW_APD_SEL, reg);
} }
static void tg3_phy_toggle_automdix(struct tg3 *tp, bool enable) static void tg3_phy_toggle_automdix(struct tg3 *tp, bool enable)