mirror of https://gitee.com/openkylin/linux.git
Add support for mt6592, mt8127 and mt8135 Socs from Mediatek.
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUZiGhAAoJELQ5Ylss8dNDs6oQAIVbGnJA4j2ajIGQmUuTVCdy 8S+QfAogEem3ZSpeG/Ku8UgV6QCbfF/gg/++hoXn5XyR8pl8Mk6lh+3mfpiJr/Bt zVPmqxaS4cRbDToBpMah05YMBwDoG3C/zArGglKJDMQV+TIzid/fDcyAH4Z6LqpL vS+kAm8ovTiCLIFLgXeimhxldPhP4xcVE+i0t2hfGzyTglmJJvn1YwCpMgkfBazM D9xkZIcoI0YgNkqFfiCfVRPxm6Tb95kYtUn6XwwQwJUx5pKW/uwSx54tf9sV2myQ 0UsuMGtBb2CIraPsAvY67ndC3lcA1f/RpaA2cjJyaDg+EYNr44nLbu14v4+xqoo6 Ud6iXjrzqa/pfACdRmUaWhReCFdmrHceuVd4hYPBvMRsCSNVjLnDVLr1LwVqpPv0 Nsxtzjw2s3+M43mBZfrva8lJVas/OgxGEk1JlufXFirfZBEyPiSGy7gxtQ/lm+kM aSpCsreIOcTjkN2MXNea3BWOLo/vHzoMEvQeqo2EwYqTjNqYMS5mdMvIvEJcxUVa uLWTf6SjcEeEVKamZ9Y3m6uIOgZv2KiQzeibaxccDCZG4DH2QR6IJvzQYEgI1Ui2 MXxrLY0SFp4G1UKv/nXalMDwI/HreGQGCCenlWyABv6/7/qiLX27CkVU8I5WOuod 31+J0spYkykFJ9vee9qC =DrlM -----END PGP SIGNATURE----- Merge tag 'v3.19-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt Pull "Add support for mt6592, mt8127 and mt8135 Socs from Mediatek" from Matthias Brugger: Here comes the pull request which introduces basic support for Mediatek SoCs mt6592, mt8127 and mt8135. The patches for the mt81xx got merged in the late tree for v3.18 but were not be merged at the end. They got a small fix regarding the compatible and model string in the dts files. * tag 'v3.19-next-dts' of https://github.com/mbgg/linux-mediatek: dt-bindings: add documentation for Mediatek SoC ARM: mediatek: add dts for mt6592-evb ARM: mediatek: Add basic support for mt6592 dt-bindings: add more chips in documentation for Mediatek SoC ARM: dts: Build dtb for mt8127 & mt8135 ARM: mediatek: add dts for MT8135 evaluation board. ARM: mediatek: Add basic support for mt8135 ARM: mediatek: add dts for 8127 Moose board ARM: mediatek: Add basic support for mt8127 Signed-off-by; Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
3af1fda393
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@ -1,10 +1,14 @@
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Mediatek MT6589 Platforms Device Tree Bindings
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MediaTek mt65xx & mt81xx Platforms Device Tree Bindings
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Boards with a SoC of the Mediatek MT6589 shall have the following property:
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Boards with a MediaTek mt65xx/mt81xx SoC shall have the following property:
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Required root node property:
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compatible: must contain "mediatek,mt6589"
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compatible: Must contain one of
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"mediatek,mt6589"
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"mediatek,mt6592"
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"mediatek,mt8127"
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"mediatek,mt8135"
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Supported boards:
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@ -12,3 +16,12 @@ Supported boards:
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- bq Aquaris5 smart phone:
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Required root node properties:
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- compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589";
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- Evaluation board for MT6592:
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Required root node properties:
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- compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
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- MTK mt8127 tablet moose EVB:
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Required root node properties:
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- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
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- MTK mt8135 tablet EVB:
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Required root node properties:
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- compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
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@ -526,7 +526,10 @@ dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
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dove-d2plug.dtb \
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dove-d3plug.dtb \
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dove-dove-db.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb \
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mt6592-evb.dtb \
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mt8127-moose.dtb \
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mt8135-evbp1.dtb
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targets += dtbs dtbs_install
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targets += $(dtb-y)
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@ -0,0 +1,26 @@
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Howard Chen <ibanezchen@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "mt6592.dtsi"
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/ {
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model = "mt6592 evb";
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compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
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memory {
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reg = <0x80000000 0x40000000>;
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};
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};
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@ -0,0 +1,98 @@
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Howard Chen <ibanezchen@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "mediatek,mt6592";
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interrupt-parent = <&gic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x1>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x2>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x3>;
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};
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cpu@4 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x4>;
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};
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cpu@5 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x5>;
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};
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cpu@6 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x6>;
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};
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cpu@7 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x7>;
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};
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};
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system_clk: dummy13m {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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rtc_clk: dummy32k {
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compatible = "fixed-clock";
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clock-frequency = <32000>;
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#clock-cells = <0>;
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};
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timer: timer@10008000 {
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compatible = "mediatek,mt6577-timer";
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reg = <0x10008000 0x80>;
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interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&system_clk>, <&rtc_clk>;
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clock-names = "system-clk", "rtc-clk";
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};
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gic: interrupt-controller@10211000 {
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compatible = "arm,cortex-a7-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x10211000 0x1000>,
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<0x10212000 0x1000>;
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};
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};
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@ -0,0 +1,25 @@
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Joe.C <yingjoe.chen@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "mt8127.dtsi"
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/ {
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model = "MediaTek MT8127 Moose Board";
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compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
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memory {
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reg = <0 0x80000000 0 0x40000000>;
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};
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};
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@ -0,0 +1,94 @@
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Joe.C <yingjoe.chen@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton64.dtsi"
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/ {
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compatible = "mediatek,mt8127";
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interrupt-parent = <&gic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x1>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x2>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x3>;
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};
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};
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clocks {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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system_clk: dummy13m {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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rtc_clk: dummy32k {
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compatible = "fixed-clock";
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clock-frequency = <32000>;
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#clock-cells = <0>;
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};
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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timer: timer@10008000 {
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compatible = "mediatek,mt8127-timer",
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"mediatek,mt6577-timer";
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reg = <0 0x10008000 0 0x80>;
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interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&system_clk>, <&rtc_clk>;
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clock-names = "system-clk", "rtc-clk";
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};
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gic: interrupt-controller@10211000 {
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compatible = "arm,cortex-a7-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0 0x10211000 0 0x1000>,
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<0 0x10212000 0 0x1000>,
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<0 0x10214000 0 0x2000>,
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<0 0x10216000 0 0x2000>;
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};
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};
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};
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@ -0,0 +1,25 @@
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Joe.C <yingjoe.chen@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "mt8135.dtsi"
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/ {
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model = "MediaTek MT8135 evaluation board";
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compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
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memory {
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reg = <0 0x80000000 0 0x40000000>;
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};
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};
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@ -0,0 +1,116 @@
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Joe.C <yingjoe.chen@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton64.dtsi"
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/ {
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compatible = "mediatek,mt8135";
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interrupt-parent = <&gic>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu0>;
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};
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core1 {
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cpu = <&cpu1>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&cpu2>;
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};
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core1 {
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cpu = <&cpu3>;
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};
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x000>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x001>;
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};
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cpu2: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x100>;
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};
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cpu3: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x101>;
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};
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};
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clocks {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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system_clk: dummy13m {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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rtc_clk: dummy32k {
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compatible = "fixed-clock";
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clock-frequency = <32000>;
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#clock-cells = <0>;
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};
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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timer: timer@10008000 {
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compatible = "mediatek,mt8135-timer",
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"mediatek,mt6577-timer";
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reg = <0 0x10008000 0 0x80>;
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interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&system_clk>, <&rtc_clk>;
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clock-names = "system-clk", "rtc-clk";
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};
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gic: interrupt-controller@10211000 {
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compatible = "arm,cortex-a15-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0 0x10211000 0 0x1000>,
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<0 0x10212000 0 0x1000>,
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<0 0x10214000 0 0x2000>,
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<0 0x10216000 0 0x2000>;
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};
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};
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};
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@ -19,6 +19,9 @@
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static const char * const mediatek_board_dt_compat[] = {
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"mediatek,mt6589",
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"mediatek,mt6592",
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"mediatek,mt8127",
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"mediatek,mt8135",
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NULL,
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};
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|
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