mirror of https://gitee.com/openkylin/linux.git
[PATCH] cs89x0: cleanly implement ixdp2x01 and pnx0501 support
Implement suitable versions of the readword/writeword macros for ixdp2x01 and pnx0501. Handle the 32-bit spacing of the registers in these functions instead of in the header file. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Cc: dmitry pervushin <dpervushin@ru.mvista.com> Cc: <dsaxena@plexity.net> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -338,6 +338,32 @@ struct net_device * __init cs89x0_probe(int unit)
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}
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#endif
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#if defined(CONFIG_ARCH_IXDP2X01)
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static int
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readword(unsigned long base_addr, int portno)
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{
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return (u16)__raw_readl(base_addr + (portno << 1));
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}
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static void
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writeword(unsigned long base_addr, int portno, int value)
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{
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__raw_writel((u16)value, base_addr + (portno << 1));
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}
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#else
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#if defined(CONFIG_ARCH_PNX0501)
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static int
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readword(unsigned long base_addr, int portno)
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{
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return inw(base_addr + (portno << 1));
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}
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static void
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writeword(unsigned long base_addr, int portno, int value)
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{
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outw(value, base_addr + (portno << 1));
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}
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#else
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static int
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readword(unsigned long base_addr, int portno)
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{
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@ -349,6 +375,8 @@ writeword(unsigned long base_addr, int portno, int value)
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{
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outw(value, base_addr + portno);
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}
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#endif
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#endif
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static int
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readreg(struct net_device *dev, int regno)
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@ -16,13 +16,6 @@
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#include <linux/config.h>
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#if defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX0105)
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/* IXDP2401/IXDP2801 uses dword-aligned register addressing */
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#define CS89x0_PORT(reg) ((reg) * 2)
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#else
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#define CS89x0_PORT(reg) (reg)
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#endif
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#define PP_ChipID 0x0000 /* offset 0h -> Corp -ID */
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/* offset 2h -> Model/Product Number */
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/* offset 3h -> Chip Revision Number */
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@ -332,16 +325,16 @@
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#define RAM_SIZE 0x1000 /* The card has 4k bytes or RAM */
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#define PKT_START PP_TxFrame /* Start of packet RAM */
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#define RX_FRAME_PORT CS89x0_PORT(0x0000)
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#define RX_FRAME_PORT 0x0000
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#define TX_FRAME_PORT RX_FRAME_PORT
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#define TX_CMD_PORT CS89x0_PORT(0x0004)
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#define TX_CMD_PORT 0x0004
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#define TX_NOW 0x0000 /* Tx packet after 5 bytes copied */
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#define TX_AFTER_381 0x0040 /* Tx packet after 381 bytes copied */
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#define TX_AFTER_ALL 0x00c0 /* Tx packet after all bytes copied */
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#define TX_LEN_PORT CS89x0_PORT(0x0006)
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#define ISQ_PORT CS89x0_PORT(0x0008)
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#define ADD_PORT CS89x0_PORT(0x000A)
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#define DATA_PORT CS89x0_PORT(0x000C)
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#define TX_LEN_PORT 0x0006
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#define ISQ_PORT 0x0008
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#define ADD_PORT 0x000A
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#define DATA_PORT 0x000C
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#define EEPROM_WRITE_EN 0x00F0
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#define EEPROM_WRITE_DIS 0x0000
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