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MIPS: cevt-r4k: Use CAUSEF_TI, CAUSEF_PCI constants
Use CAUSEF_TI and CAUSEF_PCI constants from asm/mipsregs.h rather than the magic values (1 << 30) and (1 << 26). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9124/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -75,7 +75,7 @@ irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
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* above we now know that the reason we got here must be a timer
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* interrupt. Being the paranoiacs we are we check anyway.
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*/
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if (!r2 || (read_c0_cause() & (1 << 30))) {
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if (!r2 || (read_c0_cause() & CAUSEF_TI)) {
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/* Clear Count/Compare Interrupt */
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write_c0_compare(read_c0_compare());
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cd = &per_cpu(mips_clockevent_device, cpu);
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@ -246,7 +246,7 @@ static int mipsxx_perfcount_handler(void)
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unsigned int counter;
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int handled = IRQ_NONE;
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if (cpu_has_mips_r2 && !(read_c0_cause() & (1 << 26)))
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if (cpu_has_mips_r2 && !(read_c0_cause() & CAUSEF_PCI))
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return handled;
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switch (counters) {
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