mirror of https://gitee.com/openkylin/linux.git
Highlights:
----------- - Add multiple pinctrl configurations to STiH407 - Enable devices using pins only at board level - Add HW RNG device nodes to STiH407 family - Fix MMC0 clock configuration on STiH418 - Fix interrupt related bindings on STiH407 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWDQTZAAoJEMo4jShGhw+JTnAQANy0dV32jlmxyhjZNBkz56Ri JS4DL/kGAhlAtV+zzxhw31AMNJrL8JiBYA8mVANfXSAizQNqUnSz378fUVbb1+LS BjX1UoWiT5+ZUpf6uBQfEPZRfxe+iuc2mFfmx8vL/KbueCAikBXqCIo/7Ow490H7 shpQTa1M2vTeqX9+OMuFEyOuxuyL3+Qj4iSmpfLSjPWWscJ5WaUeQtNRpZ08o+NQ RhmxMPacUTDmD8vRnnVsZWiF5/c2MjfpCYQalWKPM4nuyyRQkaXRVkk+jzIwzwh7 fzH7sR3fu0ZIqWLt9CjugcbzTk46abaGp/UDLM8TK9/fziVwM5vcHO2kmcxm0FIm FJLY4X5lZ+7v/Y5IxCPws9G5mI6KqDGOxe+X3Di5GRRT2TKqXvRkS+fUUZ3J9qRl kOwLf5/dJ/cH7w3DUH2GEFJEVZeu3jeElcIQFiqEordZrkobN+2uZOH9IJHnqXqd dmCpw6f0SM2GDDYKqjYQNc7wF+zoVrSvo64Aq6L8BmwIn/+RyKqW5TPb/v/TSpWU V7gvJ6cwHMWKn4+JREmpQR19mjftUEy6kNYH/KW4CUK1QNh6635otFIu4S1d/Nzm Kg8jcwH7D+in/fobm3fcELnFdZa6RpLiMn6nA61qyC84+u5m9wcOsqb5Ge/JzlK9 nK6xjOPZQ0JfJVdxyPH2 =jDta -----END PGP SIGNATURE----- Merge tag 'sti-dt-for-v4.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt Merge "STi DT changes for v4.4, round 1" from Maxime Coquelin: Highlights: ----------- - Add multiple pinctrl configurations to STiH407 - Enable devices using pins only at board level - Add HW RNG device nodes to STiH407 family - Fix MMC0 clock configuration on STiH418 - Fix interrupt related bindings on STiH407 * tag 'sti-dt-for-v4.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti: ARM: STi: STiH407: Enable the 2 HW Random Number Generators for STiH4{07, 10} ARM: DT: STi: STiH418: Fix mmc0 clock configuration ARM: STi: DT: STiH407: Rename incorrect interrupt related binding ARM: STi: STiH407: Add spi default pinctrl groups. ARM: DT: STiH407: Add RMII pinctrl support ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX ARM: DT: STiH407: Add SD pinctrl config for mmc0 controller ARM: DT: STiH407: Add systrace pin configuration ARM: DT: STiH407: Add NAND flash controller pin configuration ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config ARM: DT: STiH407: Add serial3 pinctrl configuration ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs ARM: STi: DT: STiH407: Add i2c3 alternate pin configs ARM: STi: DT: STiH407: Add a cec0 pin definition ARM: dts: stih410: Enable USB2.0 and related PHY nodes at board level ARM: dts: stih407/410: Tidy up display nodes ARM: dts: stih407: Enable PWM nodes only board level
This commit is contained in:
commit
3cb06b30e4
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@ -152,6 +152,19 @@ irq-syscfg {
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<ST_IRQ_SYSCFG_DISABLED>;
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};
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/* Display */
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vtg_main: sti-vtg-main@8d02800 {
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compatible = "st,vtg";
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reg = <0x8d02800 0x200>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
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};
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vtg_aux: sti-vtg-aux@8d00200 {
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compatible = "st,vtg";
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reg = <0x8d00200 0x100>;
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interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
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};
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serial@9830000 {
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compatible = "st,asc";
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reg = <0x9830000 0x2c>;
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@ -396,6 +409,8 @@ spi@9841000 {
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interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1_default>;
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status = "disabled";
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};
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@ -406,6 +421,8 @@ spi@9842000 {
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interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi2_default>;
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status = "disabled";
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};
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@ -416,6 +433,8 @@ spi@9843000 {
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interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi3_default>;
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status = "disabled";
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};
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@ -426,6 +445,8 @@ spi@9844000 {
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interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi4_default>;
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status = "disabled";
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};
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@ -437,6 +458,8 @@ spi@9540000 {
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interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_sysin>;
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clock-names = "ssc";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi10_default>;
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status = "disabled";
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};
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@ -447,6 +470,8 @@ spi@9541000 {
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_sysin>;
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clock-names = "ssc";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi11_default>;
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status = "disabled";
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};
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@ -457,6 +482,8 @@ spi@9542000 {
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_sysin>;
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clock-names = "ssc";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi12_default>;
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status = "disabled";
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};
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@ -585,7 +612,6 @@ dwc3: dwc3@9900000 {
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/* COMMS PWM Module */
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pwm0: pwm@9810000 {
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compatible = "st,sti-pwm";
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status = "okay";
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#pwm-cells = <2>;
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reg = <0x9810000 0x68>;
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pinctrl-names = "default";
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@ -593,12 +619,13 @@ pwm0: pwm@9810000 {
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clock-names = "pwm";
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clocks = <&clk_sysin>;
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st,pwm-num-chan = <1>;
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status = "disabled";
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};
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/* SBC PWM Module */
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pwm1: pwm@9510000 {
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compatible = "st,sti-pwm";
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status = "okay";
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#pwm-cells = <2>;
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reg = <0x9510000 0x68>;
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pinctrl-names = "default";
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@ -609,6 +636,22 @@ &pinctrl_pwm1_chan2_default
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clock-names = "pwm";
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clocks = <&clk_sysin>;
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st,pwm-num-chan = <4>;
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status = "disabled";
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};
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rng10: rng@08a89000 {
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compatible = "st,rng";
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reg = <0x08a89000 0x1000>;
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clocks = <&clk_sysin>;
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status = "okay";
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};
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rng11: rng@08a8a000 {
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compatible = "st,rng";
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reg = <0x08a8a000 0x1000>;
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clocks = <&clk_sysin>;
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status = "okay";
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};
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};
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};
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@ -53,7 +53,7 @@ pin-controller-sbc {
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reg = <0x0961f080 0x4>;
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reg-names = "irqmux";
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interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
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interrupts-names = "irqmux";
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interrupt-names = "irqmux";
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ranges = <0 0x09610000 0x6000>;
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pio0: gpio@09610000 {
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@ -107,12 +107,38 @@ pio5: gpio@09615000 {
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st,retime-pin-mask = <0x3f>;
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};
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cec0 {
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pinctrl_cec0_default: cec0-default {
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st,pins {
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hdmi_cec = <&pio2 4 ALT1 BIDIR>;
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};
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};
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};
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rc {
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pinctrl_ir: ir0 {
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st,pins {
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ir = <&pio4 0 ALT2 IN>;
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};
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};
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pinctrl_uhf: uhf0 {
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st,pins {
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ir = <&pio4 1 ALT2 IN>;
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};
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};
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pinctrl_tx: tx0 {
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st,pins {
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tx = <&pio4 2 ALT2 OUT>;
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};
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};
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pinctrl_tx_od: tx_od0 {
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st,pins {
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tx_od = <&pio4 3 ALT2 OUT>;
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};
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};
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};
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/* SBC_ASC0 - UART10 */
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@ -230,6 +256,33 @@ st,pins {
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phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
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};
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};
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pinctrl_rmii1: rmii1-0 {
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st,pins {
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txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
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txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
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txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
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mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
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mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
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mdint = <&pio1 3 ALT1 IN BYPASS 0>;
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rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_B>;
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rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_B>;
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rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_B>;
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rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
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};
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};
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pinctrl_rmii1_phyclk: rmii1_phyclk {
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st,pins {
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phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
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};
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};
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pinctrl_rmii1_phyclk_ext: rmii1_phyclk_ext {
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st,pins {
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phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
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};
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};
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};
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pwm1 {
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@ -254,6 +307,57 @@ st,pins {
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};
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};
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};
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spi10 {
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pinctrl_spi10_default: spi10-4w-alt1-0 {
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st,pins {
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mtsr = <&pio4 6 ALT1 OUT>;
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mrst = <&pio4 7 ALT1 IN>;
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scl = <&pio4 5 ALT1 OUT>;
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};
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};
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pinctrl_spi10_3w_alt1_0: spi10-3w-alt1-0 {
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st,pins {
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mtsr = <&pio4 6 ALT1 BIDIR_PU>;
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scl = <&pio4 5 ALT1 OUT>;
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};
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};
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};
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spi11 {
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pinctrl_spi11_default: spi11-4w-alt2-0 {
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st,pins {
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mtsr = <&pio3 1 ALT2 OUT>;
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mrst = <&pio3 0 ALT2 IN>;
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scl = <&pio3 2 ALT2 OUT>;
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};
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};
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pinctrl_spi11_3w_alt2_0: spi11-3w-alt2-0 {
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st,pins {
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mtsr = <&pio3 1 ALT2 BIDIR_PU>;
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scl = <&pio3 2 ALT2 OUT>;
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};
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};
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};
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spi12 {
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pinctrl_spi12_default: spi12-4w-alt2-0 {
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st,pins {
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mtsr = <&pio3 6 ALT2 OUT>;
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mrst = <&pio3 4 ALT2 IN>;
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scl = <&pio3 7 ALT2 OUT>;
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};
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};
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pinctrl_spi12_3w_alt2_0: spi12-3w-alt2-0 {
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st,pins {
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mtsr = <&pio3 6 ALT2 BIDIR_PU>;
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scl = <&pio3 7 ALT2 OUT>;
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};
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};
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};
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};
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pin-controller-front0 {
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@ -264,7 +368,7 @@ pin-controller-front0 {
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reg = <0x0920f080 0x4>;
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reg-names = "irqmux";
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interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>;
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interrupts-names = "irqmux";
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interrupt-names = "irqmux";
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ranges = <0 0x09200000 0x10000>;
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pio10: pio@09200000 {
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@ -422,20 +526,180 @@ st,pins {
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};
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i2c3 {
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pinctrl_i2c3_default: i2c3-default {
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pinctrl_i2c3_default: i2c3-alt1-0 {
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st,pins {
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sda = <&pio18 6 ALT1 BIDIR>;
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scl = <&pio18 5 ALT1 BIDIR>;
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};
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};
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pinctrl_i2c3_alt1_1: i2c3-alt1-1 {
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st,pins {
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sda = <&pio17 7 ALT1 BIDIR>;
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scl = <&pio17 6 ALT1 BIDIR>;
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};
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};
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pinctrl_i2c3_alt3_0: i2c3-alt3-0 {
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st,pins {
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sda = <&pio13 6 ALT3 BIDIR>;
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scl = <&pio13 5 ALT3 BIDIR>;
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};
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};
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};
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spi0 {
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pinctrl_spi0_default: spi0-default {
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pinctrl_spi0_default: spi0-4w-alt2-0 {
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st,pins {
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mtsr = <&pio12 6 ALT2 BIDIR>;
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mrst = <&pio12 7 ALT2 BIDIR>;
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scl = <&pio12 5 ALT2 BIDIR>;
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mtsr = <&pio10 6 ALT2 OUT>;
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mrst = <&pio10 7 ALT2 IN>;
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scl = <&pio10 5 ALT2 OUT>;
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||||
};
|
||||
};
|
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|
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pinctrl_spi0_3w_alt2_0: spi0-3w-alt2-0 {
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st,pins {
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mtsr = <&pio10 6 ALT2 BIDIR_PU>;
|
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scl = <&pio10 5 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi0_4w_alt1_0: spi0-4w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio19 7 ALT1 OUT>;
|
||||
mrst = <&pio19 5 ALT1 IN>;
|
||||
scl = <&pio19 6 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi0_3w_alt1_0: spi0-3w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio19 7 ALT1 BIDIR_PU>;
|
||||
scl = <&pio19 6 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1_default: spi1-4w-alt2-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio11 1 ALT2 OUT>;
|
||||
mrst = <&pio11 2 ALT2 IN>;
|
||||
scl = <&pio11 0 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi1_3w_alt2_0: spi1-3w-alt2-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio11 1 ALT2 BIDIR_PU>;
|
||||
scl = <&pio11 0 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi1_4w_alt1_0: spi1-4w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio14 3 ALT1 OUT>;
|
||||
mrst = <&pio14 4 ALT1 IN>;
|
||||
scl = <&pio14 2 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi1_3w_alt1_0: spi1-3w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio14 3 ALT1 BIDIR_PU>;
|
||||
scl = <&pio14 2 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi2 {
|
||||
pinctrl_spi2_default: spi2-4w-alt2-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio12 6 ALT2 OUT>;
|
||||
mrst = <&pio12 7 ALT2 IN>;
|
||||
scl = <&pio12 5 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi2_3w_alt2_0: spi2-3w-alt2-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio12 6 ALT2 BIDIR_PU>;
|
||||
scl = <&pio12 5 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi2_4w_alt1_0: spi2-4w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio14 6 ALT1 OUT>;
|
||||
mrst = <&pio14 7 ALT1 IN>;
|
||||
scl = <&pio14 5 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi2_3w_alt1_0: spi2-3w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio14 6 ALT1 BIDIR_PU>;
|
||||
scl = <&pio14 5 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi2_4w_alt2_1: spi2-4w-alt2-1 {
|
||||
st,pins {
|
||||
mtsr = <&pio15 6 ALT2 OUT>;
|
||||
mrst = <&pio15 7 ALT2 IN>;
|
||||
scl = <&pio15 5 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi2_3w_alt2_1: spi2-3w-alt2-1 {
|
||||
st,pins {
|
||||
mtsr = <&pio15 6 ALT2 BIDIR_PU>;
|
||||
scl = <&pio15 5 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi3 {
|
||||
pinctrl_spi3_default: spi3-4w-alt3-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio13 6 ALT3 OUT>;
|
||||
mrst = <&pio13 7 ALT3 IN>;
|
||||
scl = <&pio13 5 ALT3 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi3_3w_alt3_0: spi3-3w-alt3-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio13 6 ALT3 BIDIR_PU>;
|
||||
scl = <&pio13 5 ALT3 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi3_4w_alt1_0: spi3-4w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio17 7 ALT1 OUT>;
|
||||
mrst = <&pio17 5 ALT1 IN>;
|
||||
scl = <&pio17 6 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi3_3w_alt1_0: spi3-3w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio17 7 ALT1 BIDIR_PU>;
|
||||
scl = <&pio17 6 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi3_4w_alt1_1: spi3-4w-alt1-1 {
|
||||
st,pins {
|
||||
mtsr = <&pio18 6 ALT1 OUT>;
|
||||
mrst = <&pio18 7 ALT1 IN>;
|
||||
scl = <&pio18 5 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi3_3w_alt1_1: spi3-3w-alt1-1 {
|
||||
st,pins {
|
||||
mtsr = <&pio18 6 ALT1 BIDIR_PU>;
|
||||
scl = <&pio18 5 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -627,6 +891,18 @@ st,pins {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
systrace {
|
||||
pinctrl_systrace_default: systrace-default {
|
||||
st,pins {
|
||||
trc_data0 = <&pio11 3 ALT5 OUT>;
|
||||
trc_data1 = <&pio11 4 ALT5 OUT>;
|
||||
trc_data2 = <&pio11 5 ALT5 OUT>;
|
||||
trc_data3 = <&pio11 6 ALT5 OUT>;
|
||||
trc_clk = <&pio11 7 ALT5 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pin-controller-front1 {
|
||||
|
@ -637,7 +913,7 @@ pin-controller-front1 {
|
|||
reg = <0x0921f080 0x4>;
|
||||
reg-names = "irqmux";
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
|
||||
interrupts-names = "irqmux";
|
||||
interrupt-names = "irqmux";
|
||||
ranges = <0 0x09210000 0x10000>;
|
||||
|
||||
tsin4 {
|
||||
|
@ -670,7 +946,7 @@ pin-controller-rear {
|
|||
reg = <0x0922f080 0x4>;
|
||||
reg-names = "irqmux";
|
||||
interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>;
|
||||
interrupts-names = "irqmux";
|
||||
interrupt-names = "irqmux";
|
||||
ranges = <0 0x09220000 0x6000>;
|
||||
|
||||
pio30: gpio@09220000 {
|
||||
|
@ -758,6 +1034,47 @@ st,pins {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi4 {
|
||||
pinctrl_spi4_default: spi4-4w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio30 1 ALT1 OUT>;
|
||||
mrst = <&pio30 2 ALT1 IN>;
|
||||
scl = <&pio30 0 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi4_3w_alt1_0: spi4-3w-alt1-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio30 1 ALT1 BIDIR_PU>;
|
||||
scl = <&pio30 0 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi4_4w_alt3_0: spi4-4w-alt3-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio34 1 ALT3 OUT>;
|
||||
mrst = <&pio34 2 ALT3 IN>;
|
||||
scl = <&pio34 0 ALT3 OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi4_3w_alt3_0: spi4-3w-alt3-0 {
|
||||
st,pins {
|
||||
mtsr = <&pio34 1 ALT3 BIDIR_PU>;
|
||||
scl = <&pio34 0 ALT3 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial3 {
|
||||
pinctrl_serial3: serial3-0 {
|
||||
st,pins {
|
||||
tx = <&pio31 3 ALT1 OUT>;
|
||||
rx = <&pio31 4 ALT1 IN>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pin-controller-flash {
|
||||
|
@ -811,6 +1128,57 @@ st,pins {
|
|||
emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>;
|
||||
};
|
||||
};
|
||||
pinctrl_sd0: sd0-0 {
|
||||
st,pins {
|
||||
sd_clk = <&pio40 6 ALT1 BIDIR>;
|
||||
sd_cmd = <&pio40 7 ALT1 BIDIR_PU>;
|
||||
sd_dat0 = <&pio41 0 ALT1 BIDIR_PU>;
|
||||
sd_dat1 = <&pio41 1 ALT1 BIDIR_PU>;
|
||||
sd_dat2 = <&pio41 2 ALT1 BIDIR_PU>;
|
||||
sd_dat3 = <&pio41 3 ALT1 BIDIR_PU>;
|
||||
sd_led = <&pio42 0 ALT2 OUT>;
|
||||
sd_pwren = <&pio42 2 ALT2 OUT>;
|
||||
sd_vsel = <&pio42 3 ALT2 OUT>;
|
||||
sd_cd = <&pio42 4 ALT2 IN>;
|
||||
sd_wp = <&pio42 5 ALT2 IN>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fsm {
|
||||
pinctrl_fsm: fsm {
|
||||
st,pins {
|
||||
spi-fsm-clk = <&pio40 1 ALT1 OUT>;
|
||||
spi-fsm-cs = <&pio40 0 ALT1 OUT>;
|
||||
spi-fsm-mosi = <&pio40 2 ALT1 OUT>;
|
||||
spi-fsm-miso = <&pio40 3 ALT1 IN>;
|
||||
spi-fsm-hol = <&pio40 5 ALT1 OUT>;
|
||||
spi-fsm-wp = <&pio40 4 ALT1 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand {
|
||||
st,pins {
|
||||
nand_cs1 = <&pio40 6 ALT3 OUT>;
|
||||
nand_cs0 = <&pio40 7 ALT3 OUT>;
|
||||
nand_d0 = <&pio41 0 ALT3 BIDIR>;
|
||||
nand_d1 = <&pio41 1 ALT3 BIDIR>;
|
||||
nand_d2 = <&pio41 2 ALT3 BIDIR>;
|
||||
nand_d3 = <&pio41 3 ALT3 BIDIR>;
|
||||
nand_d4 = <&pio41 4 ALT3 BIDIR>;
|
||||
nand_d5 = <&pio41 5 ALT3 BIDIR>;
|
||||
nand_d6 = <&pio41 6 ALT3 BIDIR>;
|
||||
nand_d7 = <&pio41 7 ALT3 BIDIR>;
|
||||
nand_we = <&pio42 0 ALT3 OUT>;
|
||||
nand_dqs = <&pio42 1 ALT3 OUT>;
|
||||
nand_ale = <&pio42 2 ALT3 OUT>;
|
||||
nand_cle = <&pio42 3 ALT3 OUT>;
|
||||
nand_rnb = <&pio42 4 ALT3 IN>;
|
||||
nand_oe = <&pio42 5 ALT3 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -10,19 +10,6 @@
|
|||
#include "stih407-family.dtsi"
|
||||
/ {
|
||||
soc {
|
||||
/* Display */
|
||||
vtg_main: sti-vtg-main@8d02800 {
|
||||
compatible = "st,vtg";
|
||||
reg = <0x8d02800 0x200>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
|
||||
};
|
||||
|
||||
vtg_aux: sti-vtg-aux@8d00200 {
|
||||
compatible = "st,vtg";
|
||||
reg = <0x8d00200 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
|
||||
};
|
||||
|
||||
sti-display-subsystem {
|
||||
compatible = "st,sti-display-subsystem";
|
||||
#address-cells = <1>;
|
||||
|
|
|
@ -35,5 +35,29 @@ mmc0: sdhci@09060000 {
|
|||
sd-uhs-sdr104;
|
||||
sd-uhs-ddr50;
|
||||
};
|
||||
|
||||
usb2_picophy1: phy2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb2_picophy2: phy3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ohci0: usb@9a03c00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ehci0: usb@9a03e00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ohci1: usb@9a83c00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ehci1: usb@9a83e00 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -22,6 +22,8 @@ usb2_picophy1: phy2 {
|
|||
resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
|
||||
<&picophyreset STIH407_PICOPHY0_RESET>;
|
||||
reset-names = "global", "port";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb2_picophy2: phy3 {
|
||||
|
@ -31,6 +33,8 @@ usb2_picophy2: phy3 {
|
|||
resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
|
||||
<&picophyreset STIH407_PICOPHY1_RESET>;
|
||||
reset-names = "global", "port";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ohci0: usb@9a03c00 {
|
||||
|
@ -43,6 +47,8 @@ ohci0: usb@9a03c00 {
|
|||
reset-names = "power", "softreset";
|
||||
phys = <&usb2_picophy1>;
|
||||
phy-names = "usb";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehci0: usb@9a03e00 {
|
||||
|
@ -57,6 +63,8 @@ ehci0: usb@9a03e00 {
|
|||
reset-names = "power", "softreset";
|
||||
phys = <&usb2_picophy1>;
|
||||
phy-names = "usb";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ohci1: usb@9a83c00 {
|
||||
|
@ -69,6 +77,8 @@ ohci1: usb@9a83c00 {
|
|||
reset-names = "power", "softreset";
|
||||
phys = <&usb2_picophy2>;
|
||||
phy-names = "usb";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehci1: usb@9a83e00 {
|
||||
|
@ -83,19 +93,8 @@ ehci1: usb@9a83e00 {
|
|||
reset-names = "power", "softreset";
|
||||
phys = <&usb2_picophy2>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
|
||||
/* Display */
|
||||
vtg_main: sti-vtg-main@8d02800 {
|
||||
compatible = "st,vtg";
|
||||
reg = <0x8d02800 0x200>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
|
||||
};
|
||||
|
||||
vtg_aux: sti-vtg-aux@8d00200 {
|
||||
compatible = "st,vtg";
|
||||
reg = <0x8d00200 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sti-display-subsystem {
|
||||
|
|
|
@ -99,5 +99,11 @@ ehci1: usb@9a83e00 {
|
|||
phys = <&usb2_picophy2>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
|
||||
mmc0: sdhci@09060000 {
|
||||
assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
|
||||
assigned-clock-parents = <&clk_s_c0_pll1 0>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -27,6 +27,14 @@ green {
|
|||
};
|
||||
};
|
||||
|
||||
pwm0: pwm@9810000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwm1: pwm@9510000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c@9842000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue