mirror of https://gitee.com/openkylin/linux.git
The i.MX clock updates for 4.7, take 2:
- Update clk-pllv3 driver to get it return correct frequency for Ethernet PLL on i.MX7D. - Correct ahb clock mux settings for i.MX7D per latest hardware document. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJXKKokAAoJEFBXWFqHsHzOTjwH/j5xykeHw0l4KvGQJ6Z3PfDT //T8qoJXwgKrXmN9ZmQAf+aDfC0LLqMTU8XHKjveicrxOU9Rca7IdsG1UePqR2eh u/kB9QkAcZH1QDDRKqnLMzk3MS6551mPu2gS56b5D5Ggusk2EA08sHOAGpKNghWG s1LFJlZK5RPkdQKkscAmwkywFGO6/EncTrx+PYa20891lVTul6/ir2KbJRUY2q84 /U7sBUwhW6Ex6nnAHV0Zeb1XHPoex5ojXB+C6pQqBDtS9hqoVcyuxp4u/9DavAGE 9rakBZ1uFCOH6J19OGFzTuhdKIbF753xrUB7iGwrDcR+nyIxME6+ErwvGV7VH2c= =qvVi -----END PGP SIGNATURE----- Merge tag 'imx-clk-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next Pull i.MX clk updates from Shawn Guo: - Update clk-pllv3 driver to get it return correct frequency for Ethernet PLL on i.MX7D. - Correct ahb clock mux settings for i.MX7D per latest hardware document. * tag 'imx-clk-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: clk: imx7d: fix ahb clock mux 1 clk: imx: return correct frequency for Ethernet PLL
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3cdaeb7d8b
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@ -56,7 +56,7 @@ static const char *nand_usdhc_bus_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
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"pll_sys_pfd2_135m_clk", "pll_sys_pfd6_clk", "pll_enet_250m_clk",
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"pll_audio_main_clk", };
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static const char *ahb_channel_sel[] = { "osc", "pll_sys_pfd2_135m_clk",
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static const char *ahb_channel_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
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"pll_dram_533m_clk", "pll_sys_pfd0_392m_clk",
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"pll_enet_125m_clk", "pll_usb_main_clk", "pll_audio_main_clk",
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"pll_video_main_clk", };
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@ -44,6 +44,7 @@ struct clk_pllv3 {
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u32 powerdown;
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u32 div_mask;
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u32 div_shift;
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unsigned long ref_clock;
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};
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#define to_clk_pllv3(_hw) container_of(_hw, struct clk_pllv3, hw)
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@ -286,7 +287,9 @@ static const struct clk_ops clk_pllv3_av_ops = {
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static unsigned long clk_pllv3_enet_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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return 500000000;
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struct clk_pllv3 *pll = to_clk_pllv3(hw);
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return pll->ref_clock;
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}
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static const struct clk_ops clk_pllv3_enet_ops = {
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@ -326,7 +329,11 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
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break;
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case IMX_PLLV3_ENET_IMX7:
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pll->powerdown = IMX7_ENET_PLL_POWER;
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pll->ref_clock = 1000000000;
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ops = &clk_pllv3_enet_ops;
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break;
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case IMX_PLLV3_ENET:
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pll->ref_clock = 500000000;
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ops = &clk_pllv3_enet_ops;
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break;
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default:
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