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misc: rtsx: Use pcie_capability_clear_and_set_word() for PCI_EXP_LNKCTL 

Instead of using the driver-specific rtsx_pci_update_cfg_byte() to update
the PCIe Link Control Register, use pcie_capability_clear_and_set_word()
like the rest of the kernel does.  This makes it easier to maintain ASPM
across the PCI core and drivers.

Remove the now-unused rtsx_pci_update_cfg_byte() and ASPM_MASK_NEG
definitions.

No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20200521180545.1159896-5-helgaas@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Bjorn Helgaas 2020-05-21 13:05:43 -05:00 committed by Greg Kroah-Hartman
parent 9ae577047e
commit 3d1e7aa80d
6 changed files with 14 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/misc/cardreader/rts5249.c
View File

@ -349,15 +349,12 @@ static int rtsx_base_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
static void rts5249_set_aspm(struct rtsx_pcr *pcr, bool enable) static void rts5249_set_aspm(struct rtsx_pcr *pcr, bool enable)
{ {
u8 val = 0;
if (pcr->aspm_enabled == enable) if (pcr->aspm_enabled == enable)
return; return;
if (enable) pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
val = pcr->aspm_en; PCI_EXP_LNKCTL_ASPMC,
rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, enable ? pcr->aspm_en : 0);
ASPM_MASK_NEG, val);
pcr->aspm_enabled = enable; pcr->aspm_enabled = enable;
} }

9
drivers/misc/cardreader/rts5260.c
View File

@ -572,15 +572,12 @@ static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
static void rts5260_set_aspm(struct rtsx_pcr *pcr, bool enable) static void rts5260_set_aspm(struct rtsx_pcr *pcr, bool enable)
{ {
u8 val = 0;
if (pcr->aspm_enabled == enable) if (pcr->aspm_enabled == enable)
return; return;
if (enable) pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
val = pcr->aspm_en; PCI_EXP_LNKCTL_ASPMC,
rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, enable ? pcr->aspm : 0);
ASPM_MASK_NEG, val);
pcr->aspm_enabled = enable; pcr->aspm_enabled = enable;
} }

14
drivers/misc/cardreader/rts5261.c
View File

@ -518,28 +518,22 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
static void rts5261_enable_aspm(struct rtsx_pcr *pcr, bool enable) static void rts5261_enable_aspm(struct rtsx_pcr *pcr, bool enable)
{ {
u8 val = 0;
if (pcr->aspm_enabled == enable) if (pcr->aspm_enabled == enable)
return; return;
val = pcr->aspm_en; pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_ASPMC, pcr->aspm_en);
ASPM_MASK_NEG, val);
pcr->aspm_enabled = enable; pcr->aspm_enabled = enable;
} }
static void rts5261_disable_aspm(struct rtsx_pcr *pcr, bool enable) static void rts5261_disable_aspm(struct rtsx_pcr *pcr, bool enable)
{ {
u8 val = 0;
if (pcr->aspm_enabled == enable) if (pcr->aspm_enabled == enable)
return; return;
val = 0; pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_ASPMC, 0);
ASPM_MASK_NEG, val);
rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
udelay(10); udelay(10);
pcr->aspm_enabled = enable; pcr->aspm_enabled = enable;

8
drivers/misc/cardreader/rtsx_pcr.c
View File

@ -57,14 +57,14 @@ MODULE_DEVICE_TABLE(pci, rtsx_pci_ids);
static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr) static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr)
{ {
rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
ASPM_MASK_NEG, pcr->aspm_en); PCI_EXP_LNKCTL_ASPMC, pcr->aspm_en);
} }
static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr) static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr)
{ {
rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
ASPM_MASK_NEG, 0); PCI_EXP_LNKCTL_ASPMC, 0);
} }
static int rtsx_comm_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) static int rtsx_comm_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency)

1
drivers/misc/cardreader/rtsx_pcr.h
View File

@ -29,7 +29,6 @@
#define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF 0xAC #define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF 0xAC
#define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF 0xF8 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF 0xF8
#define CMD_TIMEOUT_DEF 100 #define CMD_TIMEOUT_DEF 100
#define ASPM_MASK_NEG 0xFC
#define MASK_8_BIT_DEF 0xFF #define MASK_8_BIT_DEF 0xFF
#define SSC_CLOCK_STABLE_WAIT 130 #define SSC_CLOCK_STABLE_WAIT 130

12
include/linux/rtsx_pci.h
View File

@ -1307,18 +1307,6 @@ static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr)
return (u8 *)(pcr->host_cmds_ptr); return (u8 *)(pcr->host_cmds_ptr);
} }
static inline int rtsx_pci_update_cfg_byte(struct rtsx_pcr *pcr, int addr,
u8 mask, u8 append)
{
int err;
u8 val;
err = pci_read_config_byte(pcr->pci, addr, &val);
if (err < 0)
return err;
return pci_write_config_byte(pcr->pci, addr, (val & mask) | append);
}
static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val) static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)
{ {
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24);