mirror of https://gitee.com/openkylin/linux.git
netdev: octeon_mgmt: Add hardware timestamp support.
Octeon cn6XXX models have timestamp support on the mgmt ports, so hook it up. Signed-off-by: Chad Reese <kreese@caviumnetworks.com> Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Chad Reese
David Daney
parent
eeae05aa21
commit
3d30585026
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@ -10,6 +10,7 @@
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#include <linux/dma-mapping.h>
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#include <linux/etherdevice.h>
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#include <linux/capability.h>
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#include <linux/net_tstamp.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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#include <linux/spinlock.h>
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@ -114,6 +115,7 @@ struct octeon_mgmt {
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u64 agl_prt_ctl;
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int port;
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int irq;
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bool has_rx_tstamp;
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u64 *tx_ring;
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dma_addr_t tx_ring_handle;
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unsigned int tx_next;
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@ -238,6 +240,28 @@ static void octeon_mgmt_rx_fill_ring(struct net_device *netdev)
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}
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}
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static ktime_t ptp_to_ktime(u64 ptptime)
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{
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ktime_t ktimebase;
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u64 ptpbase;
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unsigned long flags;
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local_irq_save(flags);
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/* Fill the icache with the code */
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ktime_get_real();
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/* Flush all pending operations */
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mb();
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/* Read the time and PTP clock as close together as
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* possible. It is important that this sequence take the same
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* amount of time to reduce jitter
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*/
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ktimebase = ktime_get_real();
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ptpbase = cvmx_read_csr(CVMX_MIO_PTP_CLOCK_HI);
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local_irq_restore(flags);
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return ktime_sub_ns(ktimebase, ptpbase - ptptime);
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}
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static void octeon_mgmt_clean_tx_buffers(struct octeon_mgmt *p)
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{
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union cvmx_mixx_orcnt mix_orcnt;
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@ -277,6 +301,20 @@ static void octeon_mgmt_clean_tx_buffers(struct octeon_mgmt *p)
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dma_unmap_single(p->dev, re.s.addr, re.s.len,
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DMA_TO_DEVICE);
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/* Read the hardware TX timestamp if one was recorded */
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if (unlikely(re.s.tstamp)) {
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struct skb_shared_hwtstamps ts;
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/* Read the timestamp */
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u64 ns = cvmx_read_csr(CVMX_MIXX_TSTAMP(p->port));
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/* Remove the timestamp from the FIFO */
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cvmx_write_csr(CVMX_MIXX_TSCTL(p->port), 0);
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/* Tell the kernel about the timestamp */
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ts.syststamp = ptp_to_ktime(ns);
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ts.hwtstamp = ns_to_ktime(ns);
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skb_tstamp_tx(skb, &ts);
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}
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dev_kfree_skb_any(skb);
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cleaned++;
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@ -377,6 +415,16 @@ static int octeon_mgmt_receive_one(struct octeon_mgmt *p)
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/* A good packet, send it up. */
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skb_put(skb, re.s.len);
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good:
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/* Process the RX timestamp if it was recorded */
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if (p->has_rx_tstamp) {
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/* The first 8 bytes are the timestamp */
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u64 ns = *(u64 *)skb->data;
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struct skb_shared_hwtstamps *ts;
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ts = skb_hwtstamps(skb);
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ts->hwtstamp = ns_to_ktime(ns);
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ts->syststamp = ptp_to_ktime(ns);
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__skb_pull(skb, 8);
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}
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skb->protocol = eth_type_trans(skb, netdev);
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netdev->stats.rx_packets++;
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netdev->stats.rx_bytes += skb->len;
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@ -661,18 +709,114 @@ static irqreturn_t octeon_mgmt_interrupt(int cpl, void *dev_id)
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return IRQ_HANDLED;
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}
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static int octeon_mgmt_ioctl_hwtstamp(struct net_device *netdev,
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struct ifreq *rq, int cmd)
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{
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struct octeon_mgmt *p = netdev_priv(netdev);
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struct hwtstamp_config config;
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union cvmx_mio_ptp_clock_cfg ptp;
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union cvmx_agl_gmx_rxx_frm_ctl rxx_frm_ctl;
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bool have_hw_timestamps = false;
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if (copy_from_user(&config, rq->ifr_data, sizeof(config)))
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return -EFAULT;
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if (config.flags) /* reserved for future extensions */
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return -EINVAL;
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/* Check the status of hardware for tiemstamps */
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if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
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/* Get the current state of the PTP clock */
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ptp.u64 = cvmx_read_csr(CVMX_MIO_PTP_CLOCK_CFG);
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if (!ptp.s.ext_clk_en) {
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/* The clock has not been configured to use an
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* external source. Program it to use the main clock
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* reference.
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*/
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u64 clock_comp = (NSEC_PER_SEC << 32) / octeon_get_io_clock_rate();
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if (!ptp.s.ptp_en)
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cvmx_write_csr(CVMX_MIO_PTP_CLOCK_COMP, clock_comp);
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pr_info("PTP Clock: Using sclk reference at %lld Hz\n",
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(NSEC_PER_SEC << 32) / clock_comp);
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} else {
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/* The clock is already programmed to use a GPIO */
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u64 clock_comp = cvmx_read_csr(CVMX_MIO_PTP_CLOCK_COMP);
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pr_info("PTP Clock: Using GPIO %d at %lld Hz\n",
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ptp.s.ext_clk_in,
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(NSEC_PER_SEC << 32) / clock_comp);
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}
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/* Enable the clock if it wasn't done already */
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if (!ptp.s.ptp_en) {
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ptp.s.ptp_en = 1;
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cvmx_write_csr(CVMX_MIO_PTP_CLOCK_CFG, ptp.u64);
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}
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have_hw_timestamps = true;
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}
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if (!have_hw_timestamps)
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return -EINVAL;
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switch (config.tx_type) {
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case HWTSTAMP_TX_OFF:
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case HWTSTAMP_TX_ON:
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break;
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default:
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return -ERANGE;
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}
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switch (config.rx_filter) {
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case HWTSTAMP_FILTER_NONE:
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p->has_rx_tstamp = false;
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rxx_frm_ctl.u64 = cvmx_read_csr(p->agl + AGL_GMX_RX_FRM_CTL);
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rxx_frm_ctl.s.ptp_mode = 0;
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cvmx_write_csr(p->agl + AGL_GMX_RX_FRM_CTL, rxx_frm_ctl.u64);
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break;
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case HWTSTAMP_FILTER_ALL:
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case HWTSTAMP_FILTER_SOME:
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case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
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case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
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case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
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case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
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case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
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case HWTSTAMP_FILTER_PTP_V2_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
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p->has_rx_tstamp = have_hw_timestamps;
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config.rx_filter = HWTSTAMP_FILTER_ALL;
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if (p->has_rx_tstamp) {
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rxx_frm_ctl.u64 = cvmx_read_csr(p->agl + AGL_GMX_RX_FRM_CTL);
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rxx_frm_ctl.s.ptp_mode = 1;
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cvmx_write_csr(p->agl + AGL_GMX_RX_FRM_CTL, rxx_frm_ctl.u64);
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}
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break;
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default:
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return -ERANGE;
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}
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if (copy_to_user(rq->ifr_data, &config, sizeof(config)))
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return -EFAULT;
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return 0;
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}
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static int octeon_mgmt_ioctl(struct net_device *netdev,
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struct ifreq *rq, int cmd)
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{
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struct octeon_mgmt *p = netdev_priv(netdev);
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if (!netif_running(netdev))
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switch (cmd) {
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case SIOCSHWTSTAMP:
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return octeon_mgmt_ioctl_hwtstamp(netdev, rq, cmd);
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default:
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if (p->phydev)
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return phy_mii_ioctl(p->phydev, rq, cmd);
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return -EINVAL;
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if (!p->phydev)
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return -EINVAL;
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return phy_mii_ioctl(p->phydev, rq, cmd);
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}
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}
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static void octeon_mgmt_disable_link(struct octeon_mgmt *p)
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@ -1052,6 +1196,7 @@ static int octeon_mgmt_open(struct net_device *netdev)
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/* Enable packet I/O. */
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rxx_frm_ctl.u64 = 0;
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rxx_frm_ctl.s.ptp_mode = p->has_rx_tstamp ? 1 : 0;
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rxx_frm_ctl.s.pre_align = 1;
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/*
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* When set, disables the length check for non-min sized pkts
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@ -1155,6 +1300,7 @@ static int octeon_mgmt_xmit(struct sk_buff *skb, struct net_device *netdev)
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int rv = NETDEV_TX_BUSY;
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re.d64 = 0;
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re.s.tstamp = ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) != 0);
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re.s.len = skb->len;
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re.s.addr = dma_map_single(p->dev, skb->data,
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skb->len,
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@ -1293,6 +1439,7 @@ static int __devinit octeon_mgmt_probe(struct platform_device *pdev)
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p->netdev = netdev;
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p->dev = &pdev->dev;
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p->has_rx_tstamp = false;
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data = of_get_property(pdev->dev.of_node, "cell-index", &len);
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if (data && len == sizeof(*data)) {
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