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sh: Reinstate ILSEL -> IRL intc mappings for SH-X3 proto CPU. 

In the multi-evt conversion for the SH-X3 proto CPU, IRLs were dropped
down to a single unique masking source, which ended up blowing up on
ILSEL-based IRQs which have special semantics that otherwise confuse the
intc code. While this does result in intc spewing about not having a
unique masking source, we don't really care.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2009-10-10 22:45:41 +09:00
parent 2a8bc92345
commit 3d4e0cfb33
1 changed files with 18 additions and 10 deletions
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28
arch/sh/kernel/cpu/sh4a/setup-shx3.c
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@ -268,7 +268,11 @@ enum {
UNUSED = 0,
/* interrupt sources */
IRL, IRQ0, IRQ1, IRQ2, IRQ3,
IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
IRL_HHLL, IRL_HHLH, IRL_HHHL,
IRQ0, IRQ1, IRQ2, IRQ3,
HUDII,
TMU0, TMU1, TMU2, TMU3, TMU4, TMU5,
PCII0, PCII1, PCII2, PCII3, PCII4,
@ -291,7 +295,7 @@ enum {
INTICI4, INTICI5, INTICI6, INTICI7,
/* interrupt groups */
PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
DMAC0, DMAC1,
};
@ -344,6 +348,10 @@ static struct intc_vect vectors[] __initdata = {
};
static struct intc_group groups[] __initdata = {
INTC_GROUP(IRL, IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
IRL_HHLL, IRL_HHLH, IRL_HHHL),
INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9),
INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
@ -419,14 +427,14 @@ static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups,
/* External interrupt pins in IRL mode */
static struct intc_vect vectors_irl[] __initdata = {
INTC_VECT(IRL, 0x200), INTC_VECT(IRL, 0x220),
INTC_VECT(IRL, 0x240), INTC_VECT(IRL, 0x260),
INTC_VECT(IRL, 0x280), INTC_VECT(IRL, 0x2a0),
INTC_VECT(IRL, 0x2c0), INTC_VECT(IRL, 0x2e0),
INTC_VECT(IRL, 0x300), INTC_VECT(IRL, 0x320),
INTC_VECT(IRL, 0x340), INTC_VECT(IRL, 0x360),
INTC_VECT(IRL, 0x380), INTC_VECT(IRL, 0x3a0),
INTC_VECT(IRL, 0x3c0),
INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0),
INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320),
INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360),
INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0),
INTC_VECT(IRL_HHHL, 0x3c0),
};
static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,