mirror of https://gitee.com/openkylin/linux.git
IB/hfi1: Use defines from common headers
Move FECN and BECN related defines to common header files Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Don Hiatt <don.hiatt@intel.com> Signed-off-by: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -331,12 +331,6 @@ struct diag_pkt {
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#define FULL_MGMT_P_KEY 0xFFFF
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#define DEFAULT_P_KEY LIM_MGMT_P_KEY
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#define HFI1_FECN_SHIFT 31
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#define HFI1_FECN_MASK 1
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#define HFI1_FECN_SMASK BIT(HFI1_FECN_SHIFT)
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#define HFI1_BECN_SHIFT 30
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#define HFI1_BECN_MASK 1
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#define HFI1_BECN_SMASK BIT(HFI1_BECN_SHIFT)
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/**
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* 0xF8 - 4 bits of multicast range and 1 bit for collective range
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@ -496,13 +496,13 @@ void hfi1_process_ecn_slowpath(struct rvt_qp *qp, struct hfi1_packet *pkt,
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sc = hfi1_9B_get_sc5(hdr, pkt->rhf);
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bth1 = be32_to_cpu(ohdr->bth[1]);
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if (do_cnp && (bth1 & HFI1_FECN_SMASK)) {
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if (do_cnp && (bth1 & IB_FECN_SMASK)) {
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u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]);
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return_cnp(ibp, qp, rqpn, pkey, dlid, rlid, sc, grh);
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}
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if (!is_mcast && (bth1 & HFI1_BECN_SMASK)) {
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if (!is_mcast && (bth1 & IB_BECN_SMASK)) {
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struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
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u32 lqpn = bth1 & RVT_QPN_MASK;
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u8 sl = ibp->sc_to_sl[sc];
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@ -635,7 +635,7 @@ static void __prescan_rxq(struct hfi1_packet *packet)
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}
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bth1 = be32_to_cpu(packet->ohdr->bth[1]);
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is_ecn = !!(bth1 & (HFI1_FECN_SMASK | HFI1_BECN_SMASK));
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is_ecn = !!(bth1 & (IB_FECN_SMASK | IB_BECN_SMASK));
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if (!is_ecn)
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goto next;
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@ -653,7 +653,7 @@ static void __prescan_rxq(struct hfi1_packet *packet)
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rcu_read_unlock();
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/* turn off BECN, FECN */
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bth1 &= ~(HFI1_FECN_SMASK | HFI1_BECN_SMASK);
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bth1 &= ~(IB_FECN_SMASK | IB_BECN_SMASK);
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packet->ohdr->bth[1] = cpu_to_be32(bth1);
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next:
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update_ps_mdata(&mdata, rcd);
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@ -1648,9 +1648,9 @@ static inline bool process_ecn(struct rvt_qp *qp, struct hfi1_packet *pkt,
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u32 bth1;
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bth1 = be32_to_cpu(ohdr->bth[1]);
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if (unlikely(bth1 & (HFI1_BECN_SMASK | HFI1_FECN_SMASK))) {
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if (unlikely(bth1 & (IB_BECN_SMASK | IB_FECN_SMASK))) {
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hfi1_process_ecn_slowpath(qp, pkt, do_cnp);
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return bth1 & HFI1_FECN_SMASK;
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return bth1 & IB_FECN_SMASK;
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}
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return false;
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}
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@ -773,7 +773,7 @@ void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp,
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hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
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ohdr->bth[0] = cpu_to_be32(bth0);
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ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
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ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << HFI1_BECN_SHIFT);
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ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << IB_BECN_SHIFT);
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ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
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/* Don't try to send ACKs if the link isn't ACTIVE */
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@ -775,7 +775,7 @@ void hfi1_make_ruc_header(struct rvt_qp *qp, struct ib_other_headers *ohdr,
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if (qp->s_flags & RVT_S_ECN) {
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qp->s_flags &= ~RVT_S_ECN;
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/* we recently received a FECN, so return a BECN */
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bth1 |= (HFI1_BECN_MASK << HFI1_BECN_SHIFT);
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bth1 |= (IB_BECN_MASK << IB_BECN_SHIFT);
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}
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ohdr->bth[1] = cpu_to_be32(bth1);
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ohdr->bth[2] = cpu_to_be32(bth2);
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@ -139,11 +139,11 @@ DECLARE_EVENT_CLASS(hfi1_ibhdr_template,
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__entry->pkey =
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be32_to_cpu(ohdr->bth[0]) & 0xffff;
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__entry->f =
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(be32_to_cpu(ohdr->bth[1]) >> HFI1_FECN_SHIFT) &
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HFI1_FECN_MASK;
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(be32_to_cpu(ohdr->bth[1]) >> IB_FECN_SHIFT) &
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IB_FECN_MASK;
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__entry->b =
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(be32_to_cpu(ohdr->bth[1]) >> HFI1_BECN_SHIFT) &
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HFI1_BECN_MASK;
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(be32_to_cpu(ohdr->bth[1]) >> IB_BECN_SHIFT) &
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IB_BECN_MASK;
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__entry->qpn =
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be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
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__entry->a =
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@ -537,7 +537,7 @@ void return_cnp(struct hfi1_ibport *ibp, struct rvt_qp *qp, u32 remote_qpn,
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bth0 = pkey | (IB_OPCODE_CNP << 24);
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ohdr->bth[0] = cpu_to_be32(bth0);
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ohdr->bth[1] = cpu_to_be32(remote_qpn | (1 << HFI1_BECN_SHIFT));
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ohdr->bth[1] = cpu_to_be32(remote_qpn | (1 << IB_BECN_SHIFT));
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ohdr->bth[2] = 0; /* PSN 0 */
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hdr.lrh[0] = cpu_to_be16(lrh0);
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@ -74,6 +74,12 @@
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#define IB_GRH_FLOW_MASK 0xFFFFF
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#define IB_GRH_FLOW_SHIFT 0
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#define IB_GRH_NEXT_HDR 0x1B
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#define IB_FECN_SHIFT 31
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#define IB_FECN_MASK 1
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#define IB_FECN_SMASK BIT(IB_FECN_SHIFT)
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#define IB_BECN_SHIFT 30
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#define IB_BECN_MASK 1
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#define IB_BECN_SMASK BIT(IB_BECN_SHIFT)
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#define IB_AETH_CREDIT_SHIFT 24
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#define IB_AETH_CREDIT_MASK 0x1F
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