mirror of https://gitee.com/openkylin/linux.git
drm/i915/gvt: let NOPID be the default value of force_to_nonpriv registers
Each ring has a NOPID register and currently they are regarded as default value of force_to_nonpriv registers in guest drivers Signed-off-by: Zhao Yan <yan.y.zhao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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@ -817,8 +817,15 @@ static int force_nonpriv_reg_handler(struct parser_exec_state *s,
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{
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struct intel_gvt *gvt = s->vgpu->gvt;
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unsigned int data = cmd_val(s, index + 1);
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u32 ring_base;
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u32 nopid;
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struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv;
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if (!intel_gvt_in_force_nonpriv_whitelist(gvt, data)) {
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ring_base = dev_priv->engine[s->ring_id]->mmio_base;
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nopid = i915_mmio_reg_offset(RING_NOPID(ring_base));
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if (!intel_gvt_in_force_nonpriv_whitelist(gvt, data) &&
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data != nopid) {
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gvt_err("Unexpected forcenonpriv 0x%x LRI write, value=0x%x\n",
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offset, data);
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return -EPERM;
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@ -474,21 +474,27 @@ static int force_nonpriv_write(struct intel_vgpu *vgpu,
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unsigned int offset, void *p_data, unsigned int bytes)
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{
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u32 reg_nonpriv = *(u32 *)p_data;
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int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset);
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u32 ring_base;
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struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
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int ret = -EINVAL;
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if ((bytes != 4) || ((offset & (bytes - 1)) != 0)) {
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gvt_err("vgpu(%d) Invalid FORCE_NONPRIV offset %x(%dB)\n",
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vgpu->id, offset, bytes);
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if ((bytes != 4) || ((offset & (bytes - 1)) != 0) || ring_id < 0) {
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gvt_err("vgpu(%d) ring %d Invalid FORCE_NONPRIV offset %x(%dB)\n",
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vgpu->id, ring_id, offset, bytes);
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return ret;
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}
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if (in_whitelist(reg_nonpriv)) {
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ring_base = dev_priv->engine[ring_id]->mmio_base;
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if (in_whitelist(reg_nonpriv) ||
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reg_nonpriv == i915_mmio_reg_offset(RING_NOPID(ring_base))) {
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ret = intel_vgpu_default_mmio_write(vgpu, offset, p_data,
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bytes);
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} else {
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gvt_err("vgpu(%d) Invalid FORCE_NONPRIV write %x\n",
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vgpu->id, reg_nonpriv);
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}
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} else
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gvt_err("vgpu(%d) Invalid FORCE_NONPRIV write %x at offset %x\n",
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vgpu->id, reg_nonpriv, offset);
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return ret;
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}
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