ARM: socfpga: dts: Add ethernet bindings for SOCFPGA

Add entry for 2nd GMAC controller. Add the correct clocks for the GMAC.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Olof Johansson <olof@lixom.net>
Cc: Pavel Machek <pavel@denx.de>
CC: <linux@arm.linux.org.uk>

v2:
- Moved "disabled" status to dtsi file
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Dinh Nguyen 2013-06-05 10:02:53 -05:00 committed by Olof Johansson
parent 6cd26ecedf
commit 3d954cf151
3 changed files with 34 additions and 2 deletions

View File

@ -23,6 +23,7 @@ / {
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
serial0 = &uart0;
serial1 = &uart1;
timer0 = &timer0;
@ -238,13 +239,26 @@ s2f_usr2_clk: s2f_usr2_clk {
};
};
gmac0: stmmac@ff700000 {
gmac0: ethernet@ff700000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
reg = <0xff700000 0x2000>;
interrupts = <0 115 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
phy-mode = "gmii";
clocks = <&emac0_clk>;
clock-names = "stmmaceth";
status = "disabled";
};
gmac1: ethernet@ff702000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
reg = <0xff702000 0x2000>;
interrupts = <0 120 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
clocks = <&emac1_clk>;
clock-names = "stmmaceth";
status = "disabled";
};
L2: l2-cache@fffef000 {

View File

@ -32,6 +32,13 @@ memory {
reg = <0x0 0x40000000>; /* 1GB */
};
aliases {
/* this allow the ethaddr uboot environmnet variable contents
* to be added to the gmac1 device tree blob.
*/
ethernet0 = &gmac1;
};
soc {
clkmgr@ffd04000 {
clocks {
@ -41,6 +48,12 @@ osc1 {
};
};
ethernet@ff702000 {
phy-mode = "rgmii";
phy-addr = <0xffffffff>; /* probe for phy addr */
status = "okay";
};
timer0@ffc08000 {
clock-frequency = <100000000>;
};

View File

@ -41,6 +41,11 @@ osc1 {
};
};
ethernet@ff700000 {
phy-mode = "gmii";
status = "okay";
};
timer0@ffc08000 {
clock-frequency = <7000000>;
};