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[POWERPC] 85xx: sbc8548 - Fix incorrect PCI-X and PCI interrupt map 

The following patch allows interrupts to occur on the
sbc8548. Currently PCI and PCI-X devices get assigned an IRQ
but the interrupt count never increases.  This solves the
problem and adds PCI support as well.

Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Jeremy McNicoll 2008-03-07 15:14:09 -05:00 committed by Kumar Gala
parent 6f913160fa
commit 3e0d65bf6d
1 changed files with 11 additions and 5 deletions
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16
arch/powerpc/boot/dts/sbc8548.dts
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@ -184,11 +184,17 @@ pci0: pci@e0008000 {
cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x01 (PCI-X slot) */
0x0800 0x0 0x0 0x1 &mpic 0x0 0x1
0x0800 0x0 0x0 0x2 &mpic 0x1 0x1
0x0800 0x0 0x0 0x3 &mpic 0x2 0x1
0x0800 0x0 0x0 0x4 &mpic 0x3 0x1>;
/* IDSEL 0x01 (PCI-X slot) @66MHz */
0x0800 0x0 0x0 0x1 &mpic 0x2 0x1
0x0800 0x0 0x0 0x2 &mpic 0x3 0x1
0x0800 0x0 0x0 0x3 &mpic 0x4 0x1
0x0800 0x0 0x0 0x4 &mpic 0x1 0x1
/* IDSEL 0x11 (PCI, 3.3V 32bit) @33MHz */
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1>;
interrupt-parent = <&mpic>;
interrupts = <0x18 0x2>;