mirror of https://gitee.com/openkylin/linux.git
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: Add in PCI bus for DMA API debugging. sh: Pre-allocate a reasonable number of DMA debug entries. sh: sh7786: modify usb setup timeout judgment bug. MAINTAINERS: Update sh architecture file patterns. sh: ap325: use edge control for ov772x camera sh: Plug in support for ARCH=sh64 using sh SRCARCH. sh: urquell: Fix up address mapping in board comments. sh: Add support for DMA API debugging. sh: Provide cpumask_of_pcibus() to fix NUMA build. sh: urquell: Add board comment sh: wire up sys_preadv/sys_pwritev() syscalls. sh: sh7785lcr: fix PCI address map for 32-bit mode sh: intc: Added resume from hibernation support to the intc
This commit is contained in:
Linus Torvalds
commit
3e862dd5c9
|
|
@ -5313,7 +5313,9 @@ L: linux-sh@vger.kernel.org
|
|||
W: http://www.linux-sh.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6.git
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||||
S: Supported
|
||||
F: Documentation/sh/
|
||||
F: arch/sh/
|
||||
F: drivers/sh/
|
||||
|
||||
SUSPEND TO RAM
|
||||
P: Len Brown
|
||||
|
|
|
|||
7
Makefile
7
Makefile
|
|
@ -169,7 +169,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
|
|||
-e s/arm.*/arm/ -e s/sa110/arm/ \
|
||||
-e s/s390x/s390/ -e s/parisc64/parisc/ \
|
||||
-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
|
||||
-e s/sh.*/sh/ )
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-e s/sh[234].*/sh/ )
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||||
|
||||
# Cross compiling and selecting different set of gcc/bin-utils
|
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# ---------------------------------------------------------------------------
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||||
|
|
@ -210,6 +210,11 @@ ifeq ($(ARCH),sparc64)
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|||
SRCARCH := sparc
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endif
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||||
|
||||
# Additional ARCH settings for sh
|
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ifeq ($(ARCH),sh64)
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SRCARCH := sh
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endif
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||||
|
||||
# Where to locate arch specific headers
|
||||
hdr-arch := $(SRCARCH)
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|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@ config SUPERH
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|||
select HAVE_GENERIC_DMA_COHERENT
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select HAVE_IOREMAP_PROT if MMU
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select HAVE_ARCH_TRACEHOOK
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select HAVE_DMA_API_DEBUG
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help
|
||||
The SuperH is a RISC processor targeted for use in embedded systems
|
||||
and consumer electronics; it was also used in the Sega Dreamcast
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||||
|
|
@ -21,7 +22,7 @@ config SUPERH
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|||
<http://www.linux-sh.org/>.
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||||
|
||||
config SUPERH32
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||||
def_bool !SUPERH64
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def_bool ARCH = "sh"
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||||
select HAVE_KPROBES
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select HAVE_KRETPROBES
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select HAVE_FUNCTION_TRACER
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|
|
@ -31,7 +32,7 @@ config SUPERH32
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select ARCH_HIBERNATION_POSSIBLE if MMU
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|
||||
config SUPERH64
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def_bool y if CPU_SH5
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def_bool ARCH = "sh64"
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||||
|
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config ARCH_DEFCONFIG
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string
|
||||
|
|
@ -187,6 +188,8 @@ config ARCH_SHMOBILE
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bool
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select ARCH_SUSPEND_POSSIBLE
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||||
|
||||
if SUPERH32
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||||
|
||||
choice
|
||||
prompt "Processor sub-type selection"
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||||
|
||||
|
|
@ -408,6 +411,15 @@ config CPU_SUBTYPE_SH7366
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select SYS_SUPPORTS_NUMA
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select SYS_SUPPORTS_CMT
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|
||||
endchoice
|
||||
|
||||
endif
|
||||
|
||||
if SUPERH64
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||||
|
||||
choice
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||||
prompt "Processor sub-type selection"
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||||
|
||||
# SH-5 Processor Support
|
||||
|
||||
config CPU_SUBTYPE_SH5_101
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||||
|
|
@ -420,6 +432,8 @@ config CPU_SUBTYPE_SH5_103
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|||
|
||||
endchoice
|
||||
|
||||
endif
|
||||
|
||||
source "arch/sh/mm/Kconfig"
|
||||
|
||||
source "arch/sh/Kconfig.cpu"
|
||||
|
|
|
|||
|
|
@ -349,6 +349,7 @@ static int ov7725_power(struct device *dev, int mode)
|
|||
static struct ov772x_camera_info ov7725_info = {
|
||||
.buswidth = SOCAM_DATAWIDTH_8,
|
||||
.flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
|
||||
.edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
|
||||
.link = {
|
||||
.power = ov7725_power,
|
||||
},
|
||||
|
|
|
|||
|
|
@ -2,6 +2,8 @@
|
|||
* Renesas Technology Corp. SH7786 Urquell Support.
|
||||
*
|
||||
* Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
|
||||
*
|
||||
* Based on board-sh7785lcr.c
|
||||
* Copyright (C) 2008 Yoshihiro Shimoda
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
|
|
@ -21,6 +23,32 @@
|
|||
#include <asm/heartbeat.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
/*
|
||||
* bit 1234 5678
|
||||
*----------------------------
|
||||
* SW1 0101 0010 -> Pck 33MHz version
|
||||
* (1101 0010) Pck 66MHz version
|
||||
* SW2 0x1x xxxx -> little endian
|
||||
* 29bit mode
|
||||
* SW47 0001 1000 -> CS0 : on-board flash
|
||||
* CS1 : SRAM, registers, LAN, PCMCIA
|
||||
* 38400 bps for SCIF1
|
||||
*
|
||||
* Address
|
||||
* 0x00000000 - 0x04000000 (CS0) Nor Flash
|
||||
* 0x04000000 - 0x04200000 (CS1) SRAM
|
||||
* 0x05000000 - 0x05800000 (CS1) on board register
|
||||
* 0x05800000 - 0x06000000 (CS1) LAN91C111
|
||||
* 0x06000000 - 0x06400000 (CS1) PCMCIA
|
||||
* 0x08000000 - 0x10000000 (CS2-CS3) DDR3
|
||||
* 0x10000000 - 0x14000000 (CS4) PCIe
|
||||
* 0x14000000 - 0x14800000 (CS5) Core0 LRAM/URAM
|
||||
* 0x14800000 - 0x15000000 (CS5) Core1 LRAM/URAM
|
||||
* 0x18000000 - 0x1C000000 (CS6) ATA/NAND-Flash
|
||||
* 0x1C000000 - (CS7) SH7786 Control register
|
||||
*/
|
||||
|
||||
/* HeartBeat */
|
||||
static struct resource heartbeat_resources[] = {
|
||||
[0] = {
|
||||
.start = BOARDREG(SLEDR),
|
||||
|
|
@ -43,6 +71,7 @@ static struct platform_device heartbeat_device = {
|
|||
.resource = heartbeat_resources,
|
||||
};
|
||||
|
||||
/* LAN91C111 */
|
||||
static struct smc91x_platdata smc91x_info = {
|
||||
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
|
||||
};
|
||||
|
|
@ -69,6 +98,7 @@ static struct platform_device smc91x_eth_device = {
|
|||
},
|
||||
};
|
||||
|
||||
/* Nor Flash */
|
||||
static struct mtd_partition nor_flash_partitions[] = {
|
||||
{
|
||||
.name = "loader",
|
||||
|
|
|
|||
|
|
@ -48,8 +48,13 @@ EXPORT_SYMBOL(board_pci_channels);
|
|||
|
||||
static struct sh4_pci_address_map sh7785_pci_map = {
|
||||
.window0 = {
|
||||
#if defined(CONFIG_32BIT)
|
||||
.base = SH7780_32BIT_DDR_BASE_ADDR,
|
||||
.size = 0x40000000,
|
||||
#else
|
||||
.base = SH7780_CS0_BASE_ADDR,
|
||||
.size = 0x20000000,
|
||||
#endif
|
||||
},
|
||||
|
||||
.flags = SH4_PCIC_NO_RESET,
|
||||
|
|
|
|||
|
|
@ -104,6 +104,8 @@
|
|||
#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE)
|
||||
#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE)
|
||||
|
||||
#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000
|
||||
|
||||
struct sh4_pci_address_map;
|
||||
|
||||
/* arch/sh/drivers/pci/pci-sh7780.c */
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/dma-debug.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
static int __init pcibios_init(void)
|
||||
|
|
@ -43,6 +44,8 @@ static int __init pcibios_init(void)
|
|||
|
||||
pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
|
||||
|
||||
dma_debug_add_bus(&pci_bus_type);
|
||||
|
||||
return 0;
|
||||
}
|
||||
subsys_initcall(pcibios_init);
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/dma-debug.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm-generic/dma-coherent.h>
|
||||
|
|
@ -38,16 +39,26 @@ static inline dma_addr_t dma_map_single(struct device *dev,
|
|||
void *ptr, size_t size,
|
||||
enum dma_data_direction dir)
|
||||
{
|
||||
dma_addr_t addr = virt_to_phys(ptr);
|
||||
|
||||
#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
|
||||
if (dev->bus == &pci_bus_type)
|
||||
return virt_to_phys(ptr);
|
||||
return addr;
|
||||
#endif
|
||||
dma_cache_sync(dev, ptr, size, dir);
|
||||
|
||||
return virt_to_phys(ptr);
|
||||
debug_dma_map_page(dev, virt_to_page(ptr),
|
||||
(unsigned long)ptr & ~PAGE_MASK, size,
|
||||
dir, addr, true);
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
#define dma_unmap_single(dev, addr, size, dir) do { } while (0)
|
||||
static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
|
||||
size_t size, enum dma_data_direction dir)
|
||||
{
|
||||
debug_dma_unmap_page(dev, addr, size, dir, true);
|
||||
}
|
||||
|
||||
static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir)
|
||||
|
|
@ -59,12 +70,19 @@ static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
|
|||
dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
|
||||
#endif
|
||||
sg[i].dma_address = sg_phys(&sg[i]);
|
||||
sg[i].dma_length = sg[i].length;
|
||||
}
|
||||
|
||||
debug_dma_map_sg(dev, sg, nents, i, dir);
|
||||
|
||||
return nents;
|
||||
}
|
||||
|
||||
#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0)
|
||||
static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir)
|
||||
{
|
||||
debug_dma_unmap_sg(dev, sg, nents, dir);
|
||||
}
|
||||
|
||||
static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
|
|
@ -111,6 +129,7 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
|
|||
dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
|
||||
#endif
|
||||
sg[i].dma_address = sg_phys(&sg[i]);
|
||||
sg[i].dma_length = sg[i].length;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -119,6 +138,7 @@ static inline void dma_sync_single_for_cpu(struct device *dev,
|
|||
enum dma_data_direction dir)
|
||||
{
|
||||
dma_sync_single(dev, dma_handle, size, dir);
|
||||
debug_dma_sync_single_for_cpu(dev, dma_handle, size, dir);
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_for_device(struct device *dev,
|
||||
|
|
@ -127,6 +147,7 @@ static inline void dma_sync_single_for_device(struct device *dev,
|
|||
enum dma_data_direction dir)
|
||||
{
|
||||
dma_sync_single(dev, dma_handle, size, dir);
|
||||
debug_dma_sync_single_for_device(dev, dma_handle, size, dir);
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_range_for_cpu(struct device *dev,
|
||||
|
|
@ -136,6 +157,8 @@ static inline void dma_sync_single_range_for_cpu(struct device *dev,
|
|||
enum dma_data_direction direction)
|
||||
{
|
||||
dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
|
||||
debug_dma_sync_single_range_for_cpu(dev, dma_handle,
|
||||
offset, size, direction);
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_range_for_device(struct device *dev,
|
||||
|
|
@ -145,6 +168,8 @@ static inline void dma_sync_single_range_for_device(struct device *dev,
|
|||
enum dma_data_direction direction)
|
||||
{
|
||||
dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
|
||||
debug_dma_sync_single_range_for_device(dev, dma_handle,
|
||||
offset, size, direction);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -153,6 +178,7 @@ static inline void dma_sync_sg_for_cpu(struct device *dev,
|
|||
enum dma_data_direction dir)
|
||||
{
|
||||
dma_sync_sg(dev, sg, nelems, dir);
|
||||
debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
|
||||
}
|
||||
|
||||
static inline void dma_sync_sg_for_device(struct device *dev,
|
||||
|
|
@ -160,9 +186,9 @@ static inline void dma_sync_sg_for_device(struct device *dev,
|
|||
enum dma_data_direction dir)
|
||||
{
|
||||
dma_sync_sg(dev, sg, nelems, dir);
|
||||
debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
|
||||
}
|
||||
|
||||
|
||||
static inline int dma_get_cache_alignment(void)
|
||||
{
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -8,9 +8,10 @@ struct scatterlist {
|
|||
unsigned long sg_magic;
|
||||
#endif
|
||||
unsigned long page_link;
|
||||
unsigned int offset;/* for highmem, page offset */
|
||||
dma_addr_t dma_address;
|
||||
unsigned int offset; /* for highmem, page offset */
|
||||
unsigned int length;
|
||||
dma_addr_t dma_address;
|
||||
unsigned int dma_length;
|
||||
};
|
||||
|
||||
#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK
|
||||
|
|
|
|||
|
|
@ -37,8 +37,11 @@
|
|||
#define pcibus_to_node(bus) ((void)(bus), -1)
|
||||
#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \
|
||||
CPU_MASK_ALL : \
|
||||
node_to_cpumask(pcibus_to_node(bus)) \
|
||||
)
|
||||
node_to_cpumask(pcibus_to_node(bus)))
|
||||
#define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \
|
||||
CPU_MASK_ALL_PTR : \
|
||||
cpumask_of_node(pcibus_to_node(bus)))
|
||||
|
||||
#endif
|
||||
|
||||
#include <asm-generic/topology.h>
|
||||
|
|
|
|||
|
|
@ -341,8 +341,10 @@
|
|||
#define __NR_dup3 330
|
||||
#define __NR_pipe2 331
|
||||
#define __NR_inotify_init1 332
|
||||
#define __NR_preadv 333
|
||||
#define __NR_pwritev 334
|
||||
|
||||
#define NR_syscalls 333
|
||||
#define NR_syscalls 335
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
|
|
|
|||
|
|
@ -381,10 +381,12 @@
|
|||
#define __NR_dup3 358
|
||||
#define __NR_pipe2 359
|
||||
#define __NR_inotify_init1 360
|
||||
#define __NR_preadv 361
|
||||
#define __NR_pwritev 362
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define NR_syscalls 361
|
||||
#define NR_syscalls 363
|
||||
|
||||
#define __ARCH_WANT_IPC_PARSE_VERSION
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
|
|
|
|||
|
|
@ -143,14 +143,14 @@ static void __init sh7786_usb_setup(void)
|
|||
* Set the PHY and PLL enable bit
|
||||
*/
|
||||
__raw_writel(PHY_ENB | PLL_ENB, USBPCTL1);
|
||||
while (i-- &&
|
||||
((__raw_readl(USBST) & ACT_PLL_STATUS) != ACT_PLL_STATUS))
|
||||
cpu_relax();
|
||||
|
||||
if (i) {
|
||||
while (i--) {
|
||||
if (ACT_PLL_STATUS == (__raw_readl(USBST) & ACT_PLL_STATUS)) {
|
||||
/* Set the PHY RST bit */
|
||||
__raw_writel(PHY_ENB | PLL_ENB | PHY_RST, USBPCTL1);
|
||||
printk(KERN_INFO "sh7786 usb setup done\n");
|
||||
break;
|
||||
}
|
||||
cpu_relax();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -349,3 +349,5 @@ ENTRY(sys_call_table)
|
|||
.long sys_dup3 /* 330 */
|
||||
.long sys_pipe2
|
||||
.long sys_inotify_init1
|
||||
.long sys_preadv
|
||||
.long sys_writev
|
||||
|
|
|
|||
|
|
@ -387,3 +387,5 @@ sys_call_table:
|
|||
.long sys_dup3
|
||||
.long sys_pipe2
|
||||
.long sys_inotify_init1 /* 360 */
|
||||
.long sys_preadv
|
||||
.long sys_pwritev
|
||||
|
|
|
|||
|
|
@ -10,11 +10,22 @@
|
|||
* for more details.
|
||||
*/
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/dma-debug.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#define PREALLOC_DMA_DEBUG_ENTRIES 4096
|
||||
|
||||
static int __init dma_init(void)
|
||||
{
|
||||
dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
|
||||
return 0;
|
||||
}
|
||||
fs_initcall(dma_init);
|
||||
|
||||
void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t gfp)
|
||||
|
|
@ -45,6 +56,9 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
|
|||
split_page(pfn_to_page(virt_to_phys(ret) >> PAGE_SHIFT), order);
|
||||
|
||||
*dma_handle = virt_to_phys(ret);
|
||||
|
||||
debug_dma_alloc_coherent(dev, size, *dma_handle, ret_nocache);
|
||||
|
||||
return ret_nocache;
|
||||
}
|
||||
EXPORT_SYMBOL(dma_alloc_coherent);
|
||||
|
|
@ -56,12 +70,15 @@ void dma_free_coherent(struct device *dev, size_t size,
|
|||
unsigned long pfn = dma_handle >> PAGE_SHIFT;
|
||||
int k;
|
||||
|
||||
if (!dma_release_from_coherent(dev, order, vaddr)) {
|
||||
WARN_ON(irqs_disabled()); /* for portability */
|
||||
|
||||
if (dma_release_from_coherent(dev, order, vaddr))
|
||||
return;
|
||||
|
||||
debug_dma_free_coherent(dev, size, vaddr, dma_handle);
|
||||
for (k = 0; k < (1 << order); k++)
|
||||
__free_pages(pfn_to_page(pfn + k), 0);
|
||||
iounmap(vaddr);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(dma_free_coherent);
|
||||
|
||||
|
|
|
|||
|
|
@ -44,6 +44,7 @@ struct intc_handle_int {
|
|||
struct intc_desc_int {
|
||||
struct list_head list;
|
||||
struct sys_device sysdev;
|
||||
pm_message_t state;
|
||||
unsigned long *reg;
|
||||
#ifdef CONFIG_SMP
|
||||
unsigned long *smp;
|
||||
|
|
@ -786,18 +787,44 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state)
|
|||
/* get intc controller associated with this sysdev */
|
||||
d = container_of(dev, struct intc_desc_int, sysdev);
|
||||
|
||||
switch (state.event) {
|
||||
case PM_EVENT_ON:
|
||||
if (d->state.event != PM_EVENT_FREEZE)
|
||||
break;
|
||||
for_each_irq_desc(irq, desc) {
|
||||
if (desc->chip != &d->chip)
|
||||
continue;
|
||||
if (desc->status & IRQ_DISABLED)
|
||||
intc_disable(irq);
|
||||
else
|
||||
intc_enable(irq);
|
||||
}
|
||||
break;
|
||||
case PM_EVENT_FREEZE:
|
||||
/* nothing has to be done */
|
||||
break;
|
||||
case PM_EVENT_SUSPEND:
|
||||
/* enable wakeup irqs belonging to this intc controller */
|
||||
for_each_irq_desc(irq, desc) {
|
||||
if ((desc->status & IRQ_WAKEUP) && (desc->chip == &d->chip))
|
||||
intc_enable(irq);
|
||||
}
|
||||
break;
|
||||
}
|
||||
d->state = state;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int intc_resume(struct sys_device *dev)
|
||||
{
|
||||
return intc_suspend(dev, PMSG_ON);
|
||||
}
|
||||
|
||||
static struct sysdev_class intc_sysdev_class = {
|
||||
.name = "intc",
|
||||
.suspend = intc_suspend,
|
||||
.resume = intc_resume,
|
||||
};
|
||||
|
||||
/* register this intc as sysdev to allow suspend/resume */
|
||||
|
|
|
|||
Loading…
Reference in New Issue