mirror of https://gitee.com/openkylin/linux.git
smc91x: introduce platform data flags V2
This patch introduces struct smc91x_platdata and modifies the driver so bus width is checked during run time using SMC_nBIT() instead of SMC_CAN_USE_nBIT. V2 keeps static configuration lean using SMC_DYNAMIC_BUS_CONFIG. Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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cfdfa86536
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3e94794355
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@ -1997,6 +1997,8 @@ static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
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static int smc_enable_device(struct platform_device *pdev)
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{
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct smc_local *lp = netdev_priv(ndev);
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unsigned long flags;
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unsigned char ecor, ecsr;
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void __iomem *addr;
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@ -2039,7 +2041,7 @@ static int smc_enable_device(struct platform_device *pdev)
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* Set the appropriate byte/word mode.
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*/
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ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
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if (!SMC_CAN_USE_16BIT)
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if (!SMC_16BIT(lp))
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ecsr |= ECSR_IOIS8;
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writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
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local_irq_restore(flags);
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@ -2124,10 +2126,11 @@ static void smc_release_datacs(struct platform_device *pdev, struct net_device *
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*/
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static int smc_drv_probe(struct platform_device *pdev)
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{
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struct smc91x_platdata *pd = pdev->dev.platform_data;
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struct smc_local *lp;
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struct net_device *ndev;
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struct resource *res, *ires;
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unsigned int __iomem *addr;
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unsigned long irq_flags = SMC_IRQ_FLAGS;
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int ret;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
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@ -2152,6 +2155,27 @@ static int smc_drv_probe(struct platform_device *pdev)
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}
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SET_NETDEV_DEV(ndev, &pdev->dev);
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/* get configuration from platform data, only allow use of
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* bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
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*/
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lp = netdev_priv(ndev);
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lp->cfg.irq_flags = SMC_IRQ_FLAGS;
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#ifdef SMC_DYNAMIC_BUS_CONFIG
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if (pd)
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memcpy(&lp->cfg, pd, sizeof(lp->cfg));
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else {
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lp->cfg.flags = SMC91X_USE_8BIT;
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lp->cfg.flags |= SMC91X_USE_16BIT;
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lp->cfg.flags |= SMC91X_USE_32BIT;
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}
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lp->cfg.flags &= ~(SMC_CAN_USE_8BIT ? 0 : SMC91X_USE_8BIT);
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lp->cfg.flags &= ~(SMC_CAN_USE_16BIT ? 0 : SMC91X_USE_16BIT);
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lp->cfg.flags &= ~(SMC_CAN_USE_32BIT ? 0 : SMC91X_USE_32BIT);
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#endif
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ndev->dma = (unsigned char)-1;
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ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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@ -2162,7 +2186,7 @@ static int smc_drv_probe(struct platform_device *pdev)
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ndev->irq = ires->start;
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if (SMC_IRQ_FLAGS == -1)
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irq_flags = ires->flags & IRQF_TRIGGER_MASK;
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lp->cfg.irq_flags = ires->flags & IRQF_TRIGGER_MASK;
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ret = smc_request_attrib(pdev);
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if (ret)
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@ -2170,6 +2194,7 @@ static int smc_drv_probe(struct platform_device *pdev)
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#if defined(CONFIG_SA1100_ASSABET)
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NCR_0 |= NCR_ENET_OSC_EN;
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#endif
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platform_set_drvdata(pdev, ndev);
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ret = smc_enable_device(pdev);
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if (ret)
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goto out_release_attrib;
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@ -2188,8 +2213,7 @@ static int smc_drv_probe(struct platform_device *pdev)
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}
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#endif
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platform_set_drvdata(pdev, ndev);
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ret = smc_probe(ndev, addr, irq_flags);
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ret = smc_probe(ndev, addr, lp->cfg.irq_flags);
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if (ret != 0)
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goto out_iounmap;
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@ -34,6 +34,7 @@
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#ifndef _SMC91X_H_
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#define _SMC91X_H_
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#include <linux/smc91x.h>
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/*
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* Define your architecture specific bus configuration parameters here.
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@ -481,6 +482,7 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
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#define RPC_LSA_DEFAULT RPC_LED_100_10
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#define RPC_LSB_DEFAULT RPC_LED_TX_RX
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#define SMC_DYNAMIC_BUS_CONFIG
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#endif
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@ -526,8 +528,19 @@ struct smc_local {
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#endif
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void __iomem *base;
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void __iomem *datacs;
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struct smc91x_platdata cfg;
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};
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#ifdef SMC_DYNAMIC_BUS_CONFIG
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#define SMC_8BIT(p) (((p)->cfg.flags & SMC91X_USE_8BIT) && SMC_CAN_USE_8BIT)
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#define SMC_16BIT(p) (((p)->cfg.flags & SMC91X_USE_16BIT) && SMC_CAN_USE_16BIT)
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#define SMC_32BIT(p) (((p)->cfg.flags & SMC91X_USE_32BIT) && SMC_CAN_USE_32BIT)
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#else
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#define SMC_8BIT(p) SMC_CAN_USE_8BIT
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#define SMC_16BIT(p) SMC_CAN_USE_16BIT
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#define SMC_32BIT(p) SMC_CAN_USE_32BIT
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#endif
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#ifdef SMC_USE_PXA_DMA
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/*
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@ -1108,41 +1121,41 @@ static const char * chip_ids[ 16 ] = {
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*
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* Enforce it on any 32-bit capable setup for now.
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*/
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#define SMC_MUST_ALIGN_WRITE SMC_CAN_USE_32BIT
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#define SMC_MUST_ALIGN_WRITE(lp) SMC_32BIT(lp)
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#define SMC_GET_PN(lp) \
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(SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, PN_REG(lp))) \
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(SMC_8BIT(lp) ? (SMC_inb(ioaddr, PN_REG(lp))) \
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: (SMC_inw(ioaddr, PN_REG(lp)) & 0xFF))
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#define SMC_SET_PN(lp, x) \
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do { \
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if (SMC_MUST_ALIGN_WRITE) \
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if (SMC_MUST_ALIGN_WRITE(lp)) \
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SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 0, 2)); \
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else if (SMC_CAN_USE_8BIT) \
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else if (SMC_8BIT(lp)) \
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SMC_outb(x, ioaddr, PN_REG(lp)); \
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else \
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SMC_outw(x, ioaddr, PN_REG(lp)); \
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} while (0)
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#define SMC_GET_AR(lp) \
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(SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, AR_REG(lp))) \
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(SMC_8BIT(lp) ? (SMC_inb(ioaddr, AR_REG(lp))) \
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: (SMC_inw(ioaddr, PN_REG(lp)) >> 8))
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#define SMC_GET_TXFIFO(lp) \
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(SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
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(SMC_8BIT(lp) ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
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: (SMC_inw(ioaddr, TXFIFO_REG(lp)) & 0xFF))
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#define SMC_GET_RXFIFO(lp) \
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(SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
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(SMC_8BIT(lp) ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
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: (SMC_inw(ioaddr, TXFIFO_REG(lp)) >> 8))
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#define SMC_GET_INT(lp) \
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(SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, INT_REG(lp))) \
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(SMC_8BIT(lp) ? (SMC_inb(ioaddr, INT_REG(lp))) \
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: (SMC_inw(ioaddr, INT_REG(lp)) & 0xFF))
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#define SMC_ACK_INT(lp, x) \
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do { \
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if (SMC_CAN_USE_8BIT) \
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if (SMC_8BIT(lp)) \
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SMC_outb(x, ioaddr, INT_REG(lp)); \
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else { \
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unsigned long __flags; \
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@ -1155,12 +1168,12 @@ static const char * chip_ids[ 16 ] = {
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} while (0)
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#define SMC_GET_INT_MASK(lp) \
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(SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, IM_REG(lp))) \
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(SMC_8BIT(lp) ? (SMC_inb(ioaddr, IM_REG(lp))) \
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: (SMC_inw(ioaddr, INT_REG(lp)) >> 8))
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#define SMC_SET_INT_MASK(lp, x) \
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do { \
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if (SMC_CAN_USE_8BIT) \
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if (SMC_8BIT(lp)) \
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SMC_outb(x, ioaddr, IM_REG(lp)); \
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else \
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SMC_outw((x) << 8, ioaddr, INT_REG(lp)); \
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@ -1170,7 +1183,7 @@ static const char * chip_ids[ 16 ] = {
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#define SMC_SELECT_BANK(lp, x) \
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do { \
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if (SMC_MUST_ALIGN_WRITE) \
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if (SMC_MUST_ALIGN_WRITE(lp)) \
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SMC_outl((x)<<16, ioaddr, 12<<SMC_IO_SHIFT); \
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else \
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SMC_outw(x, ioaddr, BANK_SELECT); \
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@ -1208,7 +1221,7 @@ static const char * chip_ids[ 16 ] = {
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#define SMC_SET_PTR(lp, x) \
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do { \
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if (SMC_MUST_ALIGN_WRITE) \
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if (SMC_MUST_ALIGN_WRITE(lp)) \
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SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 4, 2)); \
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else \
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SMC_outw(x, ioaddr, PTR_REG(lp)); \
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@ -1226,7 +1239,7 @@ static const char * chip_ids[ 16 ] = {
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#define SMC_SET_RPC(lp, x) \
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do { \
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if (SMC_MUST_ALIGN_WRITE) \
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if (SMC_MUST_ALIGN_WRITE(lp)) \
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SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 0)); \
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else \
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SMC_outw(x, ioaddr, RPC_REG(lp)); \
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@ -1267,7 +1280,7 @@ static const char * chip_ids[ 16 ] = {
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#define SMC_PUT_PKT_HDR(lp, status, length) \
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do { \
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if (SMC_CAN_USE_32BIT) \
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if (SMC_32BIT(lp)) \
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SMC_outl((status) | (length)<<16, ioaddr, \
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DATA_REG(lp)); \
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else { \
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@ -1278,7 +1291,7 @@ static const char * chip_ids[ 16 ] = {
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#define SMC_GET_PKT_HDR(lp, status, length) \
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do { \
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if (SMC_CAN_USE_32BIT) { \
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if (SMC_32BIT(lp)) { \
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unsigned int __val = SMC_inl(ioaddr, DATA_REG(lp)); \
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(status) = __val & 0xffff; \
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(length) = __val >> 16; \
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@ -1290,7 +1303,7 @@ static const char * chip_ids[ 16 ] = {
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#define SMC_PUSH_DATA(lp, p, l) \
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do { \
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if (SMC_CAN_USE_32BIT) { \
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if (SMC_32BIT(lp)) { \
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void *__ptr = (p); \
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int __len = (l); \
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void __iomem *__ioaddr = ioaddr; \
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SMC_outw(*((u16 *)__ptr), ioaddr, \
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DATA_REG(lp)); \
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} \
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} else if (SMC_CAN_USE_16BIT) \
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} else if (SMC_16BIT(lp)) \
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SMC_outsw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
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else if (SMC_CAN_USE_8BIT) \
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else if (SMC_8BIT(lp)) \
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SMC_outsb(ioaddr, DATA_REG(lp), p, l); \
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} while (0)
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#define SMC_PULL_DATA(lp, p, l) \
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do { \
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if (SMC_CAN_USE_32BIT) { \
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if (SMC_32BIT(lp)) { \
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void *__ptr = (p); \
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int __len = (l); \
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void __iomem *__ioaddr = ioaddr; \
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__ioaddr = lp->datacs; \
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__len += 2; \
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SMC_insl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
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} else if (SMC_CAN_USE_16BIT) \
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} else if (SMC_16BIT(lp)) \
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SMC_insw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
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else if (SMC_CAN_USE_8BIT) \
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else if (SMC_8BIT(lp)) \
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SMC_insb(ioaddr, DATA_REG(lp), p, l); \
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} while (0)
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@ -0,0 +1,13 @@
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#ifndef __SMC91X_H__
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#define __SMC91X_H__
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#define SMC91X_USE_8BIT (1 << 0)
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#define SMC91X_USE_16BIT (1 << 1)
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#define SMC91X_USE_32BIT (1 << 2)
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struct smc91x_platdata {
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unsigned long flags;
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unsigned long irq_flags; /* IRQF_... */
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};
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#endif /* __SMC91X_H__ */
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