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ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs
Newer bitfiles needs the reduced clk even for SMP builds Cc: <stable@vger.kernel.org> #4.2 Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -402,6 +402,8 @@ static void __init axs103_early_init(void)
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unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
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if (num_cores > 2)
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arc_set_core_freq(50 * 1000000);
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else if (num_cores == 2)
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arc_set_core_freq(75 * 1000000);
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#endif
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switch (arc_get_core_freq()/1000000) {
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