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arm64: dts: renesas: r8a77995: Add cpg reset for DU 

Add CPG reset properties to DU node of D3 (r8a77995) SoC.

According to Laurent Pinchart, R-Car Gen3 reset is handled at the group
level so specifying one reset entry per group is sufficient.

This patch was inspired by a patch in the BSP by
Takeshi Kihara <takeshi.kihara.df@renesas.com>.

Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Yoshihiro Kaneko 2019-06-24 12:52:24 +02:00 committed by Geert Uytterhoeven
parent 4193a39240
commit 3ed1db9071
1 changed files with 2 additions and 0 deletions
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arch/arm64/boot/dts/renesas/r8a77995.dtsi
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@ -1001,6 +1001,8 @@ du: display@feb00000 {
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
resets = <&cpg 724>;
reset-names = "du.0";
vsps = <&vspd0 0 &vspd1 0>;
status = "disabled";