mirror of https://gitee.com/openkylin/linux.git
Revert "powerpc/83xx: gianfar_ptp: select 1588 clock source through dts file"
This reverts commit 894116bd0e
.
I applied the wrong version of this patch, correct
version coming up.
Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -86,7 +86,6 @@ General Properties:
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Clock Properties:
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- fsl,cksel Timer reference clock source.
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- fsl,tclk-period Timer reference clock period in nanoseconds.
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- fsl,tmr-prsc Prescaler, divides the output clock.
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- fsl,tmr-add Frequency compensation value.
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@ -98,7 +97,7 @@ Clock Properties:
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clock. You must choose these carefully for the clock to work right.
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Here is how to figure good values:
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TimerOsc = selected reference clock MHz
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TimerOsc = system clock MHz
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tclk_period = desired clock period nanoseconds
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NominalFreq = 1000 / tclk_period MHz
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FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
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@ -115,18 +114,6 @@ Clock Properties:
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Pulse Per Second (PPS) signal, since this will be offered to the PPS
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subsystem to synchronize the Linux clock.
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"fsl,cksel" property allows to select different reference clock
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sources:
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<0> - external high precision timer reference clock (TSEC_TMR_CLK
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input is used for this purpose);
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<1> - eTSEC system clock;
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<2> - eTSEC1 transmit clock;
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<3> - RTC clock input.
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When this attribute is not used, eTSEC system clock will serve as
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IEEE 1588 timer reference clock.
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Example:
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ptp_clock@24E00 {
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@ -134,7 +121,6 @@ Example:
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reg = <0x24E00 0xB0>;
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interrupts = <12 0x8 13 0x8>;
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interrupt-parent = < &ipic >;
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fsl,cksel = <1>;
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fsl,tclk-period = <10>;
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fsl,tmr-prsc = <100>;
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fsl,tmr-add = <0x999999A4>;
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@ -452,9 +452,7 @@ static int gianfar_ptp_probe(struct platform_device *dev)
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err = -ENODEV;
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etsects->caps = ptp_gianfar_caps;
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if (get_of_u32(node, "fsl,cksel", &etsects->cksel))
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etsects->cksel = DEFAULT_CKSEL;
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etsects->cksel = DEFAULT_CKSEL;
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if (get_of_u32(node, "fsl,tclk-period", &etsects->tclk_period) ||
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get_of_u32(node, "fsl,tmr-prsc", &etsects->tmr_prsc) ||
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