arm64: dts: ls1043a: add cpu idle support

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Yuantian Tang 2018-02-08 15:54:35 +08:00 committed by Shawn Guo
parent 9b4eefcb70
commit 3fd366d8cb
1 changed files with 21 additions and 0 deletions

View File

@ -81,6 +81,7 @@ cpu0: cpu@0 {
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
cpu-idle-states = <&CPU_PH20>;
};
cpu1: cpu@1 {
@ -89,6 +90,7 @@ cpu1: cpu@1 {
reg = <0x1>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
};
cpu2: cpu@2 {
@ -97,6 +99,7 @@ cpu2: cpu@2 {
reg = <0x2>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
};
cpu3: cpu@3 {
@ -105,6 +108,7 @@ cpu3: cpu@3 {
reg = <0x3>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
};
l2: l2-cache {
@ -112,6 +116,23 @@ l2: l2-cache {
};
};
idle-states {
/*
* PSCI node is not added default, U-boot will add missing
* parts if it determines to use PSCI.
*/
entry-method = "arm,psci";
CPU_PH20: cpu-ph20 {
compatible = "arm,idle-state";
idle-state-name = "PH20";
arm,psci-suspend-param = <0x00010000>;
entry-latency-us = <1000>;
exit-latency-us = <1000>;
min-residency-us = <3000>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0 0x80000000>;