mirror of https://gitee.com/openkylin/linux.git
[PATCH] OneNAND: Add simulator
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Kyungmin Park
Thomas Gleixner
parent
fcc31470c4
commit
405c829f98
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@ -35,4 +35,11 @@ config MTD_ONENAND_SYNC_READ
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help
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This enables support for Sync. Burst Read.
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config MTD_ONENAND_SIM
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tristate "Support for OneNAND flash simulator"
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depends on MTD_ONENAND
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help
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The simulator may simulate verious OneNAND flash chips for the
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MTD onenand layer.
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endmenu
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@ -8,4 +8,7 @@ obj-$(CONFIG_MTD_ONENAND) += onenand.o
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# Board specific.
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obj-$(CONFIG_MTD_ONENAND_OMAP) += omap-onenand.o
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# Simulator
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obj-$(CONFIG_MTD_ONENAND_SIM) += onenand_sim.o
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onenand-objs = onenand_base.o onenand_bbt.o
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@ -0,0 +1,464 @@
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/*
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* linux/drivers/mtd/onenand/simulator.c
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*
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* The OneNAND simulator
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*
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* Copyright(c) 2005 Samsung Electronics
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* Kyungmin Park <kyungmin.park@samsung.com>
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/vmalloc.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/onenand.h>
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#include <asm/io.h>
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#include <asm/sizes.h>
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#ifndef CONFIG_ONENAND_SIM_MANUFACTURER
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#define CONFIG_ONENAND_SIM_MANUFACTURER 0xec
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#endif
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#ifndef CONFIG_ONENAND_SIM_DEVICE_ID
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#define CONFIG_ONENAND_SIM_DEVICE_ID 0x04
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#endif
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#ifndef CONFIG_ONENAND_SIM_VERSION_ID
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#define CONFIG_ONENAND_SIM_VERSION_ID 0x1e
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#endif
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static int manuf_id = CONFIG_ONENAND_SIM_MANUFACTURER;
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static int device_id = CONFIG_ONENAND_SIM_DEVICE_ID;
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static int version_id = CONFIG_ONENAND_SIM_VERSION_ID;
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struct onenand_flash {
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void __iomem *base;
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void __iomem *data;
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};
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#define ONENAND_CORE(flash) (flash->data)
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#define ONENAND_MAIN_AREA(this, offset) \
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(this->base + ONENAND_DATARAM + offset)
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#define ONENAND_SPARE_AREA(this, offset) \
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(this->base + ONENAND_SPARERAM + offset)
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#define ONENAND_GET_WP_STATUS(this) \
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(readw(this->base + ONENAND_REG_WP_STATUS))
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#define ONENAND_SET_WP_STATUS(v, this) \
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(writew(v, this->base + ONENAND_REG_WP_STATUS))
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/* It has all 0xff chars */
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static unsigned char *ffchars;
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/*
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* OneNAND simulator mtd
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*/
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struct mtd_info *onenand_sim;
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/**
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* onenand_lock_handle - Handle Lock scheme
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* @param this OneNAND device structure
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* @param cmd The command to be sent
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*
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* Send lock command to OneNAND device.
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* The lock scheme is depends on chip type.
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*/
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static void onenand_lock_handle(struct onenand_chip *this, int cmd)
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{
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int block_lock_scheme;
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int status;
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status = ONENAND_GET_WP_STATUS(this);
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block_lock_scheme = !(this->options & ONENAND_CONT_LOCK);
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switch (cmd) {
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case ONENAND_CMD_UNLOCK:
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if (block_lock_scheme)
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ONENAND_SET_WP_STATUS(ONENAND_WP_US, this);
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else
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ONENAND_SET_WP_STATUS(status | ONENAND_WP_US, this);
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break;
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case ONENAND_CMD_LOCK:
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if (block_lock_scheme)
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ONENAND_SET_WP_STATUS(ONENAND_WP_LS, this);
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else
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ONENAND_SET_WP_STATUS(status | ONENAND_WP_LS, this);
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break;
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case ONENAND_CMD_LOCK_TIGHT:
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if (block_lock_scheme)
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ONENAND_SET_WP_STATUS(ONENAND_WP_LTS, this);
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else
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ONENAND_SET_WP_STATUS(status | ONENAND_WP_LTS, this);
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break;
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default:
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break;
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}
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}
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/**
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* onenand_bootram_handle - Handle BootRAM area
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* @param this OneNAND device structure
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* @param cmd The command to be sent
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*
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* Emulate BootRAM area. It is possible to do basic operation using BootRAM.
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*/
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static void onenand_bootram_handle(struct onenand_chip *this, int cmd)
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{
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switch (cmd) {
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case ONENAND_CMD_READID:
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writew(manuf_id, this->base);
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writew(device_id, this->base + 2);
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writew(version_id, this->base + 4);
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break;
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default:
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/* REVIST: Handle other commands */
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break;
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}
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}
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/**
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* onenand_update_interrupt - Set interrupt register
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* @param this OneNAND device structure
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* @param cmd The command to be sent
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*
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* Update interrupt register. The status is depends on command.
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*/
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static void onenand_update_interrupt(struct onenand_chip *this, int cmd)
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{
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int interrupt = ONENAND_INT_MASTER;
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switch (cmd) {
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case ONENAND_CMD_READ:
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case ONENAND_CMD_READOOB:
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interrupt |= ONENAND_INT_READ;
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break;
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case ONENAND_CMD_PROG:
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case ONENAND_CMD_PROGOOB:
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interrupt |= ONENAND_INT_WRITE;
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break;
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case ONENAND_CMD_ERASE:
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interrupt |= ONENAND_INT_ERASE;
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break;
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case ONENAND_CMD_RESET:
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interrupt |= ONENAND_INT_RESET;
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break;
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default:
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break;
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}
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writew(interrupt, this->base + ONENAND_REG_INTERRUPT);
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}
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/**
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* onenand_check_overwrite - Check over-write if happend
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* @param dest The destination pointer
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* @param src The source pointer
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* @param count The length to be check
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* @return 0 on same, otherwise 1
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*
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* Compare the source with destination
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*/
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static int onenand_check_overwrite(void *dest, void *src, size_t count)
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{
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unsigned int *s = (unsigned int *) src;
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unsigned int *d = (unsigned int *) dest;
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int i;
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count >>= 2;
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for (i = 0; i < count; i++)
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if ((*s++ ^ *d++) != 0)
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return 1;
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return 0;
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}
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/**
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* onenand_data_handle - Handle OneNAND Core and DataRAM
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* @param this OneNAND device structure
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* @param cmd The command to be sent
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* @param dataram Which dataram used
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* @param offset The offset to OneNAND Core
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*
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* Copy data from OneNAND Core to DataRAM (read)
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* Copy data from DataRAM to OneNAND Core (write)
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* Erase the OneNAND Core (erase)
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*/
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static void onenand_data_handle(struct onenand_chip *this, int cmd,
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int dataram, unsigned int offset)
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{
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struct onenand_flash *flash = this->priv;
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int main_offset, spare_offset;
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void __iomem *src;
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void __iomem *dest;
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if (dataram) {
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main_offset = onenand_sim->oobblock;
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spare_offset = onenand_sim->oobsize;
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} else {
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main_offset = 0;
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spare_offset = 0;
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}
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switch (cmd) {
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case ONENAND_CMD_READ:
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src = ONENAND_CORE(flash) + offset;
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dest = ONENAND_MAIN_AREA(this, main_offset);
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memcpy(dest, src, onenand_sim->oobblock);
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/* Fall through */
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case ONENAND_CMD_READOOB:
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src = ONENAND_CORE(flash) + this->chipsize + (offset >> 5);
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dest = ONENAND_SPARE_AREA(this, spare_offset);
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memcpy(dest, src, onenand_sim->oobsize);
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break;
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case ONENAND_CMD_PROG:
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src = ONENAND_MAIN_AREA(this, main_offset);
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dest = ONENAND_CORE(flash) + offset;
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if (memcmp(dest, ffchars, onenand_sim->oobblock) &&
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onenand_check_overwrite(dest, src, onenand_sim->oobblock))
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printk(KERN_ERR "over-write happend at 0x%08x\n", offset);
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memcpy(dest, src, onenand_sim->oobblock);
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/* Fall through */
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case ONENAND_CMD_PROGOOB:
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src = ONENAND_SPARE_AREA(this, spare_offset);
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/* Check all data is 0xff chars */
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if (!memcmp(src, ffchars, onenand_sim->oobsize))
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break;
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dest = ONENAND_CORE(flash) + this->chipsize + (offset >> 5);
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if (memcmp(dest, ffchars, onenand_sim->oobsize) &&
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onenand_check_overwrite(dest, src, onenand_sim->oobsize))
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printk(KERN_ERR "OOB: over-write happend at 0x%08x\n", offset);
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memcpy(dest, src, onenand_sim->oobsize);
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break;
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case ONENAND_CMD_ERASE:
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memset(ONENAND_CORE(flash) + offset, 0xff, (1 << this->erase_shift));
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break;
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default:
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break;
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}
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}
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/**
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* onenand_command_handle - Handle command
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* @param this OneNAND device structure
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* @param cmd The command to be sent
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*
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* Emulate OneNAND command.
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*/
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static void onenand_command_handle(struct onenand_chip *this, int cmd)
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{
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unsigned long offset = 0;
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int block = -1, page = -1, bufferram = -1;
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int dataram = 0;
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switch (cmd) {
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case ONENAND_CMD_UNLOCK:
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case ONENAND_CMD_LOCK:
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case ONENAND_CMD_LOCK_TIGHT:
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onenand_lock_handle(this, cmd);
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break;
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case ONENAND_CMD_BUFFERRAM:
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/* Do nothing */
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return;
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default:
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block = (int) readw(this->base + ONENAND_REG_START_ADDRESS1);
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if (block & (1 << ONENAND_DDP_SHIFT)) {
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block &= ~(1 << ONENAND_DDP_SHIFT);
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/* The half of chip block */
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block += this->chipsize >> (this->erase_shift + 1);
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}
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if (cmd == ONENAND_CMD_ERASE)
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break;
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page = (int) readw(this->base + ONENAND_REG_START_ADDRESS8);
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page = (page >> ONENAND_FPA_SHIFT);
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bufferram = (int) readw(this->base + ONENAND_REG_START_BUFFER);
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bufferram >>= ONENAND_BSA_SHIFT;
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bufferram &= ONENAND_BSA_DATARAM1;
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dataram = (bufferram == ONENAND_BSA_DATARAM1) ? 1 : 0;
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break;
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}
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if (block != -1)
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offset += block << this->erase_shift;
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if (page != -1)
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offset += page << this->page_shift;
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onenand_data_handle(this, cmd, dataram, offset);
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onenand_update_interrupt(this, cmd);
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}
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/**
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* onenand_writew - [OneNAND Interface] Emulate write operation
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* @param value value to write
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* @param addr address to write
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*
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* Write OneNAND reigser with value
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*/
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static void onenand_writew(unsigned short value, void __iomem *addr)
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{
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struct onenand_chip *this = onenand_sim->priv;
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/* BootRAM handling */
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if (addr < this->base + ONENAND_DATARAM) {
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onenand_bootram_handle(this, value);
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return;
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}
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/* Command handling */
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if (addr == this->base + ONENAND_REG_COMMAND)
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onenand_command_handle(this, value);
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writew(value, addr);
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}
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/**
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* flash_init - Initialize OneNAND simulator
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* @param flash OneNAND simulaotr data strucutres
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*
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* Initialize OneNAND simulator.
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*/
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static int __init flash_init(struct onenand_flash *flash)
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{
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int density, size;
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int buffer_size;
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flash->base = kmalloc(SZ_128K, GFP_KERNEL);
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if (!flash->base) {
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printk(KERN_ERR "Unalbe to allocate base address.\n");
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return -ENOMEM;
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}
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memset(flash->base, 0, SZ_128K);
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density = device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
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size = ((16 << 20) << density);
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ONENAND_CORE(flash) = vmalloc(size + (size >> 5));
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if (!ONENAND_CORE(flash)) {
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printk(KERN_ERR "Unalbe to allocate nand core address.\n");
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kfree(flash->base);
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return -ENOMEM;
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}
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memset(ONENAND_CORE(flash), 0xff, size + (size >> 5));
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/* Setup registers */
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writew(manuf_id, flash->base + ONENAND_REG_MANUFACTURER_ID);
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writew(device_id, flash->base + ONENAND_REG_DEVICE_ID);
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writew(version_id, flash->base + ONENAND_REG_VERSION_ID);
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if (density < 2)
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buffer_size = 0x0400; /* 1KB page */
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else
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buffer_size = 0x0800; /* 2KB page */
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writew(buffer_size, flash->base + ONENAND_REG_DATA_BUFFER_SIZE);
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return 0;
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}
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/**
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* flash_exit - Clean up OneNAND simulator
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* @param flash OneNAND simulaotr data strucutres
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*
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* Clean up OneNAND simulator.
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*/
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static void flash_exit(struct onenand_flash *flash)
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{
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vfree(ONENAND_CORE(flash));
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kfree(flash->base);
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kfree(flash);
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}
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static int __init onenand_sim_init(void)
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{
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struct onenand_chip *this;
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struct onenand_flash *flash;
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int len;
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/* Allocate all 0xff chars pointer */
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ffchars = kmalloc(MAX_ONENAND_PAGESIZE, GFP_KERNEL);
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if (!ffchars) {
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printk(KERN_ERR "Unable to allocate ff chars.\n");
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return -ENOMEM;
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}
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memset(ffchars, 0xff, MAX_ONENAND_PAGESIZE);
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len = sizeof(struct mtd_info) + sizeof(struct onenand_chip) + sizeof (struct onenand_flash);
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/* Allocate OneNAND simulator mtd pointer */
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onenand_sim = kmalloc(len, GFP_KERNEL);
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if (!onenand_sim) {
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printk(KERN_ERR "Unable to allocate core structures.\n");
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kfree(ffchars);
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return -ENOMEM;
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}
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memset(onenand_sim, 0, len);
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this = (struct onenand_chip *) (onenand_sim + 1);
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/* Override write_word function */
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this->write_word = onenand_writew;
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flash = (struct onenand_flash *) (this + 1);
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if (flash_init(flash)) {
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printk(KERN_ERR "Unable to allocat flash.\n");
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kfree(ffchars);
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kfree(onenand_sim);
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return -ENOMEM;
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}
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this->base = flash->base;
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this->priv = flash;
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onenand_sim->priv = this;
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if (onenand_scan(onenand_sim, 1)) {
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kfree(ffchars);
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kfree(onenand_sim);
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flash_exit(flash);
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return -ENXIO;
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}
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add_mtd_device(onenand_sim);
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return 0;
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}
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static void __exit onenand_sim_exit(void)
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{
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struct onenand_chip *this = onenand_sim->priv;
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struct onenand_flash *flash = this->priv;
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kfree(ffchars);
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onenand_release(onenand_sim);
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flash_exit(flash);
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kfree(onenand_sim);
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}
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module_init(onenand_sim_init);
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module_exit(onenand_sim_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
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MODULE_DESCRIPTION("The OneNAND flash simulator");
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