From 40b3d9404384d0012f23f80a1e3d8c699cadc5e6 Mon Sep 17 00:00:00 2001 From: Jorge Ramirez-Ortiz Date: Mon, 25 Nov 2019 15:25:07 +0100 Subject: [PATCH] arm64: dts: qcom: qcs404: Add HFPLL node The high frequency pll functionality is required to enable CPU frequency scaling operation. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/20191125142511.681149-3-niklas.cassel@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index c9e8e629045b..b5dff2aa1ab4 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -904,6 +904,15 @@ apcs_glb: mailbox@b011000 { #mbox-cells = <1>; }; + apcs_hfpll: clock-controller@b016000 { + compatible = "qcom,hfpll"; + reg = <0x0b016000 0x30>; + #clock-cells = <0>; + clock-output-names = "apcs_hfpll"; + clocks = <&xo_board>; + clock-names = "xo"; + }; + watchdog@b017000 { compatible = "qcom,apss-wdt-qcs404", "qcom,kpss-wdt"; reg = <0x0b017000 0x1000>;