mirror of https://gitee.com/openkylin/linux.git
- Set all unused color plane offsets to ~0xfff again (Ville)
- Fix TGL DKL PHY DP vswing handling (Ville) -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEbSBwaO7dZQkcLOKj+mJfZA7rE8oFAl+IkWYACgkQ+mJfZA7r E8pl0QgApRH1TAbrqo/lz5WaXydx60MabOA1EbI2RCxlrTePkzdi1kxVvfbwNzNv dAHkVuBNzDu5v4Z9JhdFZl6r9iFD9t2yl0l4O26+utigw49JGBRJZgBk4cMsHViX jkWDOGzeFxdKF8MfUV3LHgkE6Z/pXgwCvHPjxgEKCe/vAs7ZUdJCBRwF6K5N0g+l YdEMYwgDojmw8MQlcG8JsG0WZSQsfCckEqFu9Hsf55CYuTIR5l53BIw9X27xshG0 jT8VPGsUPWMBlK/MuW1GZR3JDP6DFEbzTL9xsFv74b1zDN8D/A6b39C2MhxPuZOO Xib4p9gSHleDxVBH41Bvu2rV2QwFzg== =0qoq -----END PGP SIGNATURE----- Merge tag 'drm-intel-next-fixes-2020-10-15' of git://anongit.freedesktop.org/drm/drm-intel into drm-next - Set all unused color plane offsets to ~0xfff again (Ville) - Fix TGL DKL PHY DP vswing handling (Ville) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201015181453.GA2905280@intel.com
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commit
40b9905045
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@ -2742,7 +2742,7 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, int link_clock,
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u32 n_entries, val, ln, dpcnt_mask, dpcnt_val;
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int rate = 0;
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if (type == INTEL_OUTPUT_HDMI) {
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if (type != INTEL_OUTPUT_HDMI) {
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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rate = intel_dp->link_rate;
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@ -4093,8 +4093,7 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
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int skl_check_plane_surface(struct intel_plane_state *plane_state)
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{
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const struct drm_framebuffer *fb = plane_state->hw.fb;
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int ret;
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bool needs_aux = false;
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int ret, i;
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ret = intel_plane_compute_gtt(plane_state);
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if (ret)
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@ -4108,7 +4107,6 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state)
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* it.
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*/
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if (is_ccs_modifier(fb->modifier)) {
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needs_aux = true;
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ret = skl_check_ccs_aux_surface(plane_state);
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if (ret)
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return ret;
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@ -4116,20 +4114,15 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state)
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if (intel_format_info_is_yuv_semiplanar(fb->format,
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fb->modifier)) {
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needs_aux = true;
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ret = skl_check_nv12_aux_surface(plane_state);
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if (ret)
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return ret;
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}
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if (!needs_aux) {
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int i;
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for (i = 1; i < fb->format->num_planes; i++) {
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plane_state->color_plane[i].offset = ~0xfff;
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plane_state->color_plane[i].x = 0;
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plane_state->color_plane[i].y = 0;
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}
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for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->color_plane); i++) {
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plane_state->color_plane[i].offset = ~0xfff;
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plane_state->color_plane[i].x = 0;
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plane_state->color_plane[i].y = 0;
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}
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ret = skl_check_main_surface(plane_state);
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