drm/amd/display: Remove redundant definition of dwb_source enums

There are repeated (but guarded) definitions of dwb_src enums. There are
also unused entires. Clean them up.

Signed-off-by: Julian Parkin <julian.parkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Julian Parkin 2019-07-25 16:53:27 -04:00 committed by Alex Deucher
parent 1ba0a5802f
commit 40f08515cc
1 changed files with 0 additions and 12 deletions

View File

@ -45,22 +45,10 @@ enum dwb_source {
dwb_src_scl = 0, /* for DCE7x/9x, DCN won't support. */
dwb_src_blnd, /* for DCE7x/9x */
dwb_src_fmt, /* for DCE7x/9x */
#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
dwb_src_otg0 = 0x100, /* for DCN1.x/DCN2.x, register: mmDWB_SOURCE_SELECT */
dwb_src_otg1, /* for DCN1.x/DCN2.x */
dwb_src_otg2, /* for DCN1.x/DCN2.x */
dwb_src_otg3, /* for DCN1.x/DCN2.x */
#else
dwb_src_otg0 = 0x100, /* for DCN1.x, register: mmDWB_SOURCE_SELECT */
dwb_src_otg1, /* for DCN1.x */
dwb_src_otg2, /* for DCN1.x */
dwb_src_otg3, /* for DCN1.x */
#endif
dwb_src_mpc0 = 0x200, /* for DCN2, register: mmMPC_DWB0_MUX, mmMPC_DWB1_MUX, mmMPC_DWB2_MUX */
dwb_src_mpc1, /* for DCN2 */
dwb_src_mpc2, /* for DCN2 */
dwb_src_mpc3, /* for DCN2 */
dwb_src_mpc4, /* for DCN2 */
};
#if defined(CONFIG_DRM_AMD_DC_DCN2_0)