mirror of https://gitee.com/openkylin/linux.git
drm/omap: Pass drm_display_mode to .check_timings() and .set_timings()
The omap_dss_device .check_timings() and .set_timings() operations operate on struct videomode, while the DRM API operates on struct drm_display_mode. This forces conversion from to videomode in the callers. While that's not a problem per se, it creates a difference with the drm_bridge API. Replace the videomode parameter to the .check_timings() and .set_timings() operations with a drm_display_mode. This pushed the conversion to videomode down to the DSS devices in some cases. If needed they will be converted to operate on drm_display_mode natively. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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d68164fe29
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@ -1127,20 +1127,20 @@ static int dsicm_get_modes(struct omap_dss_device *dssdev,
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}
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static int dsicm_check_timings(struct omap_dss_device *dssdev,
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struct videomode *vm)
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struct drm_display_mode *mode)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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int ret = 0;
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if (vm->hactive != ddata->vm.hactive)
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if (mode->hdisplay != ddata->vm.hactive)
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ret = -EINVAL;
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if (vm->vactive != ddata->vm.vactive)
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if (mode->vdisplay != ddata->vm.vactive)
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ret = -EINVAL;
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if (ret) {
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dev_warn(dssdev->dev, "wrong resolution: %d x %d",
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vm->hactive, vm->vactive);
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mode->hdisplay, mode->vdisplay);
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dev_warn(dssdev->dev, "panel resolution: %d x %d",
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ddata->vm.hactive, ddata->vm.vactive);
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}
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@ -459,7 +459,7 @@ static void dpi_display_disable(struct omap_dss_device *dssdev)
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}
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static void dpi_set_timings(struct omap_dss_device *dssdev,
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const struct videomode *vm)
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const struct drm_display_mode *mode)
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{
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struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
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@ -467,13 +467,13 @@ static void dpi_set_timings(struct omap_dss_device *dssdev,
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mutex_lock(&dpi->lock);
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dpi->vm = *vm;
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drm_display_mode_to_videomode(mode, &dpi->vm);
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mutex_unlock(&dpi->lock);
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}
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static int dpi_check_timings(struct omap_dss_device *dssdev,
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struct videomode *vm)
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struct drm_display_mode *mode)
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{
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struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
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int lck_div, pck_div;
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@ -482,20 +482,20 @@ static int dpi_check_timings(struct omap_dss_device *dssdev,
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struct dpi_clk_calc_ctx ctx;
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bool ok;
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if (vm->hactive % 8 != 0)
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if (mode->hdisplay % 8 != 0)
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return -EINVAL;
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if (vm->pixelclock == 0)
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if (mode->clock == 0)
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return -EINVAL;
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if (dpi->pll) {
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ok = dpi_pll_clk_calc(dpi, vm->pixelclock, &ctx);
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ok = dpi_pll_clk_calc(dpi, mode->clock * 1000, &ctx);
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if (!ok)
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return -EINVAL;
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fck = ctx.pll_cinfo.clkout[ctx.clkout_idx];
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} else {
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ok = dpi_dss_clk_calc(dpi, vm->pixelclock, &ctx);
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ok = dpi_dss_clk_calc(dpi, mode->clock * 1000, &ctx);
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if (!ok)
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return -EINVAL;
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@ -507,7 +507,7 @@ static int dpi_check_timings(struct omap_dss_device *dssdev,
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pck = fck / lck_div / pck_div;
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vm->pixelclock = pck;
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mode->clock = pck / 1000;
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return 0;
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}
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@ -249,15 +249,15 @@ static void hdmi_power_off_full(struct omap_hdmi *hdmi)
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}
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static void hdmi_display_set_timings(struct omap_dss_device *dssdev,
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const struct videomode *vm)
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const struct drm_display_mode *mode)
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{
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struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
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mutex_lock(&hdmi->lock);
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hdmi->cfg.vm = *vm;
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drm_display_mode_to_videomode(mode, &hdmi->cfg.vm);
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dispc_set_tv_pclk(hdmi->dss->dispc, vm->pixelclock);
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dispc_set_tv_pclk(hdmi->dss->dispc, mode->clock * 1000);
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mutex_unlock(&hdmi->lock);
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}
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@ -248,15 +248,15 @@ static void hdmi_power_off_full(struct omap_hdmi *hdmi)
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}
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static void hdmi_display_set_timings(struct omap_dss_device *dssdev,
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const struct videomode *vm)
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const struct drm_display_mode *mode)
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{
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struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
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mutex_lock(&hdmi->lock);
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hdmi->cfg.vm = *vm;
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drm_display_mode_to_videomode(mode, &hdmi->cfg.vm);
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dispc_set_tv_pclk(hdmi->dss->dispc, vm->pixelclock);
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dispc_set_tv_pclk(hdmi->dss->dispc, mode->clock * 1000);
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mutex_unlock(&hdmi->lock);
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}
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@ -366,9 +366,9 @@ struct omap_dss_device_ops {
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void (*post_disable)(struct omap_dss_device *dssdev);
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int (*check_timings)(struct omap_dss_device *dssdev,
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struct videomode *vm);
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struct drm_display_mode *mode);
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void (*set_timings)(struct omap_dss_device *dssdev,
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const struct videomode *vm);
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const struct drm_display_mode *mode);
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bool (*detect)(struct omap_dss_device *dssdev);
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@ -206,36 +206,37 @@ static void sdi_display_disable(struct omap_dss_device *dssdev)
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}
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static void sdi_set_timings(struct omap_dss_device *dssdev,
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const struct videomode *vm)
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const struct drm_display_mode *mode)
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{
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struct sdi_device *sdi = dssdev_to_sdi(dssdev);
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sdi->vm = *vm;
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drm_display_mode_to_videomode(mode, &sdi->vm);
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}
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static int sdi_check_timings(struct omap_dss_device *dssdev,
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struct videomode *vm)
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struct drm_display_mode *mode)
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{
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struct sdi_device *sdi = dssdev_to_sdi(dssdev);
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struct dispc_clock_info dispc_cinfo;
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unsigned long pixelclock = mode->clock * 1000;
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unsigned long fck;
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unsigned long pck;
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int r;
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if (vm->pixelclock == 0)
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if (pixelclock == 0)
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return -EINVAL;
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r = sdi_calc_clock_div(sdi, vm->pixelclock, &fck, &dispc_cinfo);
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r = sdi_calc_clock_div(sdi, pixelclock, &fck, &dispc_cinfo);
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if (r)
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return r;
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pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div;
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if (pck != vm->pixelclock) {
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if (pck != pixelclock) {
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DSSWARN("Pixel clock adjusted from %lu Hz to %lu Hz\n",
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vm->pixelclock, pck);
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pixelclock, pck);
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vm->pixelclock = pck;
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mode->clock = pck / 1000;
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}
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return 0;
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@ -544,29 +544,29 @@ static int venc_get_modes(struct omap_dss_device *dssdev,
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return ARRAY_SIZE(modes);
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}
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static enum venc_videomode venc_get_videomode(const struct videomode *vm)
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static enum venc_videomode venc_get_videomode(const struct drm_display_mode *mode)
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{
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if (!(vm->flags & DISPLAY_FLAGS_INTERLACED))
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if (!(mode->flags & DRM_MODE_FLAG_INTERLACE))
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return VENC_MODE_UNKNOWN;
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if (vm->pixelclock == omap_dss_pal_vm.pixelclock &&
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vm->hactive == omap_dss_pal_vm.hactive &&
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vm->vactive == omap_dss_pal_vm.vactive)
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if (mode->clock == omap_dss_pal_vm.pixelclock / 1000 &&
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mode->hdisplay == omap_dss_pal_vm.hactive &&
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mode->vdisplay == omap_dss_pal_vm.vactive)
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return VENC_MODE_PAL;
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if (vm->pixelclock == omap_dss_ntsc_vm.pixelclock &&
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vm->hactive == omap_dss_ntsc_vm.hactive &&
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vm->vactive == omap_dss_ntsc_vm.vactive)
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if (mode->clock == omap_dss_ntsc_vm.pixelclock / 1000 &&
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mode->hdisplay == omap_dss_ntsc_vm.hactive &&
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mode->vdisplay == omap_dss_ntsc_vm.vactive)
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return VENC_MODE_NTSC;
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return VENC_MODE_UNKNOWN;
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}
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static void venc_set_timings(struct omap_dss_device *dssdev,
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const struct videomode *vm)
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const struct drm_display_mode *mode)
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{
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struct venc_device *venc = dssdev_to_venc(dssdev);
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enum venc_videomode venc_mode = venc_get_videomode(vm);
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enum venc_videomode venc_mode = venc_get_videomode(mode);
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DSSDBG("venc_set_timings\n");
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@ -591,17 +591,17 @@ static void venc_set_timings(struct omap_dss_device *dssdev,
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}
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static int venc_check_timings(struct omap_dss_device *dssdev,
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struct videomode *vm)
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struct drm_display_mode *mode)
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{
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DSSDBG("venc_check_timings\n");
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switch (venc_get_videomode(vm)) {
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switch (venc_get_videomode(mode)) {
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case VENC_MODE_PAL:
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*vm = omap_dss_pal_vm;
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drm_display_mode_from_videomode(&omap_dss_pal_vm, mode);
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return 0;
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case VENC_MODE_NTSC:
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*vm = omap_dss_ntsc_vm;
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drm_display_mode_from_videomode(&omap_dss_ntsc_vm, mode);
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return 0;
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default:
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@ -245,22 +245,19 @@ enum drm_mode_status omap_connector_mode_fixup(struct omap_dss_device *dssdev,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct videomode vm = { 0 };
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int ret;
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drm_display_mode_to_videomode(mode, &vm);
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drm_mode_copy(adjusted_mode, mode);
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for (; dssdev; dssdev = dssdev->next) {
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if (!dssdev->ops->check_timings)
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continue;
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ret = dssdev->ops->check_timings(dssdev, &vm);
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ret = dssdev->ops->check_timings(dssdev, adjusted_mode);
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if (ret)
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return MODE_BAD;
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}
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drm_display_mode_from_videomode(&vm, adjusted_mode);
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return MODE_OK;
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}
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@ -134,7 +134,7 @@ static void omap_encoder_mode_set(struct drm_encoder *encoder,
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for (dssdev = omap_encoder->output; dssdev; dssdev = dssdev->next) {
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if (dssdev->ops->set_timings)
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dssdev->ops->set_timings(dssdev, &vm);
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dssdev->ops->set_timings(dssdev, adjusted_mode);
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}
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/* Set the HDMI mode and HDMI infoframe if applicable. */
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