diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c index 0827d7c96527..e75c565feb53 100644 --- a/drivers/usb/host/xhci-hub.c +++ b/drivers/usb/host/xhci-hub.c @@ -1184,6 +1184,10 @@ int xhci_bus_resume(struct usb_hcd *hcd) struct xhci_bus_state *bus_state; u32 temp; unsigned long flags; + unsigned long port_was_suspended = 0; + bool need_usb2_u3_exit = false; + int slot_id; + int sret; max_ports = xhci_get_ports(hcd, &port_array); bus_state = &xhci->bus_state[hcd_index(hcd)]; @@ -1207,7 +1211,6 @@ int xhci_bus_resume(struct usb_hcd *hcd) /* Check whether need resume ports. If needed resume port and disable remote wakeup */ u32 temp; - int slot_id; temp = readl(port_array[port_index]); if (DEV_SUPERSPEED(temp)) @@ -1216,39 +1219,47 @@ int xhci_bus_resume(struct usb_hcd *hcd) temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); if (test_bit(port_index, &bus_state->bus_suspended) && (temp & PORT_PLS_MASK)) { - if (DEV_SUPERSPEED(temp)) { - xhci_set_link_state(xhci, port_array, - port_index, XDEV_U0); - } else { + set_bit(port_index, &port_was_suspended); + if (!DEV_SUPERSPEED(temp)) { xhci_set_link_state(xhci, port_array, port_index, XDEV_RESUME); - - spin_unlock_irqrestore(&xhci->lock, flags); - msleep(20); - spin_lock_irqsave(&xhci->lock, flags); - - xhci_set_link_state(xhci, port_array, - port_index, XDEV_U0); + need_usb2_u3_exit = true; } - /* wait for the port to enter U0 and report port link - * state change. - */ - spin_unlock_irqrestore(&xhci->lock, flags); - msleep(20); - spin_lock_irqsave(&xhci->lock, flags); - - /* Clear PLC */ - xhci_test_and_clear_bit(xhci, port_array, port_index, - PORT_PLC); - - slot_id = xhci_find_slot_id_by_port(hcd, - xhci, port_index + 1); - if (slot_id) - xhci_ring_device(xhci, slot_id); } else writel(temp, port_array[port_index]); } + if (need_usb2_u3_exit) { + spin_unlock_irqrestore(&xhci->lock, flags); + msleep(20); + spin_lock_irqsave(&xhci->lock, flags); + } + + port_index = max_ports; + while (port_index--) { + if (!(port_was_suspended & BIT(port_index))) + continue; + /* Clear PLC to poll it later after XDEV_U0 */ + xhci_test_and_clear_bit(xhci, port_array, port_index, PORT_PLC); + xhci_set_link_state(xhci, port_array, port_index, XDEV_U0); + } + + port_index = max_ports; + while (port_index--) { + if (!(port_was_suspended & BIT(port_index))) + continue; + /* Poll and Clear PLC */ + sret = xhci_handshake(port_array[port_index], PORT_PLC, + PORT_PLC, 10 * 1000); + if (sret) + xhci_warn(xhci, "port %d resume PLC timeout\n", + port_index); + xhci_test_and_clear_bit(xhci, port_array, port_index, PORT_PLC); + slot_id = xhci_find_slot_id_by_port(hcd, xhci, port_index + 1); + if (slot_id) + xhci_ring_device(xhci, slot_id); + } + (void) readl(&xhci->op_regs->command); bus_state->next_statechange = jiffies + msecs_to_jiffies(5);