mirror of https://gitee.com/openkylin/linux.git
Merge branch 'master'
This commit is contained in:
commit
418fbfe979
|
@ -1284,8 +1284,8 @@ T: git kernel.org:/pub/scm/linux/kernel/git/roland/infiniband.git
|
|||
S: Supported
|
||||
|
||||
INPUT (KEYBOARD, MOUSE, JOYSTICK) DRIVERS
|
||||
P: Vojtech Pavlik
|
||||
M: vojtech@suse.cz
|
||||
P: Dmitry Torokhov
|
||||
M: dtor_core@ameritech.net
|
||||
L: linux-input@atrey.karlin.mff.cuni.cz
|
||||
L: linux-joystick@atrey.karlin.mff.cuni.cz
|
||||
T: git kernel.org:/pub/scm/linux/kernel/git/dtor/input.git
|
||||
|
|
|
@ -41,7 +41,7 @@
|
|||
#define CAT1(x,y) x##y
|
||||
#define CAT(x,y) CAT1(x,y)
|
||||
|
||||
#define DO_DEFAULT_RTC rtc_port: 0x70
|
||||
#define DO_DEFAULT_RTC .rtc_port = 0x70
|
||||
|
||||
#define DO_EV4_MMU \
|
||||
.max_asn = EV4_MAX_ASN, \
|
||||
|
|
|
@ -101,6 +101,8 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
|
|||
break;
|
||||
|
||||
case R_ARM_PC24:
|
||||
case R_ARM_CALL:
|
||||
case R_ARM_JUMP24:
|
||||
offset = (*(u32 *)loc & 0x00ffffff) << 2;
|
||||
if (offset & 0x02000000)
|
||||
offset -= 0x04000000;
|
||||
|
|
|
@ -155,19 +155,20 @@ int pxa_pm_enter(suspend_state_t state)
|
|||
PSPR = 0;
|
||||
|
||||
/* restore registers */
|
||||
RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
|
||||
RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
|
||||
RESTORE(GAFR0_L); RESTORE(GAFR0_U);
|
||||
RESTORE(GAFR1_L); RESTORE(GAFR1_U);
|
||||
RESTORE(GAFR2_L); RESTORE(GAFR2_U);
|
||||
RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
|
||||
RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
|
||||
RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
|
||||
RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
|
||||
RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
|
||||
|
||||
#ifdef CONFIG_PXA27x
|
||||
RESTORE(MDREFR);
|
||||
RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3);
|
||||
RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
|
||||
RESTORE_GPLEVEL(3); RESTORE(GPDR3);
|
||||
RESTORE(GAFR3_L); RESTORE(GAFR3_U);
|
||||
RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
|
||||
RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
|
||||
RESTORE(PFER); RESTORE(PKWR);
|
||||
#endif
|
||||
|
|
|
@ -245,7 +245,7 @@ void iounmap(volatile void __iomem *addr)
|
|||
addr < phys_to_virt(ISA_END_ADDRESS))
|
||||
return;
|
||||
|
||||
addr = (volatile void *)(PAGE_MASK & (unsigned long __force)addr);
|
||||
addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long __force)addr);
|
||||
|
||||
/* Use the vm area unlocked, assuming the caller
|
||||
ensures there isn't another iounmap for the same address
|
||||
|
|
|
@ -155,7 +155,7 @@ static __init void unreachable_devices(void)
|
|||
addr = get_base_addr(0, 0, PCI_DEVFN(i, 0));
|
||||
if (addr != 0)
|
||||
pci_exp_set_dev_base(addr, 0, PCI_DEVFN(i, 0));
|
||||
if (addr == 0 || readl((u32 *)addr) != val1)
|
||||
if (addr == 0 || readl((u32 __iomem *)mmcfg_virt_addr) != val1)
|
||||
set_bit(i, fallback_slots);
|
||||
spin_unlock_irqrestore(&pci_config_lock, flags);
|
||||
}
|
||||
|
|
|
@ -113,7 +113,7 @@ CONFIG_IOSAPIC=y
|
|||
CONFIG_IA64_SGI_SN_XP=m
|
||||
CONFIG_FORCE_MAX_ZONEORDER=17
|
||||
CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=512
|
||||
CONFIG_NR_CPUS=1024
|
||||
# CONFIG_HOTPLUG_CPU is not set
|
||||
CONFIG_SCHED_SMT=y
|
||||
CONFIG_PREEMPT=y
|
||||
|
|
|
@ -721,11 +721,13 @@ flush_thread (void)
|
|||
/* drop floating-point and debug-register state if it exists: */
|
||||
current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
|
||||
ia64_drop_fpu(current);
|
||||
#ifdef CONFIG_IA32_SUPPORT
|
||||
if (IS_IA32_PROCESS(ia64_task_regs(current))) {
|
||||
ia32_drop_partial_page_list(current);
|
||||
current->thread.task_size = IA32_PAGE_OFFSET;
|
||||
set_fs(USER_DS);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -249,3 +249,32 @@ time_init (void)
|
|||
*/
|
||||
set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
|
||||
}
|
||||
|
||||
#define SMALLUSECS 100
|
||||
|
||||
void
|
||||
udelay (unsigned long usecs)
|
||||
{
|
||||
unsigned long start;
|
||||
unsigned long cycles;
|
||||
unsigned long smallusecs;
|
||||
|
||||
/*
|
||||
* Execute the non-preemptible delay loop (because the ITC might
|
||||
* not be synchronized between CPUS) in relatively short time
|
||||
* chunks, allowing preemption between the chunks.
|
||||
*/
|
||||
while (usecs > 0) {
|
||||
smallusecs = (usecs > SMALLUSECS) ? SMALLUSECS : usecs;
|
||||
preempt_disable();
|
||||
cycles = smallusecs*local_cpu_data->cyc_per_usec;
|
||||
start = ia64_get_itc();
|
||||
|
||||
while (ia64_get_itc() - start < cycles)
|
||||
cpu_relax();
|
||||
|
||||
preempt_enable();
|
||||
usecs -= smallusecs;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(udelay);
|
||||
|
|
|
@ -53,7 +53,7 @@ static void uncached_ipi_visibility(void *data)
|
|||
if ((status != PAL_VISIBILITY_OK) &&
|
||||
(status != PAL_VISIBILITY_OK_REMOTE_NEEDED))
|
||||
printk(KERN_DEBUG "pal_prefetch_visibility() returns %i on "
|
||||
"CPU %i\n", status, get_cpu());
|
||||
"CPU %i\n", status, raw_smp_processor_id());
|
||||
}
|
||||
|
||||
|
||||
|
@ -63,7 +63,7 @@ static void uncached_ipi_mc_drain(void *data)
|
|||
status = ia64_pal_mc_drain();
|
||||
if (status)
|
||||
printk(KERN_WARNING "ia64_pal_mc_drain() failed with %i on "
|
||||
"CPU %i\n", status, get_cpu());
|
||||
"CPU %i\n", status, raw_smp_processor_id());
|
||||
}
|
||||
|
||||
|
||||
|
@ -105,7 +105,7 @@ uncached_get_new_chunk(struct gen_pool *poolp)
|
|||
status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL);
|
||||
|
||||
dprintk(KERN_INFO "pal_prefetch_visibility() returns %i on cpu %i\n",
|
||||
status, get_cpu());
|
||||
status, raw_smp_processor_id());
|
||||
|
||||
if (!status) {
|
||||
status = smp_call_function(uncached_ipi_visibility, NULL, 0, 1);
|
||||
|
|
|
@ -177,6 +177,9 @@ SECTIONS
|
|||
}
|
||||
. = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose kernel data */
|
||||
|
||||
.data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
|
||||
{ *(.data.read_mostly) }
|
||||
|
||||
.data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
|
||||
{ *(.data.cacheline_aligned) }
|
||||
|
||||
|
|
|
@ -202,7 +202,7 @@ sn2_global_tlb_purge(struct mm_struct *mm, unsigned long start,
|
|||
unsigned long end, unsigned long nbits)
|
||||
{
|
||||
int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0;
|
||||
int mymm = (mm == current->active_mm);
|
||||
int mymm = (mm == current->active_mm && current->mm);
|
||||
volatile unsigned long *ptc0, *ptc1;
|
||||
unsigned long itc, itc2, flags, data0 = 0, data1 = 0, rr_value;
|
||||
short nasids[MAX_NUMNODES], nix;
|
||||
|
|
|
@ -25,7 +25,7 @@ union br_ptr {
|
|||
*/
|
||||
void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
|
||||
if (pcibus_info) {
|
||||
switch (pcibus_info->pbi_bridge_type) {
|
||||
|
@ -38,14 +38,14 @@ void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
|
|||
default:
|
||||
panic
|
||||
("pcireg_control_bit_clr: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
|
||||
if (pcibus_info) {
|
||||
switch (pcibus_info->pbi_bridge_type) {
|
||||
|
@ -58,7 +58,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
|
|||
default:
|
||||
panic
|
||||
("pcireg_control_bit_set: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -68,7 +68,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
|
|||
*/
|
||||
uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
uint64_t ret = 0;
|
||||
|
||||
if (pcibus_info) {
|
||||
|
@ -82,7 +82,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
|
|||
default:
|
||||
panic
|
||||
("pcireg_tflush_get: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -98,7 +98,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
|
|||
*/
|
||||
uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
uint64_t ret = 0;
|
||||
|
||||
if (pcibus_info) {
|
||||
|
@ -112,7 +112,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
|
|||
default:
|
||||
panic
|
||||
("pcireg_intr_status_get: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
|
@ -123,7 +123,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
|
|||
*/
|
||||
void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
|
||||
if (pcibus_info) {
|
||||
switch (pcibus_info->pbi_bridge_type) {
|
||||
|
@ -136,14 +136,14 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
|
|||
default:
|
||||
panic
|
||||
("pcireg_intr_enable_bit_clr: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
|
||||
if (pcibus_info) {
|
||||
switch (pcibus_info->pbi_bridge_type) {
|
||||
|
@ -156,7 +156,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
|
|||
default:
|
||||
panic
|
||||
("pcireg_intr_enable_bit_set: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -167,7 +167,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
|
|||
void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
|
||||
uint64_t addr)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
|
||||
if (pcibus_info) {
|
||||
switch (pcibus_info->pbi_bridge_type) {
|
||||
|
@ -186,7 +186,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
|
|||
default:
|
||||
panic
|
||||
("pcireg_intr_addr_addr_get: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -196,7 +196,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
|
|||
*/
|
||||
void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
|
||||
if (pcibus_info) {
|
||||
switch (pcibus_info->pbi_bridge_type) {
|
||||
|
@ -209,7 +209,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
|
|||
default:
|
||||
panic
|
||||
("pcireg_force_intr_set: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -219,7 +219,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
|
|||
*/
|
||||
uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
uint64_t ret = 0;
|
||||
|
||||
if (pcibus_info) {
|
||||
|
@ -233,7 +233,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
|
|||
__sn_readq_relaxed(&ptr->pic.p_wr_req_buf[device]);
|
||||
break;
|
||||
default:
|
||||
panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", (void *)ptr);
|
||||
panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", ptr);
|
||||
}
|
||||
|
||||
}
|
||||
|
@ -244,7 +244,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
|
|||
void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
|
||||
uint64_t val)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
|
||||
if (pcibus_info) {
|
||||
switch (pcibus_info->pbi_bridge_type) {
|
||||
|
@ -257,15 +257,15 @@ void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
|
|||
default:
|
||||
panic
|
||||
("pcireg_int_ate_set: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
|
||||
uint64_t __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
|
||||
{
|
||||
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
|
||||
uint64_t *ret = (uint64_t *) 0;
|
||||
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
|
||||
uint64_t __iomem *ret = NULL;
|
||||
|
||||
if (pcibus_info) {
|
||||
switch (pcibus_info->pbi_bridge_type) {
|
||||
|
@ -278,7 +278,7 @@ uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
|
|||
default:
|
||||
panic
|
||||
("pcireg_int_ate_addr: unknown bridgetype bridge 0x%p",
|
||||
(void *)ptr);
|
||||
ptr);
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
|
|
|
@ -38,10 +38,10 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
|
|||
uint64_t offset;
|
||||
struct page *tmp;
|
||||
struct tioca_common *tioca_common;
|
||||
struct tioca *ca_base;
|
||||
struct tioca __iomem *ca_base;
|
||||
|
||||
tioca_common = tioca_kern->ca_common;
|
||||
ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
|
||||
ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base;
|
||||
|
||||
if (list_empty(tioca_kern->ca_devices))
|
||||
return 0;
|
||||
|
@ -215,7 +215,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
|
|||
{
|
||||
int cap_ptr;
|
||||
uint32_t reg;
|
||||
struct tioca *tioca_base;
|
||||
struct tioca __iomem *tioca_base;
|
||||
struct pci_dev *pdev;
|
||||
struct tioca_common *common;
|
||||
|
||||
|
@ -257,7 +257,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
|
|||
* Set ca's fw to match
|
||||
*/
|
||||
|
||||
tioca_base = (struct tioca *)common->ca_common.bs_base;
|
||||
tioca_base = (struct tioca __iomem*)common->ca_common.bs_base;
|
||||
__sn_setq_relaxed(&tioca_base->ca_control1, CA_AGP_FW_ENABLE);
|
||||
}
|
||||
|
||||
|
@ -322,7 +322,7 @@ static uint64_t
|
|||
tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
|
||||
{
|
||||
struct tioca_common *tioca_common;
|
||||
struct tioca *ca_base;
|
||||
struct tioca __iomem *ca_base;
|
||||
uint64_t ct_addr;
|
||||
dma_addr_t bus_addr;
|
||||
uint32_t node_upper;
|
||||
|
@ -330,7 +330,7 @@ tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
|
|||
struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);
|
||||
|
||||
tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
|
||||
ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
|
||||
ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base;
|
||||
|
||||
ct_addr = PHYS_TO_TIODMA(paddr);
|
||||
if (!ct_addr)
|
||||
|
|
|
@ -247,7 +247,7 @@ long ppc64_personality(unsigned long personality)
|
|||
#define OVERRIDE_MACHINE 0
|
||||
#endif
|
||||
|
||||
static inline int override_machine(char *mach)
|
||||
static inline int override_machine(char __user *mach)
|
||||
{
|
||||
if (OVERRIDE_MACHINE) {
|
||||
/* change ppc64 to ppc */
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/ppc4xx_dma.h>
|
||||
|
||||
ppc_dma_ch_t dma_channels[MAX_PPC4xx_DMA_CHANNELS];
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
#include <asm/oplib.h>
|
||||
#include <asm/bpp.h>
|
||||
|
||||
struct linux_ebus *ebus_chain = 0;
|
||||
struct linux_ebus *ebus_chain = NULL;
|
||||
|
||||
/* We are together with pcic.c under CONFIG_PCI. */
|
||||
extern unsigned int pcic_pin_to_irq(unsigned int, char *name);
|
||||
|
@ -46,7 +46,7 @@ static struct ebus_device_irq je1_1[] = {
|
|||
{ "SUNW,CS4231", 0 },
|
||||
{ "parallel", 0 },
|
||||
{ "se", 2 },
|
||||
{ 0, 0 }
|
||||
{ NULL, 0 }
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -55,7 +55,7 @@ static struct ebus_device_irq je1_1[] = {
|
|||
*/
|
||||
static struct ebus_system_entry ebus_blacklist[] = {
|
||||
{ "SUNW,JavaEngine1", je1_1 },
|
||||
{ 0, 0 }
|
||||
{ NULL, NULL }
|
||||
};
|
||||
|
||||
static struct ebus_device_irq *ebus_blackp = NULL;
|
||||
|
@ -233,7 +233,7 @@ void __init fill_ebus_device(int node, struct linux_ebus_device *dev)
|
|||
ebus_alloc(sizeof(struct linux_ebus_child));
|
||||
|
||||
child = dev->children;
|
||||
child->next = 0;
|
||||
child->next = NULL;
|
||||
child->parent = dev;
|
||||
child->bus = dev->bus;
|
||||
fill_ebus_child(node, ®s[0], child);
|
||||
|
@ -243,7 +243,7 @@ void __init fill_ebus_device(int node, struct linux_ebus_device *dev)
|
|||
ebus_alloc(sizeof(struct linux_ebus_child));
|
||||
|
||||
child = child->next;
|
||||
child->next = 0;
|
||||
child->next = NULL;
|
||||
child->parent = dev;
|
||||
child->bus = dev->bus;
|
||||
fill_ebus_child(node, ®s[0], child);
|
||||
|
@ -275,7 +275,7 @@ void __init ebus_init(void)
|
|||
}
|
||||
}
|
||||
|
||||
pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_EBUS, 0);
|
||||
pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_EBUS, NULL);
|
||||
if (!pdev) {
|
||||
return;
|
||||
}
|
||||
|
@ -284,7 +284,7 @@ void __init ebus_init(void)
|
|||
|
||||
ebus_chain = ebus = (struct linux_ebus *)
|
||||
ebus_alloc(sizeof(struct linux_ebus));
|
||||
ebus->next = 0;
|
||||
ebus->next = NULL;
|
||||
|
||||
while (ebusnd) {
|
||||
|
||||
|
@ -325,8 +325,8 @@ void __init ebus_init(void)
|
|||
ebus_alloc(sizeof(struct linux_ebus_device));
|
||||
|
||||
dev = ebus->devices;
|
||||
dev->next = 0;
|
||||
dev->children = 0;
|
||||
dev->next = NULL;
|
||||
dev->children = NULL;
|
||||
dev->bus = ebus;
|
||||
fill_ebus_device(nd, dev);
|
||||
|
||||
|
@ -335,8 +335,8 @@ void __init ebus_init(void)
|
|||
ebus_alloc(sizeof(struct linux_ebus_device));
|
||||
|
||||
dev = dev->next;
|
||||
dev->next = 0;
|
||||
dev->children = 0;
|
||||
dev->next = NULL;
|
||||
dev->children = NULL;
|
||||
dev->bus = ebus;
|
||||
fill_ebus_device(nd, dev);
|
||||
}
|
||||
|
@ -353,7 +353,7 @@ void __init ebus_init(void)
|
|||
ebus->next = (struct linux_ebus *)
|
||||
ebus_alloc(sizeof(struct linux_ebus));
|
||||
ebus = ebus->next;
|
||||
ebus->next = 0;
|
||||
ebus->next = NULL;
|
||||
++num_ebus;
|
||||
}
|
||||
if (pdev)
|
||||
|
|
|
@ -55,7 +55,7 @@ static int led_read_proc(char *buf, char **start, off_t offset, int count,
|
|||
return len;
|
||||
}
|
||||
|
||||
static int led_write_proc(struct file *file, const char *buffer,
|
||||
static int led_write_proc(struct file *file, const char __user *buffer,
|
||||
unsigned long count, void *data)
|
||||
{
|
||||
char *buf = NULL;
|
||||
|
|
|
@ -161,7 +161,7 @@ static struct pcic_sn2list pcic_known_sysnames[] = {
|
|||
static int pcic0_up;
|
||||
static struct linux_pcic pcic0;
|
||||
|
||||
void * __iomem pcic_regs;
|
||||
void __iomem *pcic_regs;
|
||||
volatile int pcic_speculative;
|
||||
volatile int pcic_trapped;
|
||||
|
||||
|
|
|
@ -49,7 +49,7 @@ DEFINE_SPINLOCK(rtc_lock);
|
|||
enum sparc_clock_type sp_clock_typ;
|
||||
DEFINE_SPINLOCK(mostek_lock);
|
||||
void __iomem *mstk48t02_regs = NULL;
|
||||
static struct mostek48t08 *mstk48t08_regs = NULL;
|
||||
static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
|
||||
static int set_rtc_mmss(unsigned long);
|
||||
static int sbus_do_settimeofday(struct timespec *tv);
|
||||
|
||||
|
@ -342,7 +342,7 @@ static __inline__ void clock_probe(void)
|
|||
/* XXX r/o attribute is somewhere in r.flags */
|
||||
r.flags = clk_reg[0].which_io;
|
||||
r.start = clk_reg[0].phys_addr;
|
||||
mstk48t08_regs = (struct mostek48t08 *) sbus_ioremap(&r, 0,
|
||||
mstk48t08_regs = sbus_ioremap(&r, 0,
|
||||
sizeof(struct mostek48t08), "mk48t08");
|
||||
|
||||
mstk48t02_regs = &mstk48t08_regs->regs;
|
||||
|
|
|
@ -497,7 +497,7 @@ static void __init sun4c_probe_mmu(void)
|
|||
patch_kernel_fault_handler();
|
||||
}
|
||||
|
||||
volatile unsigned long *sun4c_memerr_reg = NULL;
|
||||
volatile unsigned long __iomem *sun4c_memerr_reg = NULL;
|
||||
|
||||
void __init sun4c_probe_memerr_reg(void)
|
||||
{
|
||||
|
|
|
@ -289,6 +289,8 @@ source "arch/um/Kconfig.net"
|
|||
|
||||
source "drivers/net/Kconfig"
|
||||
|
||||
source "drivers/connector/Kconfig"
|
||||
|
||||
source "fs/Kconfig"
|
||||
|
||||
source "security/Kconfig"
|
||||
|
|
|
@ -12,3 +12,7 @@ CHECKFLAGS += -m64
|
|||
|
||||
ELF_ARCH := i386:x86-64
|
||||
ELF_FORMAT := elf64-x86-64
|
||||
|
||||
# Not on all 64-bit distros /lib is a symlink to /lib64. PLD is an example.
|
||||
|
||||
LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib64
|
||||
|
|
|
@ -6,8 +6,12 @@
|
|||
#ifndef __SYSDEP_STUB_H
|
||||
#define __SYSDEP_STUB_H
|
||||
|
||||
#include <sys/mman.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/unistd.h>
|
||||
#include "stub-data.h"
|
||||
#include "kern_constants.h"
|
||||
#include "uml-config.h"
|
||||
|
||||
extern void stub_segv_handler(int sig);
|
||||
extern void stub_clone_handler(void);
|
||||
|
@ -76,23 +80,22 @@ static inline long stub_syscall5(long syscall, long arg1, long arg2, long arg3,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static inline long stub_syscall6(long syscall, long arg1, long arg2, long arg3,
|
||||
long arg4, long arg5, long arg6)
|
||||
{
|
||||
long ret;
|
||||
|
||||
__asm__ volatile ("push %%ebp ; movl %%eax,%%ebp ; movl %1,%%eax ; "
|
||||
"int $0x80 ; pop %%ebp"
|
||||
: "=a" (ret)
|
||||
: "g" (syscall), "b" (arg1), "c" (arg2), "d" (arg3),
|
||||
"S" (arg4), "D" (arg5), "0" (arg6));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void trap_myself(void)
|
||||
{
|
||||
__asm("int3");
|
||||
}
|
||||
|
||||
static inline void remap_stack(int fd, unsigned long offset)
|
||||
{
|
||||
__asm__ volatile ("movl %%eax,%%ebp ; movl %0,%%eax ; int $0x80 ;"
|
||||
"movl %7, %%ebx ; movl %%eax, (%%ebx)"
|
||||
: : "g" (STUB_MMAP_NR), "b" (UML_CONFIG_STUB_DATA),
|
||||
"c" (UM_KERN_PAGE_SIZE),
|
||||
"d" (PROT_READ | PROT_WRITE),
|
||||
"S" (MAP_FIXED | MAP_SHARED), "D" (fd),
|
||||
"a" (offset),
|
||||
"i" (&((struct stub_data *) UML_CONFIG_STUB_DATA)->err)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -6,8 +6,12 @@
|
|||
#ifndef __SYSDEP_STUB_H
|
||||
#define __SYSDEP_STUB_H
|
||||
|
||||
#include <sys/mman.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <sysdep/ptrace_user.h>
|
||||
#include "stub-data.h"
|
||||
#include "kern_constants.h"
|
||||
#include "uml-config.h"
|
||||
|
||||
extern void stub_segv_handler(int sig);
|
||||
extern void stub_clone_handler(void);
|
||||
|
@ -81,23 +85,23 @@ static inline long stub_syscall5(long syscall, long arg1, long arg2, long arg3,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static inline long stub_syscall6(long syscall, long arg1, long arg2, long arg3,
|
||||
long arg4, long arg5, long arg6)
|
||||
{
|
||||
long ret;
|
||||
|
||||
__asm__ volatile ("movq %5,%%r10 ; movq %6,%%r8 ; "
|
||||
"movq %7, %%r9; " __syscall : "=a" (ret)
|
||||
: "0" (syscall), "D" (arg1), "S" (arg2), "d" (arg3),
|
||||
"g" (arg4), "g" (arg5), "g" (arg6)
|
||||
: __syscall_clobber, "r10", "r8", "r9" );
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void trap_myself(void)
|
||||
{
|
||||
__asm("int3");
|
||||
}
|
||||
|
||||
static inline void remap_stack(long fd, unsigned long offset)
|
||||
{
|
||||
__asm__ volatile ("movq %4,%%r10 ; movq %5,%%r8 ; "
|
||||
"movq %6, %%r9; " __syscall "; movq %7, %%rbx ; "
|
||||
"movq %%rax, (%%rbx)":
|
||||
: "a" (STUB_MMAP_NR), "D" (UML_CONFIG_STUB_DATA),
|
||||
"S" (UM_KERN_PAGE_SIZE),
|
||||
"d" (PROT_READ | PROT_WRITE),
|
||||
"g" (MAP_FIXED | MAP_SHARED), "g" (fd),
|
||||
"g" (offset),
|
||||
"i" (&((struct stub_data *) UML_CONFIG_STUB_DATA)->err)
|
||||
: __syscall_clobber, "r10", "r8", "r9" );
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -18,11 +18,10 @@
|
|||
* on some systems.
|
||||
*/
|
||||
|
||||
#define STUB_DATA(field) (((struct stub_data *) UML_CONFIG_STUB_DATA)->field)
|
||||
|
||||
void __attribute__ ((__section__ (".__syscall_stub")))
|
||||
stub_clone_handler(void)
|
||||
{
|
||||
struct stub_data *data = (struct stub_data *) UML_CONFIG_STUB_DATA;
|
||||
long err;
|
||||
|
||||
err = stub_syscall2(__NR_clone, CLONE_PARENT | CLONE_FILES | SIGCHLD,
|
||||
|
@ -35,17 +34,21 @@ stub_clone_handler(void)
|
|||
if(err)
|
||||
goto out;
|
||||
|
||||
err = stub_syscall3(__NR_setitimer, ITIMER_VIRTUAL,
|
||||
(long) &STUB_DATA(timer), 0);
|
||||
err = stub_syscall3(__NR_setitimer, ITIMER_VIRTUAL,
|
||||
(long) &data->timer, 0);
|
||||
if(err)
|
||||
goto out;
|
||||
|
||||
err = stub_syscall6(STUB_MMAP_NR, UML_CONFIG_STUB_DATA,
|
||||
UM_KERN_PAGE_SIZE, PROT_READ | PROT_WRITE,
|
||||
MAP_FIXED | MAP_SHARED, STUB_DATA(fd),
|
||||
STUB_DATA(offset));
|
||||
remap_stack(data->fd, data->offset);
|
||||
goto done;
|
||||
|
||||
out:
|
||||
/* save current result. Parent: pid; child: retcode of mmap */
|
||||
STUB_DATA(err) = err;
|
||||
/* save current result.
|
||||
* Parent: pid;
|
||||
* child: retcode of mmap already saved and it jumps around this
|
||||
* assignment
|
||||
*/
|
||||
data->err = err;
|
||||
done:
|
||||
trap_myself();
|
||||
}
|
||||
|
|
|
@ -21,11 +21,6 @@ define unprofile
|
|||
endef
|
||||
|
||||
|
||||
# The stubs and unmap.o can't try to call mcount or update basic block data
|
||||
define unprofile
|
||||
$(patsubst -pg,,$(patsubst -fprofile-arcs -ftest-coverage,,$(1)))
|
||||
endef
|
||||
|
||||
# cmd_make_link checks to see if the $(foo-dir) variable starts with a /. If
|
||||
# so, it's considered to be a path relative to $(srcdir) rather than
|
||||
# $(srcdir)/arch/$(SUBARCH). This is because x86_64 wants to get ldt.c from
|
||||
|
|
|
@ -263,7 +263,7 @@ void iounmap(volatile void __iomem *addr)
|
|||
addr < phys_to_virt(ISA_END_ADDRESS))
|
||||
return;
|
||||
|
||||
addr = (volatile void *)(PAGE_MASK & (unsigned long __force)addr);
|
||||
addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long __force)addr);
|
||||
/* Use the vm area unlocked, assuming the caller
|
||||
ensures there isn't another iounmap for the same address
|
||||
in parallel. Reuse of the virtual address is prevented by
|
||||
|
|
|
@ -18,11 +18,11 @@ static DECLARE_BITMAP(fallback_slots, 32);
|
|||
/* Static virtual mapping of the MMCONFIG aperture */
|
||||
struct mmcfg_virt {
|
||||
struct acpi_table_mcfg_config *cfg;
|
||||
char *virt;
|
||||
char __iomem *virt;
|
||||
};
|
||||
static struct mmcfg_virt *pci_mmcfg_virt;
|
||||
|
||||
static char *get_virt(unsigned int seg, unsigned bus)
|
||||
static char __iomem *get_virt(unsigned int seg, unsigned bus)
|
||||
{
|
||||
int cfg_num = -1;
|
||||
struct acpi_table_mcfg_config *cfg;
|
||||
|
@ -43,9 +43,9 @@ static char *get_virt(unsigned int seg, unsigned bus)
|
|||
}
|
||||
}
|
||||
|
||||
static char *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
|
||||
static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
|
||||
{
|
||||
char *addr;
|
||||
char __iomem *addr;
|
||||
if (seg == 0 && bus == 0 && test_bit(PCI_SLOT(devfn), &fallback_slots))
|
||||
return NULL;
|
||||
addr = get_virt(seg, bus);
|
||||
|
@ -57,7 +57,7 @@ static char *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn
|
|||
static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
|
||||
unsigned int devfn, int reg, int len, u32 *value)
|
||||
{
|
||||
char *addr;
|
||||
char __iomem *addr;
|
||||
|
||||
/* Why do we have this when nobody checks it. How about a BUG()!? -AK */
|
||||
if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095)))
|
||||
|
@ -85,7 +85,7 @@ static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
|
|||
static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
|
||||
unsigned int devfn, int reg, int len, u32 value)
|
||||
{
|
||||
char *addr;
|
||||
char __iomem *addr;
|
||||
|
||||
/* Why do we have this when nobody checks it. How about a BUG()!? -AK */
|
||||
if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
|
||||
|
@ -127,7 +127,7 @@ static __init void unreachable_devices(void)
|
|||
int i;
|
||||
for (i = 0; i < 32; i++) {
|
||||
u32 val1;
|
||||
char *addr;
|
||||
char __iomem *addr;
|
||||
|
||||
pci_conf1_read(0, 0, PCI_DEVFN(i,0), 0, 4, &val1);
|
||||
if (val1 == 0xffffffff)
|
||||
|
|
|
@ -123,7 +123,7 @@ static int __init adummy_init(void)
|
|||
}
|
||||
memset(adummy_dev, 0, sizeof(struct adummy_dev));
|
||||
|
||||
atm_dev = atm_dev_register(DEV_LABEL, &adummy_ops, -1, 0);
|
||||
atm_dev = atm_dev_register(DEV_LABEL, &adummy_ops, -1, NULL);
|
||||
if (!atm_dev) {
|
||||
printk(KERN_ERR DEV_LABEL ": atm_dev_register() failed\n");
|
||||
err = -ENODEV;
|
||||
|
|
|
@ -28,7 +28,6 @@
|
|||
static struct sysdev_class memory_sysdev_class = {
|
||||
set_kset_name(MEMORY_CLASS_NAME),
|
||||
};
|
||||
EXPORT_SYMBOL(memory_sysdev_class);
|
||||
|
||||
static char *memory_hotplug_name(struct kset *kset, struct kobject *kobj)
|
||||
{
|
||||
|
|
|
@ -1312,6 +1312,8 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
|
|||
static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
|
||||
{
|
||||
drm_radeon_private_t *dev_priv = dev->dev_private;;
|
||||
unsigned int mem_size;
|
||||
|
||||
DRM_DEBUG("\n");
|
||||
|
||||
dev_priv->is_pci = init->is_pci;
|
||||
|
@ -1521,8 +1523,11 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
|
|||
+ dev_priv->fb_location) >> 10));
|
||||
|
||||
dev_priv->gart_size = init->gart_size;
|
||||
dev_priv->gart_vm_start = dev_priv->fb_location
|
||||
+ RADEON_READ(RADEON_CONFIG_APER_SIZE) * 2;
|
||||
|
||||
mem_size = RADEON_READ(RADEON_CONFIG_MEMSIZE);
|
||||
if (mem_size == 0)
|
||||
mem_size = 0x800000;
|
||||
dev_priv->gart_vm_start = dev_priv->fb_location + mem_size;
|
||||
|
||||
#if __OS_HAS_AGP
|
||||
if (!dev_priv->is_pci)
|
||||
|
|
|
@ -379,6 +379,7 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
|
|||
# define RADEON_PLL_WR_EN (1 << 7)
|
||||
#define RADEON_CLOCK_CNTL_INDEX 0x0008
|
||||
#define RADEON_CONFIG_APER_SIZE 0x0108
|
||||
#define RADEON_CONFIG_MEMSIZE 0x00f8
|
||||
#define RADEON_CRTC_OFFSET 0x0224
|
||||
#define RADEON_CRTC_OFFSET_CNTL 0x0228
|
||||
# define RADEON_CRTC_TILE_EN (1 << 15)
|
||||
|
|
|
@ -2399,7 +2399,8 @@ static int init_one_smi(int intf_num, struct smi_info **smi)
|
|||
new_smi->handlers->cleanup(new_smi->si_sm);
|
||||
kfree(new_smi->si_sm);
|
||||
}
|
||||
new_smi->io_cleanup(new_smi);
|
||||
if (new_smi->io_cleanup)
|
||||
new_smi->io_cleanup(new_smi);
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
@ -2518,7 +2519,8 @@ static void __exit cleanup_one_si(struct smi_info *to_clean)
|
|||
|
||||
kfree(to_clean->si_sm);
|
||||
|
||||
to_clean->io_cleanup(to_clean);
|
||||
if (to_clean->io_cleanup)
|
||||
to_clean->io_cleanup(to_clean);
|
||||
}
|
||||
|
||||
static __exit void cleanup_ipmi_si(void)
|
||||
|
|
|
@ -69,7 +69,7 @@ typedef struct _MW_ABILITIES {
|
|||
typedef struct _MW_READWRITE {
|
||||
unsigned short usDspAddress; /* The dsp address */
|
||||
unsigned long ulDataLength; /* The size in bytes of the data or user buffer */
|
||||
void *pBuf; /* Input:variable sized buffer */
|
||||
void __user *pBuf; /* Input:variable sized buffer */
|
||||
} MW_READWRITE, *pMW_READWRITE;
|
||||
|
||||
#define IOCTL_MW_RESET _IO(MWAVE_MINOR,1)
|
||||
|
|
|
@ -1444,6 +1444,7 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
dev_link_t *link;
|
||||
int size;
|
||||
int rc;
|
||||
void __user *argp = (void __user *)arg;
|
||||
#ifdef PCMCIA_DEBUG
|
||||
char *ioctl_names[CM_IOC_MAXNR + 1] = {
|
||||
[_IOC_NR(CM_IOCGSTATUS)] "CM_IOCGSTATUS",
|
||||
|
@ -1481,11 +1482,11 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
_IOC_DIR(cmd), _IOC_READ, _IOC_WRITE, size, cmd);
|
||||
|
||||
if (_IOC_DIR(cmd) & _IOC_READ) {
|
||||
if (!access_ok(VERIFY_WRITE, (void *)arg, size))
|
||||
if (!access_ok(VERIFY_WRITE, argp, size))
|
||||
return -EFAULT;
|
||||
}
|
||||
if (_IOC_DIR(cmd) & _IOC_WRITE) {
|
||||
if (!access_ok(VERIFY_READ, (void *)arg, size))
|
||||
if (!access_ok(VERIFY_READ, argp, size))
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
|
@ -1506,14 +1507,14 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
status |= CM_NO_READER;
|
||||
if (test_bit(IS_BAD_CARD, &dev->flags))
|
||||
status |= CM_BAD_CARD;
|
||||
if (copy_to_user((int *)arg, &status, sizeof(int)))
|
||||
if (copy_to_user(argp, &status, sizeof(int)))
|
||||
return -EFAULT;
|
||||
}
|
||||
return 0;
|
||||
case CM_IOCGATR:
|
||||
DEBUGP(4, dev, "... in CM_IOCGATR\n");
|
||||
{
|
||||
struct atreq *atreq = (struct atreq *) arg;
|
||||
struct atreq __user *atreq = argp;
|
||||
int tmp;
|
||||
/* allow nonblocking io and being interrupted */
|
||||
if (wait_event_interruptible
|
||||
|
@ -1597,7 +1598,7 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
{
|
||||
struct ptsreq krnptsreq;
|
||||
|
||||
if (copy_from_user(&krnptsreq, (struct ptsreq *) arg,
|
||||
if (copy_from_user(&krnptsreq, argp,
|
||||
sizeof(struct ptsreq)))
|
||||
return -EFAULT;
|
||||
|
||||
|
@ -1641,7 +1642,7 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
int old_pc_debug = 0;
|
||||
|
||||
old_pc_debug = pc_debug;
|
||||
if (copy_from_user(&pc_debug, (int *)arg, sizeof(int)))
|
||||
if (copy_from_user(&pc_debug, argp, sizeof(int)))
|
||||
return -EFAULT;
|
||||
|
||||
if (old_pc_debug != pc_debug)
|
||||
|
|
|
@ -72,7 +72,7 @@ static __inline__ void booke_wdt_ping(void)
|
|||
/*
|
||||
* booke_wdt_write:
|
||||
*/
|
||||
static ssize_t booke_wdt_write (struct file *file, const char *buf,
|
||||
static ssize_t booke_wdt_write (struct file *file, const char __user *buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
booke_wdt_ping();
|
||||
|
@ -92,14 +92,15 @@ static int booke_wdt_ioctl (struct inode *inode, struct file *file,
|
|||
unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
u32 tmp = 0;
|
||||
u32 __user *p = (u32 __user *)arg;
|
||||
|
||||
switch (cmd) {
|
||||
case WDIOC_GETSUPPORT:
|
||||
if (copy_to_user ((struct watchdog_info *) arg, &ident,
|
||||
if (copy_to_user ((struct watchdog_info __user *) arg, &ident,
|
||||
sizeof(struct watchdog_info)))
|
||||
return -EFAULT;
|
||||
case WDIOC_GETSTATUS:
|
||||
return put_user(ident.options, (u32 *) arg);
|
||||
return put_user(ident.options, p);
|
||||
case WDIOC_GETBOOTSTATUS:
|
||||
/* XXX: something is clearing TSR */
|
||||
tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
|
||||
|
@ -109,14 +110,14 @@ static int booke_wdt_ioctl (struct inode *inode, struct file *file,
|
|||
booke_wdt_ping();
|
||||
return 0;
|
||||
case WDIOC_SETTIMEOUT:
|
||||
if (get_user(booke_wdt_period, (u32 *) arg))
|
||||
if (get_user(booke_wdt_period, p))
|
||||
return -EFAULT;
|
||||
mtspr(SPRN_TCR, (mfspr(SPRN_TCR)&~WDTP(0))|WDTP(booke_wdt_period));
|
||||
return 0;
|
||||
case WDIOC_GETTIMEOUT:
|
||||
return put_user(booke_wdt_period, (u32 *) arg);
|
||||
return put_user(booke_wdt_period, p);
|
||||
case WDIOC_SETOPTIONS:
|
||||
if (get_user(tmp, (u32 *) arg))
|
||||
if (get_user(tmp, p))
|
||||
return -EINVAL;
|
||||
if (tmp == WDIOS_ENABLECARD) {
|
||||
booke_wdt_ping();
|
||||
|
@ -172,7 +173,7 @@ static int __init booke_wdt_init(void)
|
|||
int ret = 0;
|
||||
|
||||
printk (KERN_INFO "PowerPC Book-E Watchdog Timer Loaded\n");
|
||||
ident.firmware_version = cpu_specs[0].pvr_value;
|
||||
ident.firmware_version = cur_cpu_spec->pvr_value;
|
||||
|
||||
ret = misc_register(&booke_wdt_miscdev);
|
||||
if (ret) {
|
||||
|
|
|
@ -320,7 +320,7 @@ static int
|
|||
wdrtas_ioctl(struct inode *inode, struct file *file,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
int __user *argp = (void *)arg;
|
||||
int __user *argp = (void __user *)arg;
|
||||
int i;
|
||||
static struct watchdog_info wdinfo = {
|
||||
.options = WDRTAS_SUPPORTED_MASK,
|
||||
|
|
|
@ -105,8 +105,8 @@ static int create_packet(void *data, size_t length)
|
|||
int ordernum = 0;
|
||||
int retval = 0;
|
||||
unsigned int packet_array_size = 0;
|
||||
void **invalid_addr_packet_array = 0;
|
||||
void *packet_data_temp_buf = 0;
|
||||
void **invalid_addr_packet_array = NULL;
|
||||
void *packet_data_temp_buf = NULL;
|
||||
unsigned int idx = 0;
|
||||
|
||||
pr_debug("create_packet: entry \n");
|
||||
|
@ -178,7 +178,7 @@ static int create_packet(void *data, size_t length)
|
|||
packet_data_temp_buf),
|
||||
allocation_floor);
|
||||
invalid_addr_packet_array[idx++] = packet_data_temp_buf;
|
||||
packet_data_temp_buf = 0;
|
||||
packet_data_temp_buf = NULL;
|
||||
}
|
||||
}
|
||||
spin_lock(&rbu_data.lock);
|
||||
|
|
|
@ -529,14 +529,15 @@ mv64xxx_i2c_probe(struct platform_device *pd)
|
|||
i2c_set_adapdata(&drv_data->adapter, drv_data);
|
||||
|
||||
if (request_irq(drv_data->irq, mv64xxx_i2c_intr, 0,
|
||||
MV64XXX_I2C_CTLR_NAME, drv_data)) {
|
||||
|
||||
dev_err(dev, "mv64xxx: Can't register intr handler "
|
||||
"irq: %d\n", drv_data->irq);
|
||||
MV64XXX_I2C_CTLR_NAME, drv_data)) {
|
||||
dev_err(&drv_data->adapter.dev,
|
||||
"mv64xxx: Can't register intr handler irq: %d\n",
|
||||
drv_data->irq);
|
||||
rc = -EINVAL;
|
||||
goto exit_unmap_regs;
|
||||
} else if ((rc = i2c_add_adapter(&drv_data->adapter)) != 0) {
|
||||
dev_err(dev, "mv64xxx: Can't add i2c adapter, rc: %d\n", -rc);
|
||||
dev_err(&drv_data->adapter.dev,
|
||||
"mv64xxx: Can't add i2c adapter, rc: %d\n", -rc);
|
||||
goto exit_free_irq;
|
||||
}
|
||||
|
||||
|
|
|
@ -807,14 +807,6 @@ config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
|
|||
depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
|
||||
endchoice
|
||||
|
||||
config BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
|
||||
bool "Enable burstable Mode on DbDMA"
|
||||
default false
|
||||
depends BLK_DEV_IDE_AU1XXX
|
||||
help
|
||||
This option enable the burstable Flag on DbDMA controller
|
||||
(cf. "AMD Alchemy 'Au1200' Processor Data Book - PRELIMINARY").
|
||||
|
||||
config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
|
||||
int "Maximum transfer size (KB) per request (up to 128)"
|
||||
default "128"
|
||||
|
@ -940,7 +932,7 @@ config BLK_DEV_Q40IDE
|
|||
|
||||
config BLK_DEV_MPC8xx_IDE
|
||||
bool "MPC8xx IDE support"
|
||||
depends on 8xx
|
||||
depends on 8xx && IDE=y && BLK_DEV_IDE=y
|
||||
help
|
||||
This option provides support for IDE on Motorola MPC8xx Systems.
|
||||
Please see 'Type of MPC8xx IDE interface' for details.
|
||||
|
|
|
@ -1292,7 +1292,6 @@ static ide_startstop_t cdrom_start_seek (ide_drive_t *drive, unsigned int block)
|
|||
struct cdrom_info *info = drive->driver_data;
|
||||
|
||||
info->dma = 0;
|
||||
info->cmd = 0;
|
||||
info->start_seek = jiffies;
|
||||
return cdrom_start_packet_command(drive, 0, cdrom_start_seek_continuation);
|
||||
}
|
||||
|
@ -1344,8 +1343,6 @@ static ide_startstop_t cdrom_start_read (ide_drive_t *drive, unsigned int block)
|
|||
(rq->nr_sectors & (sectors_per_frame - 1)))
|
||||
info->dma = 0;
|
||||
|
||||
info->cmd = READ;
|
||||
|
||||
/* Start sending the read request to the drive. */
|
||||
return cdrom_start_packet_command(drive, 32768, cdrom_start_read_continuation);
|
||||
}
|
||||
|
@ -1484,7 +1481,6 @@ static ide_startstop_t cdrom_do_packet_command (ide_drive_t *drive)
|
|||
struct cdrom_info *info = drive->driver_data;
|
||||
|
||||
info->dma = 0;
|
||||
info->cmd = 0;
|
||||
rq->flags &= ~REQ_FAILED;
|
||||
len = rq->data_len;
|
||||
|
||||
|
@ -1891,7 +1887,6 @@ static ide_startstop_t cdrom_start_write(ide_drive_t *drive, struct request *rq)
|
|||
/* use dma, if possible. we don't need to check more, since we
|
||||
* know that the transfer is always (at least!) frame aligned */
|
||||
info->dma = drive->using_dma ? 1 : 0;
|
||||
info->cmd = WRITE;
|
||||
|
||||
info->devinfo.media_written = 1;
|
||||
|
||||
|
@ -1916,7 +1911,6 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq)
|
|||
rq->flags |= REQ_QUIET;
|
||||
|
||||
info->dma = 0;
|
||||
info->cmd = 0;
|
||||
|
||||
/*
|
||||
* sg request
|
||||
|
@ -1925,7 +1919,6 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq)
|
|||
int mask = drive->queue->dma_alignment;
|
||||
unsigned long addr = (unsigned long) page_address(bio_page(rq->bio));
|
||||
|
||||
info->cmd = rq_data_dir(rq);
|
||||
info->dma = drive->using_dma;
|
||||
|
||||
/*
|
||||
|
|
|
@ -480,7 +480,6 @@ struct cdrom_info {
|
|||
|
||||
struct request request_sense_request;
|
||||
int dma;
|
||||
int cmd;
|
||||
unsigned long last_block;
|
||||
unsigned long start_seek;
|
||||
/* Buffer to hold mechanism status and changer slot table. */
|
||||
|
|
|
@ -1034,12 +1034,12 @@ static int ide_disk_remove(struct device *dev)
|
|||
struct ide_disk_obj *idkp = drive->driver_data;
|
||||
struct gendisk *g = idkp->disk;
|
||||
|
||||
ide_cacheflush_p(drive);
|
||||
|
||||
ide_unregister_subdriver(drive, idkp->driver);
|
||||
|
||||
del_gendisk(g);
|
||||
|
||||
ide_cacheflush_p(drive);
|
||||
|
||||
ide_disk_put(idkp);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -90,11 +90,6 @@
|
|||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
struct drive_list_entry {
|
||||
const char *id_model;
|
||||
const char *id_firmware;
|
||||
};
|
||||
|
||||
static const struct drive_list_entry drive_whitelist [] = {
|
||||
|
||||
{ "Micropolis 2112A" , "ALL" },
|
||||
|
@ -139,7 +134,7 @@ static const struct drive_list_entry drive_blacklist [] = {
|
|||
};
|
||||
|
||||
/**
|
||||
* in_drive_list - look for drive in black/white list
|
||||
* ide_in_drive_list - look for drive in black/white list
|
||||
* @id: drive identifier
|
||||
* @drive_table: list to inspect
|
||||
*
|
||||
|
@ -147,7 +142,7 @@ static const struct drive_list_entry drive_blacklist [] = {
|
|||
* Returns 1 if the drive is found in the table.
|
||||
*/
|
||||
|
||||
static int in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
|
||||
int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
|
||||
{
|
||||
for ( ; drive_table->id_model ; drive_table++)
|
||||
if ((!strcmp(drive_table->id_model, id->model)) &&
|
||||
|
@ -157,6 +152,8 @@ static int in_drive_list(struct hd_driveid *id, const struct drive_list_entry *d
|
|||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(ide_in_drive_list);
|
||||
|
||||
/**
|
||||
* ide_dma_intr - IDE DMA interrupt handler
|
||||
* @drive: the drive the interrupt is for
|
||||
|
@ -663,7 +660,7 @@ int __ide_dma_bad_drive (ide_drive_t *drive)
|
|||
{
|
||||
struct hd_driveid *id = drive->id;
|
||||
|
||||
int blacklist = in_drive_list(id, drive_blacklist);
|
||||
int blacklist = ide_in_drive_list(id, drive_blacklist);
|
||||
if (blacklist) {
|
||||
printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
|
||||
drive->name, id->model);
|
||||
|
@ -677,7 +674,7 @@ EXPORT_SYMBOL(__ide_dma_bad_drive);
|
|||
int __ide_dma_good_drive (ide_drive_t *drive)
|
||||
{
|
||||
struct hd_driveid *id = drive->id;
|
||||
return in_drive_list(id, drive_whitelist);
|
||||
return ide_in_drive_list(id, drive_whitelist);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__ide_dma_good_drive);
|
||||
|
|
|
@ -1 +1,4 @@
|
|||
obj-$(CONFIG_BLK_DEV_IDE_SWARM) += swarm.o
|
||||
obj-$(CONFIG_BLK_DEV_IDE_AU1XXX) += au1xxx-ide.o
|
||||
|
||||
EXTRA_CFLAGS := -Idrivers/ide
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -622,12 +622,18 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
|
|||
ide_hwif_t *hwif;
|
||||
int h;
|
||||
|
||||
/*
|
||||
* Find an empty HWIF; if none available, return -ENOMEM.
|
||||
*/
|
||||
for (h = 0; h < MAX_HWIFS; ++h) {
|
||||
hwif = &ide_hwifs[h];
|
||||
/* Find an empty HWIF */
|
||||
if (hwif->chipset == ide_unknown)
|
||||
break;
|
||||
}
|
||||
if (h == MAX_HWIFS) {
|
||||
printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", d->name);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* Get the CmdBlk and CtrlBlk Base Registers */
|
||||
base = pci_resource_start(dev, 0) + IOC4_CMD_OFFSET;
|
||||
|
|
|
@ -80,6 +80,7 @@ static struct via_isa_bridge {
|
|||
u16 flags;
|
||||
} via_isa_bridges[] = {
|
||||
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
|
|
|
@ -320,7 +320,7 @@ static struct dmi_system_id dmi_ids[] = {
|
|||
},
|
||||
.driver_data = keymap_acer_aspire_1500
|
||||
},
|
||||
{ 0, }
|
||||
{ NULL, }
|
||||
};
|
||||
|
||||
static int __init select_keymap(void)
|
||||
|
|
|
@ -42,7 +42,7 @@ static struct alps_model_info alps_model_data[] = {
|
|||
{ { 0x53, 0x02, 0x14 }, 0xf8, 0xf8, 0 },
|
||||
{ { 0x63, 0x02, 0x0a }, 0xf8, 0xf8, 0 },
|
||||
{ { 0x63, 0x02, 0x14 }, 0xf8, 0xf8, 0 },
|
||||
{ { 0x63, 0x02, 0x28 }, 0xf8, 0xf8, 0 },
|
||||
{ { 0x63, 0x02, 0x28 }, 0xf8, 0xf8, ALPS_FW_BK_2 }, /* Fujitsu Siemens S6010 */
|
||||
{ { 0x63, 0x02, 0x3c }, 0x8f, 0x8f, ALPS_WHEEL }, /* Toshiba Satellite S2400-103 */
|
||||
{ { 0x63, 0x02, 0x50 }, 0xef, 0xef, ALPS_FW_BK_1 }, /* NEC Versa L320 */
|
||||
{ { 0x63, 0x02, 0x64 }, 0xf8, 0xf8, 0 },
|
||||
|
|
|
@ -406,7 +406,7 @@ static int ca_send_message(struct dst_state *state, struct ca_msg *p_ca_message,
|
|||
}
|
||||
dprintk(verbose, DST_CA_DEBUG, 1, " ");
|
||||
|
||||
if (copy_from_user(p_ca_message, (void *)arg, sizeof (struct ca_msg))) {
|
||||
if (copy_from_user(p_ca_message, arg, sizeof (struct ca_msg))) {
|
||||
result = -EFAULT;
|
||||
goto free_mem_and_exit;
|
||||
}
|
||||
|
@ -579,7 +579,7 @@ static int dst_ca_release(struct inode *inode, struct file *file)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int dst_ca_read(struct file *file, char __user *buffer, size_t length, loff_t *offset)
|
||||
static ssize_t dst_ca_read(struct file *file, char __user *buffer, size_t length, loff_t *offset)
|
||||
{
|
||||
int bytes_read = 0;
|
||||
|
||||
|
@ -588,7 +588,7 @@ static int dst_ca_read(struct file *file, char __user *buffer, size_t length, lo
|
|||
return bytes_read;
|
||||
}
|
||||
|
||||
static int dst_ca_write(struct file *file, const char __user *buffer, size_t length, loff_t *offset)
|
||||
static ssize_t dst_ca_write(struct file *file, const char __user *buffer, size_t length, loff_t *offset)
|
||||
{
|
||||
dprintk(verbose, DST_CA_DEBUG, 1, " Device write.");
|
||||
|
||||
|
|
|
@ -126,7 +126,7 @@ u32 em28xx_request_buffers(struct em28xx *dev, u32 count)
|
|||
const size_t imagesize = PAGE_ALIGN(dev->frame_size); /*needs to be page aligned cause the buffers can be mapped individually! */
|
||||
void *buff = NULL;
|
||||
u32 i;
|
||||
em28xx_coredbg("requested %i buffers with size %i", count, imagesize);
|
||||
em28xx_coredbg("requested %i buffers with size %zd", count, imagesize);
|
||||
if (count > EM28XX_NUM_FRAMES)
|
||||
count = EM28XX_NUM_FRAMES;
|
||||
|
||||
|
|
|
@ -303,6 +303,7 @@ static int __devinit i2o_pci_probe(struct pci_dev *pdev,
|
|||
struct i2o_controller *c;
|
||||
int rc;
|
||||
struct pci_dev *i960 = NULL;
|
||||
int pci_dev_busy = 0;
|
||||
|
||||
printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
|
||||
|
||||
|
@ -395,6 +396,8 @@ static int __devinit i2o_pci_probe(struct pci_dev *pdev,
|
|||
if ((rc = i2o_pci_alloc(c))) {
|
||||
printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
|
||||
" failed\n", c->name);
|
||||
if (rc == -ENODEV)
|
||||
pci_dev_busy = 1;
|
||||
goto free_controller;
|
||||
}
|
||||
|
||||
|
@ -425,7 +428,8 @@ static int __devinit i2o_pci_probe(struct pci_dev *pdev,
|
|||
i2o_iop_free(c);
|
||||
|
||||
disable:
|
||||
pci_disable_device(pdev);
|
||||
if (!pci_dev_busy)
|
||||
pci_disable_device(pdev);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
|
|
@ -679,7 +679,15 @@ static void mmc_idle_cards(struct mmc_host *host)
|
|||
}
|
||||
|
||||
/*
|
||||
* Apply power to the MMC stack.
|
||||
* Apply power to the MMC stack. This is a two-stage process.
|
||||
* First, we enable power to the card without the clock running.
|
||||
* We then wait a bit for the power to stabilise. Finally,
|
||||
* enable the bus drivers and clock to the card.
|
||||
*
|
||||
* We must _NOT_ enable the clock prior to power stablising.
|
||||
*
|
||||
* If a host does all the power sequencing itself, ignore the
|
||||
* initial MMC_POWER_UP stage.
|
||||
*/
|
||||
static void mmc_power_up(struct mmc_host *host)
|
||||
{
|
||||
|
|
|
@ -3070,7 +3070,7 @@ int s2io_set_swapper(nic_t * sp)
|
|||
|
||||
static int wait_for_msix_trans(nic_t *nic, int i)
|
||||
{
|
||||
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
|
||||
XENA_dev_config_t __iomem *bar0 = nic->bar0;
|
||||
u64 val64;
|
||||
int ret = 0, cnt = 0;
|
||||
|
||||
|
@ -3091,7 +3091,7 @@ static int wait_for_msix_trans(nic_t *nic, int i)
|
|||
|
||||
void restore_xmsi_data(nic_t *nic)
|
||||
{
|
||||
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
|
||||
XENA_dev_config_t __iomem *bar0 = nic->bar0;
|
||||
u64 val64;
|
||||
int i;
|
||||
|
||||
|
@ -3109,7 +3109,7 @@ void restore_xmsi_data(nic_t *nic)
|
|||
|
||||
static void store_xmsi_data(nic_t *nic)
|
||||
{
|
||||
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
|
||||
XENA_dev_config_t __iomem *bar0 = nic->bar0;
|
||||
u64 val64, addr, data;
|
||||
int i;
|
||||
|
||||
|
@ -3132,7 +3132,7 @@ static void store_xmsi_data(nic_t *nic)
|
|||
|
||||
int s2io_enable_msi(nic_t *nic)
|
||||
{
|
||||
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
|
||||
XENA_dev_config_t __iomem *bar0 = nic->bar0;
|
||||
u16 msi_ctrl, msg_val;
|
||||
struct config_param *config = &nic->config;
|
||||
struct net_device *dev = nic->dev;
|
||||
|
@ -3182,7 +3182,7 @@ int s2io_enable_msi(nic_t *nic)
|
|||
|
||||
int s2io_enable_msi_x(nic_t *nic)
|
||||
{
|
||||
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
|
||||
XENA_dev_config_t __iomem *bar0 = nic->bar0;
|
||||
u64 tx_mat, rx_mat;
|
||||
u16 msi_control; /* Temp variable */
|
||||
int ret, i, j, msix_indx = 1;
|
||||
|
|
|
@ -68,8 +68,8 @@
|
|||
|
||||
#define DRV_MODULE_NAME "tg3"
|
||||
#define PFX DRV_MODULE_NAME ": "
|
||||
#define DRV_MODULE_VERSION "3.44"
|
||||
#define DRV_MODULE_RELDATE "Dec 6, 2005"
|
||||
#define DRV_MODULE_VERSION "3.45"
|
||||
#define DRV_MODULE_RELDATE "Dec 13, 2005"
|
||||
|
||||
#define TG3_DEF_MAC_MODE 0
|
||||
#define TG3_DEF_RX_MODE 0
|
||||
|
@ -1025,7 +1025,9 @@ static void tg3_frob_aux_power(struct tg3 *tp)
|
|||
|
||||
|
||||
if ((tp->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0 ||
|
||||
(tp_peer->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0) {
|
||||
(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0 ||
|
||||
(tp_peer->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0 ||
|
||||
(tp_peer->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) {
|
||||
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
|
||||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701) {
|
||||
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
|
||||
|
@ -1105,6 +1107,8 @@ static int tg3_setup_phy(struct tg3 *, int);
|
|||
|
||||
static void tg3_write_sig_post_reset(struct tg3 *, int);
|
||||
static int tg3_halt_cpu(struct tg3 *, u32);
|
||||
static int tg3_nvram_lock(struct tg3 *);
|
||||
static void tg3_nvram_unlock(struct tg3 *);
|
||||
|
||||
static int tg3_set_power_state(struct tg3 *tp, int state)
|
||||
{
|
||||
|
@ -1179,6 +1183,21 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
|
|||
tg3_setup_phy(tp, 0);
|
||||
}
|
||||
|
||||
if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
|
||||
int i;
|
||||
u32 val;
|
||||
|
||||
for (i = 0; i < 200; i++) {
|
||||
tg3_read_mem(tp, NIC_SRAM_FW_ASF_STATUS_MBOX, &val);
|
||||
if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1)
|
||||
break;
|
||||
msleep(1);
|
||||
}
|
||||
}
|
||||
tg3_write_mem(tp, NIC_SRAM_WOL_MBOX, WOL_SIGNATURE |
|
||||
WOL_DRV_STATE_SHUTDOWN |
|
||||
WOL_DRV_WOL | WOL_SET_MAGIC_PKT);
|
||||
|
||||
pci_read_config_word(tp->pdev, pm + PCI_PM_PMC, &power_caps);
|
||||
|
||||
if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) {
|
||||
|
@ -1268,6 +1287,17 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
|
|||
}
|
||||
}
|
||||
|
||||
if (!(tp->tg3_flags & TG3_FLAG_WOL_ENABLE) &&
|
||||
!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
|
||||
/* Turn off the PHY */
|
||||
if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
|
||||
tg3_writephy(tp, MII_TG3_EXT_CTRL,
|
||||
MII_TG3_EXT_CTRL_FORCE_LED_OFF);
|
||||
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x01b2);
|
||||
tg3_writephy(tp, MII_BMCR, BMCR_PDOWN);
|
||||
}
|
||||
}
|
||||
|
||||
tg3_frob_aux_power(tp);
|
||||
|
||||
/* Workaround for unstable PLL clock */
|
||||
|
@ -1277,8 +1307,12 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
|
|||
|
||||
val &= ~((1 << 16) | (1 << 4) | (1 << 2) | (1 << 1) | 1);
|
||||
tw32(0x7d00, val);
|
||||
if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))
|
||||
if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
|
||||
tg3_nvram_lock(tp);
|
||||
tg3_halt_cpu(tp, RX_CPU_BASE);
|
||||
tw32_f(NVRAM_SWARB, SWARB_REQ_CLR0);
|
||||
tg3_nvram_unlock(tp);
|
||||
}
|
||||
}
|
||||
|
||||
/* Finally, set the new power state. */
|
||||
|
@ -1812,7 +1846,7 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
|
|||
}
|
||||
}
|
||||
relink:
|
||||
if (current_link_up == 0) {
|
||||
if (current_link_up == 0 || tp->link_config.phy_is_low_power) {
|
||||
u32 tmp;
|
||||
|
||||
tg3_phy_copper_begin(tp);
|
||||
|
@ -8533,6 +8567,7 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
|
|||
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) {
|
||||
tp->tg3_flags |= TG3_FLAG_NVRAM;
|
||||
|
||||
tg3_nvram_lock(tp);
|
||||
tg3_enable_nvram_access(tp);
|
||||
|
||||
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
|
||||
|
@ -8543,6 +8578,7 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
|
|||
tg3_get_nvram_size(tp);
|
||||
|
||||
tg3_disable_nvram_access(tp);
|
||||
tg3_nvram_unlock(tp);
|
||||
|
||||
} else {
|
||||
tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED);
|
||||
|
@ -8640,10 +8676,10 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
|
|||
if (ret == 0)
|
||||
*val = swab32(tr32(NVRAM_RDDATA));
|
||||
|
||||
tg3_nvram_unlock(tp);
|
||||
|
||||
tg3_disable_nvram_access(tp);
|
||||
|
||||
tg3_nvram_unlock(tp);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -8728,6 +8764,10 @@ static int tg3_nvram_write_block_unbuffered(struct tg3 *tp, u32 offset, u32 len,
|
|||
|
||||
offset = offset + (pagesize - page_off);
|
||||
|
||||
/* Nvram lock released by tg3_nvram_read() above,
|
||||
* so need to get it again.
|
||||
*/
|
||||
tg3_nvram_lock(tp);
|
||||
tg3_enable_nvram_access(tp);
|
||||
|
||||
/*
|
||||
|
@ -10437,8 +10477,13 @@ static struct pci_dev * __devinit tg3_find_5704_peer(struct tg3 *tp)
|
|||
break;
|
||||
pci_dev_put(peer);
|
||||
}
|
||||
if (!peer || peer == tp->pdev)
|
||||
BUG();
|
||||
/* 5704 can be configured in single-port mode, set peer to
|
||||
* tp->pdev in that case.
|
||||
*/
|
||||
if (!peer) {
|
||||
peer = tp->pdev;
|
||||
return peer;
|
||||
}
|
||||
|
||||
/*
|
||||
* We don't need to keep the refcount elevated; there's no way
|
||||
|
@ -10820,12 +10865,14 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state)
|
|||
|
||||
tg3_full_lock(tp, 0);
|
||||
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
|
||||
tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;
|
||||
tg3_full_unlock(tp);
|
||||
|
||||
err = tg3_set_power_state(tp, pci_choose_state(pdev, state));
|
||||
if (err) {
|
||||
tg3_full_lock(tp, 0);
|
||||
|
||||
tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
|
||||
tg3_init_hw(tp);
|
||||
|
||||
tp->timer.expires = jiffies + tp->timer_offset;
|
||||
|
@ -10859,6 +10906,7 @@ static int tg3_resume(struct pci_dev *pdev)
|
|||
|
||||
tg3_full_lock(tp, 0);
|
||||
|
||||
tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
|
||||
tg3_init_hw(tp);
|
||||
|
||||
tp->timer.expires = jiffies + tp->timer_offset;
|
||||
|
|
|
@ -1529,6 +1529,12 @@
|
|||
#define NIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14
|
||||
#define NIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18
|
||||
|
||||
#define NIC_SRAM_WOL_MBOX 0x00000d30
|
||||
#define WOL_SIGNATURE 0x474c0000
|
||||
#define WOL_DRV_STATE_SHUTDOWN 0x00000001
|
||||
#define WOL_DRV_WOL 0x00000002
|
||||
#define WOL_SET_MAGIC_PKT 0x00000004
|
||||
|
||||
#define NIC_SRAM_DATA_CFG_2 0x00000d38
|
||||
|
||||
#define SHASTA_EXT_LED_MODE_MASK 0x00018000
|
||||
|
@ -1565,6 +1571,7 @@
|
|||
#define MII_TG3_EXT_CTRL 0x10 /* Extended control register */
|
||||
#define MII_TG3_EXT_CTRL_FIFO_ELASTIC 0x0001
|
||||
#define MII_TG3_EXT_CTRL_LNK3_LED_MODE 0x0002
|
||||
#define MII_TG3_EXT_CTRL_FORCE_LED_OFF 0x0008
|
||||
#define MII_TG3_EXT_CTRL_TBI 0x8000
|
||||
|
||||
#define MII_TG3_EXT_STAT 0x11 /* Extended status register */
|
||||
|
|
|
@ -6,6 +6,9 @@ obj-y += access.o bus.o probe.o remove.o pci.o quirks.o \
|
|||
pci-driver.o search.o pci-sysfs.o rom.o setup-res.o
|
||||
obj-$(CONFIG_PROC_FS) += proc.o
|
||||
|
||||
# Build PCI Express stuff if needed
|
||||
obj-$(CONFIG_PCIEPORTBUS) += pcie/
|
||||
|
||||
obj-$(CONFIG_HOTPLUG) += hotplug.o
|
||||
|
||||
# Build the PCI Hotplug drivers if we were asked to
|
||||
|
@ -40,7 +43,3 @@ endif
|
|||
ifeq ($(CONFIG_PCI_DEBUG),y)
|
||||
EXTRA_CFLAGS += -DDEBUG
|
||||
endif
|
||||
|
||||
# Build PCI Express stuff if needed
|
||||
obj-$(CONFIG_PCIEPORTBUS) += pcie/
|
||||
|
||||
|
|
|
@ -249,11 +249,11 @@ static loff_t jsf_lseek(struct file * file, loff_t offset, int orig)
|
|||
/*
|
||||
* OS SIMM Cannot be read in other size but a 32bits word.
|
||||
*/
|
||||
static ssize_t jsf_read(struct file * file, char * buf,
|
||||
static ssize_t jsf_read(struct file * file, char __user * buf,
|
||||
size_t togo, loff_t *ppos)
|
||||
{
|
||||
unsigned long p = *ppos;
|
||||
char *tmp = buf;
|
||||
char __user *tmp = buf;
|
||||
|
||||
union byte4 {
|
||||
char s[4];
|
||||
|
@ -305,7 +305,7 @@ static ssize_t jsf_read(struct file * file, char * buf,
|
|||
return tmp-buf;
|
||||
}
|
||||
|
||||
static ssize_t jsf_write(struct file * file, const char * buf,
|
||||
static ssize_t jsf_write(struct file * file, const char __user * buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
return -ENOSPC;
|
||||
|
@ -356,10 +356,10 @@ static int jsf_ioctl_erase(unsigned long arg)
|
|||
* Program a block of flash.
|
||||
* Very simple because we can do it byte by byte anyway.
|
||||
*/
|
||||
static int jsf_ioctl_program(unsigned long arg)
|
||||
static int jsf_ioctl_program(void __user *arg)
|
||||
{
|
||||
struct jsflash_program_arg abuf;
|
||||
char *uptr;
|
||||
char __user *uptr;
|
||||
unsigned long p;
|
||||
unsigned int togo;
|
||||
union {
|
||||
|
@ -367,13 +367,13 @@ static int jsf_ioctl_program(unsigned long arg)
|
|||
char s[4];
|
||||
} b;
|
||||
|
||||
if (copy_from_user(&abuf, (char *)arg, JSFPRGSZ))
|
||||
if (copy_from_user(&abuf, arg, JSFPRGSZ))
|
||||
return -EFAULT;
|
||||
p = abuf.off;
|
||||
togo = abuf.size;
|
||||
if ((togo & 3) || (p & 3)) return -EINVAL;
|
||||
|
||||
uptr = (char *) (unsigned long) abuf.data;
|
||||
uptr = (char __user *) (unsigned long) abuf.data;
|
||||
while (togo != 0) {
|
||||
togo -= 4;
|
||||
if (copy_from_user(&b.s[0], uptr, 4))
|
||||
|
@ -390,19 +390,20 @@ static int jsf_ioctl(struct inode *inode, struct file *f, unsigned int cmd,
|
|||
unsigned long arg)
|
||||
{
|
||||
int error = -ENOTTY;
|
||||
void __user *argp = (void __user *)arg;
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EPERM;
|
||||
switch (cmd) {
|
||||
case JSFLASH_IDENT:
|
||||
if (copy_to_user((void *)arg, &jsf0.id, JSFIDSZ))
|
||||
if (copy_to_user(argp, &jsf0.id, JSFIDSZ))
|
||||
return -EFAULT;
|
||||
break;
|
||||
case JSFLASH_ERASE:
|
||||
error = jsf_ioctl_erase(arg);
|
||||
break;
|
||||
case JSFLASH_PROGRAM:
|
||||
error = jsf_ioctl_program(arg);
|
||||
error = jsf_ioctl_program(argp);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
@ -309,7 +309,7 @@ static void uctrl_do_txn(struct uctrl_txn *txn)
|
|||
}
|
||||
}
|
||||
|
||||
void uctrl_get_event_status()
|
||||
void uctrl_get_event_status(void)
|
||||
{
|
||||
struct uctrl_driver *driver = &drv;
|
||||
struct uctrl_txn txn;
|
||||
|
@ -318,7 +318,7 @@ void uctrl_get_event_status()
|
|||
txn.opcode = READ_EVENT_STATUS;
|
||||
txn.inbits = 0;
|
||||
txn.outbits = 2;
|
||||
txn.inbuf = 0;
|
||||
txn.inbuf = NULL;
|
||||
txn.outbuf = outbits;
|
||||
|
||||
uctrl_do_txn(&txn);
|
||||
|
@ -329,7 +329,7 @@ void uctrl_get_event_status()
|
|||
dprintk(("ev is %x\n", driver->status.event_status));
|
||||
}
|
||||
|
||||
void uctrl_get_external_status()
|
||||
void uctrl_get_external_status(void)
|
||||
{
|
||||
struct uctrl_driver *driver = &drv;
|
||||
struct uctrl_txn txn;
|
||||
|
@ -339,7 +339,7 @@ void uctrl_get_external_status()
|
|||
txn.opcode = READ_EXTERNAL_STATUS;
|
||||
txn.inbits = 0;
|
||||
txn.outbits = 2;
|
||||
txn.inbuf = 0;
|
||||
txn.inbuf = NULL;
|
||||
txn.outbuf = outbits;
|
||||
|
||||
uctrl_do_txn(&txn);
|
||||
|
@ -414,7 +414,7 @@ static void __exit ts102_uctrl_cleanup(void)
|
|||
if (driver->irq)
|
||||
free_irq(driver->irq, driver);
|
||||
if (driver->regs)
|
||||
driver->regs = 0;
|
||||
driver->regs = NULL;
|
||||
}
|
||||
|
||||
module_init(ts102_uctrl_init);
|
||||
|
|
|
@ -125,7 +125,7 @@ struct vfc_regs {
|
|||
|
||||
|
||||
struct vfc_dev {
|
||||
volatile struct vfc_regs *regs;
|
||||
volatile struct vfc_regs __iomem *regs;
|
||||
struct vfc_regs *phys_regs;
|
||||
unsigned int control_reg;
|
||||
struct semaphore device_lock_sem;
|
||||
|
|
|
@ -149,7 +149,7 @@ int init_vfc_device(struct sbus_dev *sdev,struct vfc_dev *dev, int instance)
|
|||
}
|
||||
printk("Initializing vfc%d\n",instance);
|
||||
dev->regs = NULL;
|
||||
dev->regs = (volatile struct vfc_regs *)
|
||||
dev->regs = (volatile struct vfc_regs __iomem *)
|
||||
sbus_ioremap(&sdev->resource[0], 0,
|
||||
sizeof(struct vfc_regs), vfcstr);
|
||||
dev->which_io = sdev->reg_addrs[0].which_io;
|
||||
|
@ -319,7 +319,7 @@ int vfc_capture_poll(struct vfc_dev *dev)
|
|||
int timeout = 1000;
|
||||
|
||||
while (!timeout--) {
|
||||
if (dev->regs->control & VFC_STATUS_CAPTURE)
|
||||
if (sbus_readl(&dev->regs->control) & VFC_STATUS_CAPTURE)
|
||||
break;
|
||||
vfc_i2c_delay_no_busy(dev, 100);
|
||||
}
|
||||
|
@ -718,7 +718,7 @@ static void deinit_vfc_device(struct vfc_dev *dev)
|
|||
if(dev == NULL)
|
||||
return;
|
||||
devfs_remove("vfc/%d", dev->instance);
|
||||
sbus_iounmap((unsigned long)dev->regs, sizeof(struct vfc_regs));
|
||||
sbus_iounmap(dev->regs, sizeof(struct vfc_regs));
|
||||
kfree(dev);
|
||||
}
|
||||
|
||||
|
|
|
@ -660,7 +660,12 @@ static int adpt_abort(struct scsi_cmnd * cmd)
|
|||
msg[2] = 0;
|
||||
msg[3]= 0;
|
||||
msg[4] = (u32)cmd;
|
||||
if( (rcode = adpt_i2o_post_wait(pHba, msg, sizeof(msg), FOREVER)) != 0){
|
||||
if (pHba->host)
|
||||
spin_lock_irq(pHba->host->host_lock);
|
||||
rcode = adpt_i2o_post_wait(pHba, msg, sizeof(msg), FOREVER);
|
||||
if (pHba->host)
|
||||
spin_unlock_irq(pHba->host->host_lock);
|
||||
if (rcode != 0) {
|
||||
if(rcode == -EOPNOTSUPP ){
|
||||
printk(KERN_INFO"%s: Abort cmd not supported\n",pHba->name);
|
||||
return FAILED;
|
||||
|
@ -697,10 +702,15 @@ static int adpt_device_reset(struct scsi_cmnd* cmd)
|
|||
msg[2] = 0;
|
||||
msg[3] = 0;
|
||||
|
||||
if (pHba->host)
|
||||
spin_lock_irq(pHba->host->host_lock);
|
||||
old_state = d->state;
|
||||
d->state |= DPTI_DEV_RESET;
|
||||
if( (rcode = adpt_i2o_post_wait(pHba, msg,sizeof(msg), FOREVER)) ){
|
||||
d->state = old_state;
|
||||
rcode = adpt_i2o_post_wait(pHba, msg,sizeof(msg), FOREVER);
|
||||
d->state = old_state;
|
||||
if (pHba->host)
|
||||
spin_unlock_irq(pHba->host->host_lock);
|
||||
if (rcode != 0) {
|
||||
if(rcode == -EOPNOTSUPP ){
|
||||
printk(KERN_INFO"%s: Device reset not supported\n",pHba->name);
|
||||
return FAILED;
|
||||
|
@ -708,7 +718,6 @@ static int adpt_device_reset(struct scsi_cmnd* cmd)
|
|||
printk(KERN_INFO"%s: Device reset failed\n",pHba->name);
|
||||
return FAILED;
|
||||
} else {
|
||||
d->state = old_state;
|
||||
printk(KERN_INFO"%s: Device reset successful\n",pHba->name);
|
||||
return SUCCESS;
|
||||
}
|
||||
|
@ -721,6 +730,7 @@ static int adpt_bus_reset(struct scsi_cmnd* cmd)
|
|||
{
|
||||
adpt_hba* pHba;
|
||||
u32 msg[4];
|
||||
u32 rcode;
|
||||
|
||||
pHba = (adpt_hba*)cmd->device->host->hostdata[0];
|
||||
memset(msg, 0, sizeof(msg));
|
||||
|
@ -729,7 +739,12 @@ static int adpt_bus_reset(struct scsi_cmnd* cmd)
|
|||
msg[1] = (I2O_HBA_BUS_RESET<<24|HOST_TID<<12|pHba->channel[cmd->device->channel].tid);
|
||||
msg[2] = 0;
|
||||
msg[3] = 0;
|
||||
if(adpt_i2o_post_wait(pHba, msg,sizeof(msg), FOREVER) ){
|
||||
if (pHba->host)
|
||||
spin_lock_irq(pHba->host->host_lock);
|
||||
rcode = adpt_i2o_post_wait(pHba, msg,sizeof(msg), FOREVER);
|
||||
if (pHba->host)
|
||||
spin_unlock_irq(pHba->host->host_lock);
|
||||
if (rcode != 0) {
|
||||
printk(KERN_WARNING"%s: Bus reset failed.\n",pHba->name);
|
||||
return FAILED;
|
||||
} else {
|
||||
|
|
|
@ -100,7 +100,7 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
|
|||
void ibmvscsi_release_crq_queue(struct crq_queue *queue,
|
||||
struct ibmvscsi_host_data *hostdata,
|
||||
int max_requests);
|
||||
void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
|
||||
int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
|
||||
struct ibmvscsi_host_data *hostdata);
|
||||
|
||||
void ibmvscsi_handle_crq(struct viosrp_crq *crq,
|
||||
|
|
|
@ -117,9 +117,10 @@ void ibmvscsi_release_crq_queue(struct crq_queue *queue,
|
|||
*
|
||||
* no-op for iSeries
|
||||
*/
|
||||
void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
|
||||
int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
|
||||
struct ibmvscsi_host_data *hostdata)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -230,6 +230,11 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
|
|||
rc = plpar_hcall_norets(H_REG_CRQ,
|
||||
vdev->unit_address,
|
||||
queue->msg_token, PAGE_SIZE);
|
||||
if (rc == H_Resource)
|
||||
/* maybe kexecing and resource is busy. try a reset */
|
||||
rc = ibmvscsi_reset_crq_queue(queue,
|
||||
hostdata);
|
||||
|
||||
if (rc == 2) {
|
||||
/* Adapter is good, but other end is not ready */
|
||||
printk(KERN_WARNING "ibmvscsi: Partner adapter not ready\n");
|
||||
|
@ -281,7 +286,7 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
|
|||
* @hostdata: ibmvscsi_host_data of host
|
||||
*
|
||||
*/
|
||||
void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
|
||||
int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
|
||||
struct ibmvscsi_host_data *hostdata)
|
||||
{
|
||||
int rc;
|
||||
|
@ -309,4 +314,5 @@ void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
|
|||
printk(KERN_WARNING
|
||||
"ibmvscsi: couldn't register crq--rc 0x%x\n", rc);
|
||||
}
|
||||
return rc;
|
||||
}
|
||||
|
|
|
@ -3368,7 +3368,7 @@ iscsi_conn_set_param(iscsi_connh_t connh, enum iscsi_param param,
|
|||
switch(param) {
|
||||
case ISCSI_PARAM_MAX_RECV_DLENGTH: {
|
||||
char *saveptr = conn->data;
|
||||
int flags = GFP_KERNEL;
|
||||
gfp_t flags = GFP_KERNEL;
|
||||
|
||||
if (conn->data_size >= value) {
|
||||
conn->max_recv_dlength = value;
|
||||
|
|
|
@ -664,7 +664,7 @@ mega_build_cmd(adapter_t *adapter, Scsi_Cmnd *cmd, int *busy)
|
|||
sg->offset;
|
||||
} else
|
||||
buf = cmd->request_buffer;
|
||||
memset(cmd->request_buffer, 0, cmd->cmnd[4]);
|
||||
memset(buf, 0, cmd->cmnd[4]);
|
||||
if (cmd->use_sg) {
|
||||
struct scatterlist *sg;
|
||||
|
||||
|
|
|
@ -2476,17 +2476,9 @@ typedef struct scsi_qla_host {
|
|||
*/
|
||||
#define LOOP_TRANSITION(ha) \
|
||||
(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \
|
||||
test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
|
||||
|
||||
#define LOOP_NOT_READY(ha) \
|
||||
((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \
|
||||
test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags) || \
|
||||
test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \
|
||||
test_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) || \
|
||||
test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \
|
||||
atomic_read(&ha->loop_state) == LOOP_DOWN)
|
||||
|
||||
#define LOOP_RDY(ha) (!LOOP_NOT_READY(ha))
|
||||
|
||||
#define TGT_Q(ha, t) (ha->otgt[t])
|
||||
|
||||
#define to_qla_host(x) ((scsi_qla_host_t *) (x)->hostdata)
|
||||
|
|
|
@ -1259,7 +1259,7 @@ qla2x00_configure_hba(scsi_qla_host_t *ha)
|
|||
rval = qla2x00_get_adapter_id(ha,
|
||||
&loop_id, &al_pa, &area, &domain, &topo);
|
||||
if (rval != QLA_SUCCESS) {
|
||||
if (LOOP_NOT_READY(ha) || atomic_read(&ha->loop_down_timer) ||
|
||||
if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
|
||||
(rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
|
||||
DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
|
||||
__func__, ha->host_no));
|
||||
|
@ -1796,7 +1796,7 @@ qla2x00_configure_loop(scsi_qla_host_t *ha)
|
|||
}
|
||||
|
||||
if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
|
||||
if (LOOP_NOT_READY(ha)) {
|
||||
if (LOOP_TRANSITION(ha)) {
|
||||
rval = QLA_FUNCTION_FAILED;
|
||||
} else {
|
||||
rval = qla2x00_configure_fabric(ha);
|
||||
|
@ -2369,7 +2369,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
|
|||
if (qla2x00_is_reserved_id(ha, loop_id))
|
||||
continue;
|
||||
|
||||
if (atomic_read(&ha->loop_down_timer) || LOOP_NOT_READY(ha))
|
||||
if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
|
||||
break;
|
||||
|
||||
if (swl != NULL) {
|
||||
|
|
|
@ -909,6 +909,21 @@ qla2x00_status_entry(scsi_qla_host_t *ha, void *pkt)
|
|||
resid = resid_len;
|
||||
cp->resid = resid;
|
||||
CMD_RESID_LEN(cp) = resid;
|
||||
|
||||
if (!lscsi_status &&
|
||||
((unsigned)(cp->request_bufflen - resid) <
|
||||
cp->underflow)) {
|
||||
qla_printk(KERN_INFO, ha,
|
||||
"scsi(%ld:%d:%d:%d): Mid-layer underflow "
|
||||
"detected (%x of %x bytes)...returning "
|
||||
"error status.\n", ha->host_no,
|
||||
cp->device->channel, cp->device->id,
|
||||
cp->device->lun, resid,
|
||||
cp->request_bufflen);
|
||||
|
||||
cp->result = DID_ERROR << 16;
|
||||
break;
|
||||
}
|
||||
}
|
||||
cp->result = DID_OK << 16 | lscsi_status;
|
||||
|
||||
|
|
|
@ -422,10 +422,15 @@ static int scsi_eh_completed_normally(struct scsi_cmnd *scmd)
|
|||
**/
|
||||
static void scsi_eh_done(struct scsi_cmnd *scmd)
|
||||
{
|
||||
struct completion *eh_action;
|
||||
|
||||
SCSI_LOG_ERROR_RECOVERY(3,
|
||||
printk("%s scmd: %p result: %x\n",
|
||||
__FUNCTION__, scmd, scmd->result));
|
||||
complete(scmd->device->host->eh_action);
|
||||
|
||||
eh_action = scmd->device->host->eh_action;
|
||||
if (eh_action)
|
||||
complete(eh_action);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -1085,6 +1085,26 @@ static void scsi_generic_done(struct scsi_cmnd *cmd)
|
|||
scsi_io_completion(cmd, cmd->result == 0 ? cmd->bufflen : 0, 0);
|
||||
}
|
||||
|
||||
void scsi_setup_blk_pc_cmnd(struct scsi_cmnd *cmd, int retries)
|
||||
{
|
||||
struct request *req = cmd->request;
|
||||
|
||||
BUG_ON(sizeof(req->cmd) > sizeof(cmd->cmnd));
|
||||
memcpy(cmd->cmnd, req->cmd, sizeof(cmd->cmnd));
|
||||
cmd->cmd_len = req->cmd_len;
|
||||
if (!req->data_len)
|
||||
cmd->sc_data_direction = DMA_NONE;
|
||||
else if (rq_data_dir(req) == WRITE)
|
||||
cmd->sc_data_direction = DMA_TO_DEVICE;
|
||||
else
|
||||
cmd->sc_data_direction = DMA_FROM_DEVICE;
|
||||
|
||||
cmd->transfersize = req->data_len;
|
||||
cmd->allowed = retries;
|
||||
cmd->timeout_per_command = req->timeout;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(scsi_setup_blk_pc_cmnd);
|
||||
|
||||
static int scsi_prep_fn(struct request_queue *q, struct request *req)
|
||||
{
|
||||
struct scsi_device *sdev = q->queuedata;
|
||||
|
@ -1220,18 +1240,7 @@ static int scsi_prep_fn(struct request_queue *q, struct request *req)
|
|||
goto kill;
|
||||
}
|
||||
} else {
|
||||
memcpy(cmd->cmnd, req->cmd, sizeof(cmd->cmnd));
|
||||
cmd->cmd_len = req->cmd_len;
|
||||
if (rq_data_dir(req) == WRITE)
|
||||
cmd->sc_data_direction = DMA_TO_DEVICE;
|
||||
else if (req->data_len)
|
||||
cmd->sc_data_direction = DMA_FROM_DEVICE;
|
||||
else
|
||||
cmd->sc_data_direction = DMA_NONE;
|
||||
|
||||
cmd->transfersize = req->data_len;
|
||||
cmd->allowed = 3;
|
||||
cmd->timeout_per_command = req->timeout;
|
||||
scsi_setup_blk_pc_cmnd(cmd, 3);
|
||||
cmd->done = scsi_generic_done;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -249,7 +249,7 @@ static inline struct list_head *skb_to_lh(struct sk_buff *skb)
|
|||
}
|
||||
|
||||
static void*
|
||||
mempool_zone_alloc_skb(unsigned int gfp_mask, void *pool_data)
|
||||
mempool_zone_alloc_skb(gfp_t gfp_mask, void *pool_data)
|
||||
{
|
||||
struct mempool_zone *zone = pool_data;
|
||||
|
||||
|
|
|
@ -245,24 +245,10 @@ static int sd_init_command(struct scsi_cmnd * SCpnt)
|
|||
* SG_IO from block layer already setup, just copy cdb basically
|
||||
*/
|
||||
if (blk_pc_request(rq)) {
|
||||
if (sizeof(rq->cmd) > sizeof(SCpnt->cmnd))
|
||||
return 0;
|
||||
|
||||
memcpy(SCpnt->cmnd, rq->cmd, sizeof(SCpnt->cmnd));
|
||||
SCpnt->cmd_len = rq->cmd_len;
|
||||
if (rq_data_dir(rq) == WRITE)
|
||||
SCpnt->sc_data_direction = DMA_TO_DEVICE;
|
||||
else if (rq->data_len)
|
||||
SCpnt->sc_data_direction = DMA_FROM_DEVICE;
|
||||
else
|
||||
SCpnt->sc_data_direction = DMA_NONE;
|
||||
|
||||
this_count = rq->data_len;
|
||||
scsi_setup_blk_pc_cmnd(SCpnt, SD_PASSTHROUGH_RETRIES);
|
||||
if (rq->timeout)
|
||||
timeout = rq->timeout;
|
||||
|
||||
SCpnt->transfersize = rq->data_len;
|
||||
SCpnt->allowed = SD_PASSTHROUGH_RETRIES;
|
||||
goto queue;
|
||||
}
|
||||
|
||||
|
|
|
@ -320,25 +320,11 @@ static int sr_init_command(struct scsi_cmnd * SCpnt)
|
|||
* these are already setup, just copy cdb basically
|
||||
*/
|
||||
if (SCpnt->request->flags & REQ_BLOCK_PC) {
|
||||
struct request *rq = SCpnt->request;
|
||||
scsi_setup_blk_pc_cmnd(SCpnt, MAX_RETRIES);
|
||||
|
||||
if (sizeof(rq->cmd) > sizeof(SCpnt->cmnd))
|
||||
return 0;
|
||||
if (SCpnt->timeout_per_command)
|
||||
timeout = SCpnt->timeout_per_command;
|
||||
|
||||
memcpy(SCpnt->cmnd, rq->cmd, sizeof(SCpnt->cmnd));
|
||||
SCpnt->cmd_len = rq->cmd_len;
|
||||
if (!rq->data_len)
|
||||
SCpnt->sc_data_direction = DMA_NONE;
|
||||
else if (rq_data_dir(rq) == WRITE)
|
||||
SCpnt->sc_data_direction = DMA_TO_DEVICE;
|
||||
else
|
||||
SCpnt->sc_data_direction = DMA_FROM_DEVICE;
|
||||
|
||||
this_count = rq->data_len;
|
||||
if (rq->timeout)
|
||||
timeout = rq->timeout;
|
||||
|
||||
SCpnt->transfersize = rq->data_len;
|
||||
goto queue;
|
||||
}
|
||||
|
||||
|
|
|
@ -4194,27 +4194,10 @@ static void st_intr(struct scsi_cmnd *SCpnt)
|
|||
*/
|
||||
static int st_init_command(struct scsi_cmnd *SCpnt)
|
||||
{
|
||||
struct request *rq;
|
||||
|
||||
if (!(SCpnt->request->flags & REQ_BLOCK_PC))
|
||||
return 0;
|
||||
|
||||
rq = SCpnt->request;
|
||||
if (sizeof(rq->cmd) > sizeof(SCpnt->cmnd))
|
||||
return 0;
|
||||
|
||||
memcpy(SCpnt->cmnd, rq->cmd, sizeof(SCpnt->cmnd));
|
||||
SCpnt->cmd_len = rq->cmd_len;
|
||||
|
||||
if (rq_data_dir(rq) == WRITE)
|
||||
SCpnt->sc_data_direction = DMA_TO_DEVICE;
|
||||
else if (rq->data_len)
|
||||
SCpnt->sc_data_direction = DMA_FROM_DEVICE;
|
||||
else
|
||||
SCpnt->sc_data_direction = DMA_NONE;
|
||||
|
||||
SCpnt->timeout_per_command = rq->timeout;
|
||||
SCpnt->transfersize = rq->data_len;
|
||||
scsi_setup_blk_pc_cmnd(SCpnt, 0);
|
||||
SCpnt->done = st_intr;
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -1405,7 +1405,6 @@ static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
|
|||
goal->iu = 0;
|
||||
goal->dt = 0;
|
||||
goal->qas = 0;
|
||||
goal->period = 0;
|
||||
goal->offset = 0;
|
||||
return;
|
||||
}
|
||||
|
@ -1465,7 +1464,8 @@ static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgp
|
|||
* Many devices implement PPR in a buggy way, so only use it if we
|
||||
* really want to.
|
||||
*/
|
||||
if (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)) {
|
||||
if (goal->offset &&
|
||||
(goal->iu || goal->dt || goal->qas || (goal->period < 0xa))) {
|
||||
nego = NS_PPR;
|
||||
} else if (spi_width(starget) != goal->width) {
|
||||
nego = NS_WIDE;
|
||||
|
|
|
@ -717,6 +717,7 @@ static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
|
|||
* at the source, so we must turn off PIRQ.
|
||||
*/
|
||||
pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
|
||||
mb();
|
||||
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
|
||||
uhci->hc_inaccessible = 1;
|
||||
hcd->poll_rh = 0;
|
||||
|
@ -738,6 +739,7 @@ static int uhci_resume(struct usb_hcd *hcd)
|
|||
* really don't want to keep a stale HCD_FLAG_HW_ACCESSIBLE=0
|
||||
*/
|
||||
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
|
||||
mb();
|
||||
|
||||
if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
|
||||
return 0;
|
||||
|
|
|
@ -893,8 +893,10 @@ static int hid_input_report(int type, struct urb *urb, int interrupt, struct pt_
|
|||
|
||||
size = ((report->size - 1) >> 3) + 1;
|
||||
|
||||
if (len < size)
|
||||
if (len < size) {
|
||||
dbg("report %d is too short, (%d < %d)", report->id, len, size);
|
||||
memset(data + len, 0, size - len);
|
||||
}
|
||||
|
||||
if (hid->claimed & HID_CLAIMED_HIDDEV)
|
||||
hiddev_report_event(hid, report);
|
||||
|
|
|
@ -137,6 +137,7 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel
|
|||
switch (usage->hid & 0xffff) {
|
||||
case 0xba: map_abs(ABS_RUDDER); break;
|
||||
case 0xbb: map_abs(ABS_THROTTLE); break;
|
||||
default: goto ignore;
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
|
@ -1696,7 +1696,7 @@ static ssize_t auerchar_write (struct file *file, const char __user *buf, size_t
|
|||
int ret;
|
||||
wait_queue_t wait;
|
||||
|
||||
dbg ("auerchar_write %d bytes", len);
|
||||
dbg ("auerchar_write %zd bytes", len);
|
||||
|
||||
/* Error checking */
|
||||
if (!ccp)
|
||||
|
|
|
@ -441,7 +441,7 @@ static int arcfb_ioctl(struct inode *inode, struct file *file,
|
|||
* the fb. it's inefficient for them to do anything less than 64*8
|
||||
* writes since we update the lcd in each write() anyway.
|
||||
*/
|
||||
static ssize_t arcfb_write(struct file *file, const char *buf, size_t count,
|
||||
static ssize_t arcfb_write(struct file *file, const char __user *buf, size_t count,
|
||||
loff_t *ppos)
|
||||
{
|
||||
/* modded from epson 1355 */
|
||||
|
|
|
@ -1512,7 +1512,7 @@ static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
|
|||
* I/O cycles storing into a reserved memory space at
|
||||
* physical address 0x3000000
|
||||
*/
|
||||
unsigned char *iop;
|
||||
unsigned char __iomem *iop;
|
||||
|
||||
iop = ioremap(0x3000000, 0x5000);
|
||||
if (iop == NULL) {
|
||||
|
@ -1526,7 +1526,7 @@ static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
|
|||
writeb(EXT_BIU_MISC, iop + 0x3ce);
|
||||
writeb(EXT_BIU_MISC_LIN_ENABLE, iop + 0x3cf);
|
||||
|
||||
iounmap((void *)iop);
|
||||
iounmap(iop);
|
||||
#else
|
||||
/*
|
||||
* Most other machine types are "normal", so
|
||||
|
|
|
@ -1396,7 +1396,8 @@ static struct platform_driver pxafb_driver = {
|
|||
int __devinit pxafb_setup(char *options)
|
||||
{
|
||||
# ifdef CONFIG_FB_PXA_PARAMETERS
|
||||
strlcpy(g_options, options, sizeof(g_options));
|
||||
if (options)
|
||||
strlcpy(g_options, options, sizeof(g_options));
|
||||
# endif
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -32,6 +32,7 @@ void reiserfs_delete_inode(struct inode *inode)
|
|||
JOURNAL_PER_BALANCE_CNT * 2 +
|
||||
2 * REISERFS_QUOTA_INIT_BLOCKS(inode->i_sb);
|
||||
struct reiserfs_transaction_handle th;
|
||||
int err;
|
||||
|
||||
truncate_inode_pages(&inode->i_data, 0);
|
||||
|
||||
|
@ -49,15 +50,13 @@ void reiserfs_delete_inode(struct inode *inode)
|
|||
}
|
||||
reiserfs_update_inode_transaction(inode);
|
||||
|
||||
if (reiserfs_delete_object(&th, inode)) {
|
||||
up(&inode->i_sem);
|
||||
goto out;
|
||||
}
|
||||
err = reiserfs_delete_object(&th, inode);
|
||||
|
||||
/* Do quota update inside a transaction for journaled quotas. We must do that
|
||||
* after delete_object so that quota updates go into the same transaction as
|
||||
* stat data deletion */
|
||||
DQUOT_FREE_INODE(inode);
|
||||
if (!err)
|
||||
DQUOT_FREE_INODE(inode);
|
||||
|
||||
if (journal_end(&th, inode->i_sb, jbegin_count)) {
|
||||
up(&inode->i_sem);
|
||||
|
@ -66,6 +65,12 @@ void reiserfs_delete_inode(struct inode *inode)
|
|||
|
||||
up(&inode->i_sem);
|
||||
|
||||
/* check return value from reiserfs_delete_object after
|
||||
* ending the transaction
|
||||
*/
|
||||
if (err)
|
||||
goto out;
|
||||
|
||||
/* all items of file are deleted, so we can remove "save" link */
|
||||
remove_save_link(inode, 0 /* not truncate */ ); /* we can't do anything
|
||||
* about an error here */
|
||||
|
@ -2099,6 +2104,7 @@ int reiserfs_truncate_file(struct inode *p_s_inode, int update_timestamps)
|
|||
struct page *page = NULL;
|
||||
int error;
|
||||
struct buffer_head *bh = NULL;
|
||||
int err2;
|
||||
|
||||
reiserfs_write_lock(p_s_inode->i_sb);
|
||||
|
||||
|
@ -2136,14 +2142,18 @@ int reiserfs_truncate_file(struct inode *p_s_inode, int update_timestamps)
|
|||
transaction of truncating gets committed - on reboot the file
|
||||
either appears truncated properly or not truncated at all */
|
||||
add_save_link(&th, p_s_inode, 1);
|
||||
error = reiserfs_do_truncate(&th, p_s_inode, page, update_timestamps);
|
||||
if (error)
|
||||
goto out;
|
||||
err2 = reiserfs_do_truncate(&th, p_s_inode, page, update_timestamps);
|
||||
error =
|
||||
journal_end(&th, p_s_inode->i_sb, JOURNAL_PER_BALANCE_CNT * 2 + 1);
|
||||
if (error)
|
||||
goto out;
|
||||
|
||||
/* check reiserfs_do_truncate after ending the transaction */
|
||||
if (err2) {
|
||||
error = err2;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (update_timestamps) {
|
||||
error = remove_save_link(p_s_inode, 1 /* truncate */ );
|
||||
if (error)
|
||||
|
|
|
@ -1039,6 +1039,10 @@ static int flush_commit_list(struct super_block *s,
|
|||
}
|
||||
atomic_dec(&journal->j_async_throttle);
|
||||
|
||||
/* We're skipping the commit if there's an error */
|
||||
if (retval || reiserfs_is_journal_aborted(journal))
|
||||
barrier = 0;
|
||||
|
||||
/* wait on everything written so far before writing the commit
|
||||
* if we are in barrier mode, send the commit down now
|
||||
*/
|
||||
|
@ -1077,10 +1081,16 @@ static int flush_commit_list(struct super_block *s,
|
|||
BUG_ON(atomic_read(&(jl->j_commit_left)) != 1);
|
||||
|
||||
if (!barrier) {
|
||||
if (buffer_dirty(jl->j_commit_bh))
|
||||
BUG();
|
||||
mark_buffer_dirty(jl->j_commit_bh);
|
||||
sync_dirty_buffer(jl->j_commit_bh);
|
||||
/* If there was a write error in the journal - we can't commit
|
||||
* this transaction - it will be invalid and, if successful,
|
||||
* will just end up propogating the write error out to
|
||||
* the file system. */
|
||||
if (likely(!retval && !reiserfs_is_journal_aborted (journal))) {
|
||||
if (buffer_dirty(jl->j_commit_bh))
|
||||
BUG();
|
||||
mark_buffer_dirty(jl->j_commit_bh) ;
|
||||
sync_dirty_buffer(jl->j_commit_bh) ;
|
||||
}
|
||||
} else
|
||||
wait_on_buffer(jl->j_commit_bh);
|
||||
|
||||
|
|
|
@ -78,7 +78,7 @@ STATIC int xfs_qm_dqhashlock_nowait(xfs_dquot_t *);
|
|||
|
||||
STATIC int xfs_qm_init_quotainos(xfs_mount_t *);
|
||||
STATIC int xfs_qm_init_quotainfo(xfs_mount_t *);
|
||||
STATIC int xfs_qm_shake(int, unsigned int);
|
||||
STATIC int xfs_qm_shake(int, gfp_t);
|
||||
|
||||
#ifdef DEBUG
|
||||
extern mutex_t qcheck_lock;
|
||||
|
@ -2197,7 +2197,7 @@ xfs_qm_shake_freelist(
|
|||
*/
|
||||
/* ARGSUSED */
|
||||
STATIC int
|
||||
xfs_qm_shake(int nr_to_scan, unsigned int gfp_mask)
|
||||
xfs_qm_shake(int nr_to_scan, gfp_t gfp_mask)
|
||||
{
|
||||
int ndqused, nfree, n;
|
||||
|
||||
|
|
|
@ -22,6 +22,8 @@ typedef unsigned long elf_freg_t[3];
|
|||
#define R_ARM_NONE 0
|
||||
#define R_ARM_PC24 1
|
||||
#define R_ARM_ABS32 2
|
||||
#define R_ARM_CALL 28
|
||||
#define R_ARM_JUMP24 29
|
||||
|
||||
#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
|
||||
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
|
||||
|
|
|
@ -84,14 +84,6 @@ __delay (unsigned long loops)
|
|||
ia64_delay_loop (loops - 1);
|
||||
}
|
||||
|
||||
static __inline__ void
|
||||
udelay (unsigned long usecs)
|
||||
{
|
||||
unsigned long start = ia64_get_itc();
|
||||
unsigned long cycles = usecs*local_cpu_data->cyc_per_usec;
|
||||
|
||||
while (ia64_get_itc() - start < cycles)
|
||||
cpu_relax();
|
||||
}
|
||||
extern void udelay (unsigned long usecs);
|
||||
|
||||
#endif /* _ASM_IA64_DELAY_H */
|
||||
|
|
|
@ -74,9 +74,6 @@ typedef struct
|
|||
u8 white_list, black_list;
|
||||
struct dbdma_cmd *dma_table_cpu;
|
||||
dma_addr_t dma_table_dma;
|
||||
struct scatterlist *sg_table;
|
||||
int sg_nents;
|
||||
int sg_dma_direction;
|
||||
#endif
|
||||
struct device *dev;
|
||||
int irq;
|
||||
|
@ -87,11 +84,6 @@ typedef struct
|
|||
} _auide_hwif;
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
|
||||
struct drive_list_entry {
|
||||
const char * id_model;
|
||||
const char * id_firmware;
|
||||
};
|
||||
|
||||
/* HD white list */
|
||||
static const struct drive_list_entry dma_white_list [] = {
|
||||
/*
|
||||
|
@ -167,13 +159,9 @@ int __init auide_probe(void);
|
|||
* Multi-Word DMA + DbDMA functions
|
||||
*/
|
||||
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
|
||||
|
||||
static int in_drive_list(struct hd_driveid *id,
|
||||
const struct drive_list_entry *drive_table);
|
||||
static int auide_build_sglist(ide_drive_t *drive, struct request *rq);
|
||||
static int auide_build_dmatable(ide_drive_t *drive);
|
||||
static int auide_dma_end(ide_drive_t *drive);
|
||||
static void auide_dma_start(ide_drive_t *drive );
|
||||
ide_startstop_t auide_dma_intr (ide_drive_t *drive);
|
||||
static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command);
|
||||
static int auide_dma_setup(ide_drive_t *drive);
|
||||
|
@ -188,8 +176,6 @@ int __init auide_probe(void);
|
|||
static void auide_ddma_rx_callback(int irq, void *param,
|
||||
struct pt_regs *regs);
|
||||
static int auide_dma_off_quietly(ide_drive_t *drive);
|
||||
static int auide_dma_timeout(ide_drive_t *drive);
|
||||
|
||||
#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
|
||||
|
||||
/*******************************************************************************
|
||||
|
@ -299,3 +285,11 @@ int __init auide_probe(void);
|
|||
#define SBC_IDE_MDMA2_TPM (0x00<<6)
|
||||
#define SBC_IDE_MDMA2_TA (0x12<<0)
|
||||
|
||||
#define SBC_IDE_TIMING(mode) \
|
||||
SBC_IDE_##mode##_TWCS | \
|
||||
SBC_IDE_##mode##_TCSH | \
|
||||
SBC_IDE_##mode##_TCSOFF | \
|
||||
SBC_IDE_##mode##_TWP | \
|
||||
SBC_IDE_##mode##_TCSW | \
|
||||
SBC_IDE_##mode##_TPM | \
|
||||
SBC_IDE_##mode##_TA
|
||||
|
|
|
@ -33,9 +33,6 @@
|
|||
|
||||
#define MAX_PPC4xx_DMA_CHANNELS 4
|
||||
|
||||
/* in arch/ppc/kernel/setup.c -- Cort */
|
||||
extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
|
||||
|
||||
/*
|
||||
* Function return status codes
|
||||
* These values are used to indicate whether or not the function
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
|
||||
/* Memory parity error register with associated bit constants. */
|
||||
#ifndef __ASSEMBLY__
|
||||
extern __volatile__ unsigned long *sun4c_memerr_reg;
|
||||
extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;
|
||||
#endif
|
||||
|
||||
#define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */
|
||||
|
|
|
@ -16,10 +16,10 @@
|
|||
#include <asm/pbm.h>
|
||||
|
||||
struct linux_pcic {
|
||||
void * __iomem pcic_regs;
|
||||
void __iomem *pcic_regs;
|
||||
unsigned long pcic_io;
|
||||
void * __iomem pcic_config_space_addr;
|
||||
void * __iomem pcic_config_space_data;
|
||||
void __iomem *pcic_config_space_addr;
|
||||
void __iomem *pcic_config_space_data;
|
||||
struct resource pcic_res_regs;
|
||||
struct resource pcic_res_io;
|
||||
struct resource pcic_res_cfg_addr;
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#define SMP_CACHE_BYTES L1_CACHE_BYTES
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_X86) || defined(CONFIG_SPARC64)
|
||||
#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64)
|
||||
#define __read_mostly __attribute__((__section__(".data.read_mostly")))
|
||||
#else
|
||||
#define __read_mostly
|
||||
|
|
|
@ -23,17 +23,6 @@
|
|||
#include <asm/io.h>
|
||||
#include <asm/semaphore.h>
|
||||
|
||||
/*
|
||||
* This is the multiple IDE interface driver, as evolved from hd.c.
|
||||
* It supports up to four IDE interfaces, on one or more IRQs (usually 14 & 15).
|
||||
* There can be up to two drives per interface, as per the ATA-2 spec.
|
||||
*
|
||||
* Primary i/f: ide0: major=3; (hda) minor=0; (hdb) minor=64
|
||||
* Secondary i/f: ide1: major=22; (hdc or hd1a) minor=0; (hdd or hd1b) minor=64
|
||||
* Tertiary i/f: ide2: major=33; (hde) minor=0; (hdf) minor=64
|
||||
* Quaternary i/f: ide3: major=34; (hdg) minor=0; (hdh) minor=64
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* IDE driver configuration options (play with these as desired):
|
||||
*
|
||||
|
@ -193,11 +182,6 @@ typedef unsigned char byte; /* used everywhere */
|
|||
#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
|
||||
#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
|
||||
|
||||
#define HOST(hwif,chipset) \
|
||||
{ \
|
||||
return ((hwif)->chipset == chipset) ? 1 : 0; \
|
||||
}
|
||||
|
||||
/*
|
||||
* Check for an interrupt and acknowledge the interrupt status
|
||||
*/
|
||||
|
@ -390,45 +374,6 @@ typedef union {
|
|||
} b;
|
||||
} ata_nsector_t, ata_data_t, atapi_bcount_t, ata_index_t;
|
||||
|
||||
/*
|
||||
* ATA-IDE Error Register
|
||||
*
|
||||
* mark : Bad address mark
|
||||
* tzero : Couldn't find track 0
|
||||
* abrt : Aborted Command
|
||||
* mcr : Media Change Request
|
||||
* id : ID field not found
|
||||
* mce : Media Change Event
|
||||
* ecc : Uncorrectable ECC error
|
||||
* bdd : dual meaing
|
||||
*/
|
||||
typedef union {
|
||||
unsigned all :8;
|
||||
struct {
|
||||
#if defined(__LITTLE_ENDIAN_BITFIELD)
|
||||
unsigned mark :1;
|
||||
unsigned tzero :1;
|
||||
unsigned abrt :1;
|
||||
unsigned mcr :1;
|
||||
unsigned id :1;
|
||||
unsigned mce :1;
|
||||
unsigned ecc :1;
|
||||
unsigned bdd :1;
|
||||
#elif defined(__BIG_ENDIAN_BITFIELD)
|
||||
unsigned bdd :1;
|
||||
unsigned ecc :1;
|
||||
unsigned mce :1;
|
||||
unsigned id :1;
|
||||
unsigned mcr :1;
|
||||
unsigned abrt :1;
|
||||
unsigned tzero :1;
|
||||
unsigned mark :1;
|
||||
#else
|
||||
#error "Please fix <asm/byteorder.h>"
|
||||
#endif
|
||||
} b;
|
||||
} ata_error_t;
|
||||
|
||||
/*
|
||||
* ATA-IDE Select Register, aka Device-Head
|
||||
*
|
||||
|
@ -503,39 +448,6 @@ typedef union {
|
|||
} b;
|
||||
} ata_status_t, atapi_status_t;
|
||||
|
||||
/*
|
||||
* ATA-IDE Control Register
|
||||
*
|
||||
* bit0 : Should be set to zero
|
||||
* nIEN : device INTRQ to host
|
||||
* SRST : host soft reset bit
|
||||
* bit3 : ATA-2 thingy, Should be set to 1
|
||||
* reserved456 : Reserved
|
||||
* HOB : 48-bit address ordering, High Ordered Bit
|
||||
*/
|
||||
typedef union {
|
||||
unsigned all : 8;
|
||||
struct {
|
||||
#if defined(__LITTLE_ENDIAN_BITFIELD)
|
||||
unsigned bit0 : 1;
|
||||
unsigned nIEN : 1;
|
||||
unsigned SRST : 1;
|
||||
unsigned bit3 : 1;
|
||||
unsigned reserved456 : 3;
|
||||
unsigned HOB : 1;
|
||||
#elif defined(__BIG_ENDIAN_BITFIELD)
|
||||
unsigned HOB : 1;
|
||||
unsigned reserved456 : 3;
|
||||
unsigned bit3 : 1;
|
||||
unsigned SRST : 1;
|
||||
unsigned nIEN : 1;
|
||||
unsigned bit0 : 1;
|
||||
#else
|
||||
#error "Please fix <asm/byteorder.h>"
|
||||
#endif
|
||||
} b;
|
||||
} ata_control_t;
|
||||
|
||||
/*
|
||||
* ATAPI Feature Register
|
||||
*
|
||||
|
@ -617,39 +529,6 @@ typedef union {
|
|||
} b;
|
||||
} atapi_error_t;
|
||||
|
||||
/*
|
||||
* ATAPI floppy Drive Select Register
|
||||
*
|
||||
* sam_lun : Logical unit number
|
||||
* reserved3 : Reserved
|
||||
* drv : The responding drive will be drive 0 (0) or drive 1 (1)
|
||||
* one5 : Should be set to 1
|
||||
* reserved6 : Reserved
|
||||
* one7 : Should be set to 1
|
||||
*/
|
||||
typedef union {
|
||||
unsigned all :8;
|
||||
struct {
|
||||
#if defined(__LITTLE_ENDIAN_BITFIELD)
|
||||
unsigned sam_lun :3;
|
||||
unsigned reserved3 :1;
|
||||
unsigned drv :1;
|
||||
unsigned one5 :1;
|
||||
unsigned reserved6 :1;
|
||||
unsigned one7 :1;
|
||||
#elif defined(__BIG_ENDIAN_BITFIELD)
|
||||
unsigned one7 :1;
|
||||
unsigned reserved6 :1;
|
||||
unsigned one5 :1;
|
||||
unsigned drv :1;
|
||||
unsigned reserved3 :1;
|
||||
unsigned sam_lun :3;
|
||||
#else
|
||||
#error "Please fix <asm/byteorder.h>"
|
||||
#endif
|
||||
} b;
|
||||
} atapi_select_t;
|
||||
|
||||
/*
|
||||
* Status returned from various ide_ functions
|
||||
*/
|
||||
|
@ -1101,10 +980,7 @@ typedef struct ide_driver_s {
|
|||
int (*end_request)(ide_drive_t *, int, int);
|
||||
ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
|
||||
ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
|
||||
int (*ioctl)(ide_drive_t *, struct inode *, struct file *, unsigned int, unsigned long);
|
||||
ide_proc_entry_t *proc;
|
||||
void (*ata_prebuilder)(ide_drive_t *);
|
||||
void (*atapi_prebuilder)(ide_drive_t *);
|
||||
struct device_driver gen_driver;
|
||||
} ide_driver_t;
|
||||
|
||||
|
@ -1298,7 +1174,6 @@ extern int ide_spin_wait_hwgroup(ide_drive_t *);
|
|||
extern void ide_timer_expiry(unsigned long);
|
||||
extern irqreturn_t ide_intr(int irq, void *dev_id, struct pt_regs *regs);
|
||||
extern void do_ide_request(request_queue_t *);
|
||||
extern void ide_init_subdrivers(void);
|
||||
|
||||
void ide_init_disk(struct gendisk *, ide_drive_t *);
|
||||
|
||||
|
@ -1371,6 +1246,12 @@ void ide_init_sg_cmd(ide_drive_t *, struct request *);
|
|||
#define GOOD_DMA_DRIVE 1
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_IDEDMA
|
||||
struct drive_list_entry {
|
||||
const char *id_model;
|
||||
const char *id_firmware;
|
||||
};
|
||||
|
||||
int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
|
||||
int __ide_dma_bad_drive(ide_drive_t *);
|
||||
int __ide_dma_good_drive(ide_drive_t *);
|
||||
int ide_use_dma(ide_drive_t *);
|
||||
|
|
|
@ -163,6 +163,7 @@ extern unsigned int kobjsize(const void *objp);
|
|||
#define VM_HUGETLB 0x00400000 /* Huge TLB Page VM */
|
||||
#define VM_NONLINEAR 0x00800000 /* Is non-linear (remap_file_pages) */
|
||||
#define VM_MAPPED_COPY 0x01000000 /* T if mapped copy of data (nommu mmap) */
|
||||
#define VM_INSERTPAGE 0x02000000 /* The vma has had "vm_insert_page()" done on it */
|
||||
|
||||
#ifndef VM_STACK_DEFAULT_FLAGS /* arch can override this */
|
||||
#define VM_STACK_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS
|
||||
|
|
|
@ -1244,6 +1244,7 @@
|
|||
#define PCI_DEVICE_ID_VIA_8378_0 0x3205
|
||||
#define PCI_DEVICE_ID_VIA_8783_0 0x3208
|
||||
#define PCI_DEVICE_ID_VIA_8237 0x3227
|
||||
#define PCI_DEVICE_ID_VIA_8251 0x3287
|
||||
#define PCI_DEVICE_ID_VIA_3296_0 0x0296
|
||||
#define PCI_DEVICE_ID_VIA_8231 0x8231
|
||||
#define PCI_DEVICE_ID_VIA_8231_4 0x8235
|
||||
|
|
|
@ -151,5 +151,6 @@ extern struct scsi_cmnd *scsi_get_command(struct scsi_device *, gfp_t);
|
|||
extern void scsi_put_command(struct scsi_cmnd *);
|
||||
extern void scsi_io_completion(struct scsi_cmnd *, unsigned int, unsigned int);
|
||||
extern void scsi_finish_command(struct scsi_cmnd *cmd);
|
||||
extern void scsi_setup_blk_pc_cmnd(struct scsi_cmnd *cmd, int retries);
|
||||
|
||||
#endif /* _SCSI_SCSI_CMND_H */
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue