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ARM: dts: Add WAN ethernet port to the SQ201 

This sets up the ethernet interface and PHY for the
WAN ethernet port which uses a Marvell PHY.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij 2018-05-30 22:35:39 +02:00
parent ce397d215c
commit 423fbae3d0
1 changed files with 84 additions and 0 deletions
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84
arch/arm/boot/dts/gemini-sq201.dts
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@ -55,6 +55,20 @@ led-green-usb {
};
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
/* Uses MDC and MDIO */
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
#address-cells = <1>;
#size-cells = <0>;
/* This is a Marvell 88E1111 ethernet transciever */
phy0: ethernet-phy@1 {
reg = <1>;
};
};
soc {
flash@30000000 {
/*
@ -108,6 +122,7 @@ pinctrl {
/*
* gpio0fgrp cover line 18 used by reset button
* gpio0ggrp cover line 20 used by info LED
* gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
* gpio0kgrp cover line 31 used by USB LED
*/
gpio0_default_pins: pinctrl-gpio0 {
@ -115,9 +130,66 @@ mux {
function = "gpio0";
groups = "gpio0fgrp",
"gpio0ggrp",
"gpio0hgrp",
"gpio0kgrp";
};
};
pinctrl-gmii {
mux {
function = "gmii";
groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
};
/* Settings come from memory dump in PLATO */
conf0 {
pins = "V8 GMAC0 RXDV";
skew-delay = <0>;
};
conf1 {
pins = "Y7 GMAC0 RXC";
skew-delay = <15>;
};
conf2 {
pins = "T8 GMAC0 TXEN";
skew-delay = <7>;
};
conf3 {
pins = "U8 GMAC0 TXC";
skew-delay = <10>;
};
conf4 {
pins = "T10 GMAC1 RXDV";
skew-delay = <7>;
};
conf5 {
pins = "Y11 GMAC1 RXC";
skew-delay = <8>;
};
conf6 {
pins = "W11 GMAC1 TXEN";
skew-delay = <7>;
};
conf7 {
pins = "V11 GMAC1 TXC";
skew-delay = <5>;
};
conf8 {
/* The data lines all have default skew */
pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
"Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
"T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
"V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
"Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
"T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
"U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
"W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
skew-delay = <7>;
};
/* Set up drive strength on GMAC0 and GMAC1 to 16 mA */
conf9 {
groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
drive-strength = <16>;
};
};
};
};
@ -154,6 +226,18 @@ pci@50000000 {
<0x6000 0 0 4 &pci_intc 2>;
};
ethernet@60000000 {
status = "okay";
ethernet-port@0 {
phy-mode = "rgmii";
phy-handle = <&phy0>;
};
ethernet-port@1 {
/* Used for the Vitesse G5 chip, add later */
};
};
ata@63000000 {
status = "okay";
};