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pinctrl-baytrail: add function mux checking in gpio pin request 

The requested gpio pin must has the func_pin_mux field set
to GPIO function by BIOS/FW in advanced. Else, the gpio pin
request would fail. This is to ensure that we do not expose
any gpio pins which shall be used for alternate functions,
for eg: wakeup pin, I/O interfaces for LPSS, etc.

Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Chew, Kean Ho 2014-03-06 21:59:49 +08:00 committed by Linus Walleij
parent a76cbd7eba
commit 42bd00706c
1 changed files with 39 additions and 3 deletions
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42
drivers/pinctrl/pinctrl-baytrail.c
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@ -60,6 +60,10 @@
#define BYT_NGPIO_NCORE 28 #define BYT_NGPIO_NCORE 28
#define BYT_NGPIO_SUS 44 #define BYT_NGPIO_SUS 44
#define BYT_SCORE_ACPI_UID "1"
#define BYT_NCORE_ACPI_UID "2"
#define BYT_SUS_ACPI_UID "3"
/* /*
* Baytrail gpio controller consist of three separate sub-controllers called * Baytrail gpio controller consist of three separate sub-controllers called
* SCORE, NCORE and SUS. The sub-controllers are identified by their acpi UID. * SCORE, NCORE and SUS. The sub-controllers are identified by their acpi UID.
@ -102,17 +106,17 @@ static unsigned const sus_pins[BYT_NGPIO_SUS] = {
static struct pinctrl_gpio_range byt_ranges[] = { static struct pinctrl_gpio_range byt_ranges[] = {
{ {
.name = "1", /* match with acpi _UID in probe */ .name = BYT_SCORE_ACPI_UID, /* match with acpi _UID in probe */
.npins = BYT_NGPIO_SCORE, .npins = BYT_NGPIO_SCORE,
.pins = score_pins, .pins = score_pins,
}, },
{ {
.name = "2", .name = BYT_NCORE_ACPI_UID,
.npins = BYT_NGPIO_NCORE, .npins = BYT_NGPIO_NCORE,
.pins = ncore_pins, .pins = ncore_pins,
}, },
{ {
.name = "3", .name = BYT_SUS_ACPI_UID,
.npins = BYT_NGPIO_SUS, .npins = BYT_NGPIO_SUS,
.pins = sus_pins, .pins = sus_pins,
}, },
@ -145,9 +149,41 @@ static void __iomem *byt_gpio_reg(struct gpio_chip *chip, unsigned offset,
return vg->reg_base + reg_offset + reg; return vg->reg_base + reg_offset + reg;
} }
static bool is_special_pin(struct byt_gpio *vg, unsigned offset)
{
/* SCORE pin 92-93 */
if (!strcmp(vg->range->name, BYT_SCORE_ACPI_UID) &&
offset >= 92 && offset <= 93)
return true;
/* SUS pin 11-21 */
if (!strcmp(vg->range->name, BYT_SUS_ACPI_UID) &&
offset >= 11 && offset <= 21)
return true;
return false;
}
static int byt_gpio_request(struct gpio_chip *chip, unsigned offset) static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
{ {
struct byt_gpio *vg = to_byt_gpio(chip); struct byt_gpio *vg = to_byt_gpio(chip);
void __iomem *reg = byt_gpio_reg(chip, offset, BYT_CONF0_REG);
u32 value;
bool special;
/*
* In most cases, func pin mux 000 means GPIO function.
* But, some pins may have func pin mux 001 represents
* GPIO function. Only allow user to export pin with
* func pin mux preset as GPIO function by BIOS/FW.
*/
value = readl(reg) & BYT_PIN_MUX;
special = is_special_pin(vg, offset);
if ((special && value != 1) || (!special && value)) {
dev_err(&vg->pdev->dev,
"pin %u cannot be used as GPIO.\n", offset);
return -EINVAL;
}
pm_runtime_get(&vg->pdev->dev); pm_runtime_get(&vg->pdev->dev);