mirror of https://gitee.com/openkylin/linux.git
pinctrl: renesas: r8a7796: Add QSPI[01] pins, groups and functions
Add pins, groups and functions for QSPIO[01]. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201119130926.25692-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -3257,6 +3257,57 @@ static const unsigned int pwm6_b_mux[] = {
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PWM6_B_MARK,
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};
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/* - QSPI0 ------------------------------------------------------------------ */
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static const unsigned int qspi0_ctrl_pins[] = {
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/* QSPI0_SPCLK, QSPI0_SSL */
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PIN_QSPI0_SPCLK, PIN_QSPI0_SSL,
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};
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static const unsigned int qspi0_ctrl_mux[] = {
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QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
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};
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static const unsigned int qspi0_data2_pins[] = {
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/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
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PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
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};
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static const unsigned int qspi0_data2_mux[] = {
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QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
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};
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static const unsigned int qspi0_data4_pins[] = {
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/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
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PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
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/* QSPI0_IO2, QSPI0_IO3 */
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PIN_QSPI0_IO2, PIN_QSPI0_IO3,
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};
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static const unsigned int qspi0_data4_mux[] = {
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QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
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QSPI0_IO2_MARK, QSPI0_IO3_MARK,
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};
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/* - QSPI1 ------------------------------------------------------------------ */
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static const unsigned int qspi1_ctrl_pins[] = {
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/* QSPI1_SPCLK, QSPI1_SSL */
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PIN_QSPI1_SPCLK, PIN_QSPI1_SSL,
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};
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static const unsigned int qspi1_ctrl_mux[] = {
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QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
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};
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static const unsigned int qspi1_data2_pins[] = {
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/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
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PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
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};
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static const unsigned int qspi1_data2_mux[] = {
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QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
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};
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static const unsigned int qspi1_data4_pins[] = {
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/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
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PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
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/* QSPI1_IO2, QSPI1_IO3 */
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PIN_QSPI1_IO2, PIN_QSPI1_IO3,
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};
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static const unsigned int qspi1_data4_mux[] = {
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QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
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QSPI1_IO2_MARK, QSPI1_IO3_MARK,
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};
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/* - SCIF0 ------------------------------------------------------------------ */
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static const unsigned int scif0_data_pins[] = {
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/* RX, TX */
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@ -4134,7 +4185,7 @@ static const unsigned int vin5_clk_mux[] = {
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};
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static const struct {
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struct sh_pfc_pin_group common[316];
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struct sh_pfc_pin_group common[322];
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#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
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struct sh_pfc_pin_group automotive[30];
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#endif
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@ -4339,6 +4390,12 @@ static const struct {
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SH_PFC_PIN_GROUP(pwm5_b),
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SH_PFC_PIN_GROUP(pwm6_a),
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SH_PFC_PIN_GROUP(pwm6_b),
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SH_PFC_PIN_GROUP(qspi0_ctrl),
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SH_PFC_PIN_GROUP(qspi0_data2),
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SH_PFC_PIN_GROUP(qspi0_data4),
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SH_PFC_PIN_GROUP(qspi1_ctrl),
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SH_PFC_PIN_GROUP(qspi1_data2),
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SH_PFC_PIN_GROUP(qspi1_data4),
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SH_PFC_PIN_GROUP(scif0_data),
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SH_PFC_PIN_GROUP(scif0_clk),
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SH_PFC_PIN_GROUP(scif0_ctrl),
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@ -4829,6 +4886,18 @@ static const char * const pwm6_groups[] = {
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"pwm6_b",
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};
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static const char * const qspi0_groups[] = {
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"qspi0_ctrl",
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"qspi0_data2",
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"qspi0_data4",
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};
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static const char * const qspi1_groups[] = {
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"qspi1_ctrl",
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"qspi1_data2",
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"qspi1_data4",
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};
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static const char * const scif0_groups[] = {
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"scif0_data",
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"scif0_clk",
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@ -5004,7 +5073,7 @@ static const char * const vin5_groups[] = {
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};
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static const struct {
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struct sh_pfc_function common[50];
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struct sh_pfc_function common[52];
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#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
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struct sh_pfc_function automotive[4];
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#endif
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@ -5041,6 +5110,8 @@ static const struct {
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SH_PFC_FUNCTION(pwm4),
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SH_PFC_FUNCTION(pwm5),
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SH_PFC_FUNCTION(pwm6),
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SH_PFC_FUNCTION(qspi0),
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SH_PFC_FUNCTION(qspi1),
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SH_PFC_FUNCTION(scif0),
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SH_PFC_FUNCTION(scif1),
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SH_PFC_FUNCTION(scif2),
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