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asix: Do full reset during ax88772_bind 

commit 3cc81d85ee ("asix: Don't reset PHY on if_up for ASIX 88772")
causes the ethernet on Arndale to no longer function. This appears to
be because the Arndale ethernet requires a full reset before it will
function correctly, however simply reverting the above patch causes
problems with ethtool settings getting reset.

It seems the problem is that the ethernet is not properly reset during
bind, and indeed the code in ax88772_bind that resets the device is a
very small subset of the actual ax88772_reset function. This patch uses
ax88772_reset in place of the existing reset code in ax88772_bind which
removes some code duplication and fixes the ethernet on Arndale.

It is still possible that the original patch causes some issues with
suspend and resume but that seems like a separate issue and I haven't
had a chance to test that yet.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Tested-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Charles Keepax 2014-11-06 15:49:41 +00:00 committed by David S. Miller
parent 1310b544e5
commit 436c2a5036
1 changed files with 1 additions and 13 deletions
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14
drivers/net/usb/asix_devices.c
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@ -465,19 +465,7 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
return ret; return ret;
} }
ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); ax88772_reset(dev);
if (ret < 0)
return ret;
msleep(150);
ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
if (ret < 0)
return ret;
msleep(150);
ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
/* Read PHYID register *AFTER* the PHY was reset properly */ /* Read PHYID register *AFTER* the PHY was reset properly */
phyid = asix_get_phyid(dev); phyid = asix_get_phyid(dev);