mirror of https://gitee.com/openkylin/linux.git
drm/amdgpu: protect RAS sysfs during GPU reset
MMHub EDC becomes dirty after BACO reset EDC registers should be cleared early on in reset phase Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2742,6 +2742,9 @@ static void amdgpu_device_xgmi_reset_func(struct work_struct *__work)
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if (adev->asic_reset_res)
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if (adev->asic_reset_res)
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goto fail;
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goto fail;
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if (adev->mmhub.funcs && adev->mmhub.funcs->reset_ras_error_count)
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adev->mmhub.funcs->reset_ras_error_count(adev);
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} else {
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} else {
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task_barrier_full(&hive->tb);
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task_barrier_full(&hive->tb);
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@ -3910,8 +3913,15 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
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}
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}
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}
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}
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if (!r && amdgpu_ras_intr_triggered())
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if (!r && amdgpu_ras_intr_triggered()) {
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list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
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if (tmp_adev->mmhub.funcs &&
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tmp_adev->mmhub.funcs->reset_ras_error_count)
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tmp_adev->mmhub.funcs->reset_ras_error_count(tmp_adev);
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}
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amdgpu_ras_intr_cleared();
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amdgpu_ras_intr_cleared();
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}
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list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
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list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
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if (need_full_reset) {
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if (need_full_reset) {
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@ -281,6 +281,11 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f, const char __user *
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struct ras_debug_if data;
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struct ras_debug_if data;
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int ret = 0;
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int ret = 0;
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if (amdgpu_ras_intr_triggered()) {
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DRM_WARN("RAS WARN: error injection currently inaccessible\n");
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return size;
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}
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ret = amdgpu_ras_debugfs_ctrl_parse_data(f, buf, size, pos, &data);
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ret = amdgpu_ras_debugfs_ctrl_parse_data(f, buf, size, pos, &data);
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if (ret)
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if (ret)
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return -EINVAL;
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return -EINVAL;
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@ -394,6 +399,10 @@ static ssize_t amdgpu_ras_sysfs_read(struct device *dev,
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.head = obj->head,
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.head = obj->head,
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};
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};
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if (amdgpu_ras_intr_triggered())
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return snprintf(buf, PAGE_SIZE,
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"Query currently inaccessible\n");
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if (amdgpu_ras_error_query(obj->adev, &info))
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if (amdgpu_ras_error_query(obj->adev, &info))
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return -EINVAL;
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return -EINVAL;
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