mirror of https://gitee.com/openkylin/linux.git
bfin: Convert irq namespace
Convert to the new function names. Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: uclinux-dist-devel@blackfin.uclinux.org
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1907d8be2d
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43f2f1154a
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@ -48,7 +48,7 @@ int show_interrupts(struct seq_file *p, void *v)
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seq_printf(p, "%3d: ", i);
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seq_printf(p, "%3d: ", i);
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for_each_online_cpu(j)
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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seq_printf(p, " %8s", get_irq_desc_chip(desc)->name);
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seq_printf(p, " %8s", irq_desc_get_chip(desc)->name);
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seq_printf(p, " %s", action->name);
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seq_printf(p, " %s", action->name);
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for (action = action->next; action; action = action->next)
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for (action = action->next; action; action = action->next)
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seq_printf(p, " %s", action->name);
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seq_printf(p, " %s", action->name);
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@ -559,7 +559,7 @@ static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
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#ifdef CONFIG_IPIPE
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#ifdef CONFIG_IPIPE
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handle = handle_level_irq;
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handle = handle_level_irq;
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#endif
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#endif
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__set_irq_handler_unlocked(irq, handle);
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__irq_set_handler_locked(irq, handle);
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}
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}
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static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS);
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static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS);
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@ -1163,9 +1163,9 @@ int __init init_arch_irq(void)
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for (irq = 0; irq <= SYS_IRQS; irq++) {
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for (irq = 0; irq <= SYS_IRQS; irq++) {
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if (irq <= IRQ_CORETMR)
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if (irq <= IRQ_CORETMR)
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set_irq_chip(irq, &bfin_core_irqchip);
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irq_set_chip(irq, &bfin_core_irqchip);
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else
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else
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set_irq_chip(irq, &bfin_internal_irqchip);
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irq_set_chip(irq, &bfin_internal_irqchip);
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switch (irq) {
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switch (irq) {
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#if defined(CONFIG_BF53x)
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#if defined(CONFIG_BF53x)
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@ -1189,50 +1189,50 @@ int __init init_arch_irq(void)
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#elif defined(CONFIG_BF538) || defined(CONFIG_BF539)
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#elif defined(CONFIG_BF538) || defined(CONFIG_BF539)
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case IRQ_PORTF_INTA:
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case IRQ_PORTF_INTA:
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#endif
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#endif
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set_irq_chained_handler(irq,
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irq_set_chained_handler(irq, bfin_demux_gpio_irq);
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bfin_demux_gpio_irq);
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break;
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break;
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#ifdef BF537_GENERIC_ERROR_INT_DEMUX
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#ifdef BF537_GENERIC_ERROR_INT_DEMUX
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case IRQ_GENERIC_ERROR:
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case IRQ_GENERIC_ERROR:
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set_irq_chained_handler(irq, bfin_demux_error_irq);
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irq_set_chained_handler(irq, bfin_demux_error_irq);
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break;
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break;
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#endif
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#endif
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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case IRQ_MAC_ERROR:
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case IRQ_MAC_ERROR:
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set_irq_chained_handler(irq, bfin_demux_mac_status_irq);
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irq_set_chained_handler(irq,
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bfin_demux_mac_status_irq);
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break;
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break;
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#endif
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#endif
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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case IRQ_SUPPLE_0:
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case IRQ_SUPPLE_0:
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case IRQ_SUPPLE_1:
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case IRQ_SUPPLE_1:
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set_irq_handler(irq, handle_percpu_irq);
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irq_set_handler(irq, handle_percpu_irq);
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break;
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break;
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#endif
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#endif
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#ifdef CONFIG_TICKSOURCE_CORETMR
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#ifdef CONFIG_TICKSOURCE_CORETMR
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case IRQ_CORETMR:
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case IRQ_CORETMR:
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# ifdef CONFIG_SMP
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# ifdef CONFIG_SMP
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set_irq_handler(irq, handle_percpu_irq);
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irq_set_handler(irq, handle_percpu_irq);
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break;
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break;
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# else
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# else
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set_irq_handler(irq, handle_simple_irq);
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irq_set_handler(irq, handle_simple_irq);
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break;
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break;
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# endif
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# endif
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#endif
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#endif
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#ifdef CONFIG_TICKSOURCE_GPTMR0
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#ifdef CONFIG_TICKSOURCE_GPTMR0
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case IRQ_TIMER0:
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case IRQ_TIMER0:
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set_irq_handler(irq, handle_simple_irq);
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irq_set_handler(irq, handle_simple_irq);
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break;
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break;
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#endif
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#endif
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#ifdef CONFIG_IPIPE
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#ifdef CONFIG_IPIPE
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default:
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default:
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set_irq_handler(irq, handle_level_irq);
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irq_set_handler(irq, handle_level_irq);
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break;
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break;
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#else /* !CONFIG_IPIPE */
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#else /* !CONFIG_IPIPE */
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default:
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default:
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set_irq_handler(irq, handle_simple_irq);
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irq_set_handler(irq, handle_simple_irq);
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break;
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break;
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#endif /* !CONFIG_IPIPE */
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#endif /* !CONFIG_IPIPE */
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}
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}
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@ -1240,22 +1240,22 @@ int __init init_arch_irq(void)
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#ifdef BF537_GENERIC_ERROR_INT_DEMUX
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#ifdef BF537_GENERIC_ERROR_INT_DEMUX
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for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++)
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for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++)
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set_irq_chip_and_handler(irq, &bfin_generic_error_irqchip,
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irq_set_chip_and_handler(irq, &bfin_generic_error_irqchip,
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handle_level_irq);
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handle_level_irq);
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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set_irq_chained_handler(IRQ_MAC_ERROR, bfin_demux_mac_status_irq);
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irq_set_chained_handler(IRQ_MAC_ERROR, bfin_demux_mac_status_irq);
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#endif
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#endif
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#endif
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#endif
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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for (irq = IRQ_MAC_PHYINT; irq <= IRQ_MAC_STMDONE; irq++)
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for (irq = IRQ_MAC_PHYINT; irq <= IRQ_MAC_STMDONE; irq++)
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set_irq_chip_and_handler(irq, &bfin_mac_status_irqchip,
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irq_set_chip_and_handler(irq, &bfin_mac_status_irqchip,
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handle_level_irq);
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handle_level_irq);
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#endif
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#endif
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/* if configured as edge, then will be changed to do_edge_IRQ */
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/* if configured as edge, then will be changed to do_edge_IRQ */
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for (irq = GPIO_IRQ_BASE;
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for (irq = GPIO_IRQ_BASE;
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irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)
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irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)
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set_irq_chip_and_handler(irq, &bfin_gpio_irqchip,
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irq_set_chip_and_handler(irq, &bfin_gpio_irqchip,
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handle_level_irq);
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handle_level_irq);
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bfin_write_IMASK(0);
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bfin_write_IMASK(0);
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