mirror of https://gitee.com/openkylin/linux.git
staging: fbtft: Use standard MIPI DCS command defines for tinylcd
This patch makes use of the standard MIPI Display Command Set to remove some of the magic constants found in source code. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -18,6 +18,7 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <video/mipi_display.h>
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#include "fbtft.h"
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@ -38,7 +39,7 @@ static int init_display(struct fbtft_par *par)
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write_reg(par, 0xB4, 0x02);
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write_reg(par, 0xB6, 0x00, 0x22, 0x3B);
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write_reg(par, 0xB7, 0x07);
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write_reg(par, 0x36, 0x58);
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x58);
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write_reg(par, 0xF0, 0x36, 0xA5, 0xD3);
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write_reg(par, 0xE5, 0x80);
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write_reg(par, 0xE5, 0x01);
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@ -47,24 +48,23 @@ static int init_display(struct fbtft_par *par)
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write_reg(par, 0xF0, 0x36, 0xA5, 0x53);
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write_reg(par, 0xE0, 0x00, 0x35, 0x33, 0x00, 0x00, 0x00,
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0x00, 0x35, 0x33, 0x00, 0x00, 0x00);
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write_reg(par, 0x3A, 0x55);
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write_reg(par, 0x11);
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write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
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write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
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udelay(250);
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write_reg(par, 0x29);
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write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
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return 0;
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}
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static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
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{
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/* Column address */
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write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
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write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
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xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
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/* Row address */
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write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
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write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
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ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
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/* Memory write */
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write_reg(par, 0x2C);
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write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
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}
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static int set_var(struct fbtft_par *par)
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@ -72,19 +72,19 @@ static int set_var(struct fbtft_par *par)
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switch (par->info->var.rotate) {
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case 270:
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write_reg(par, 0xB6, 0x00, 0x02, 0x3B);
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write_reg(par, 0x36, 0x28);
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x28);
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break;
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case 180:
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write_reg(par, 0xB6, 0x00, 0x22, 0x3B);
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write_reg(par, 0x36, 0x58);
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x58);
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break;
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case 90:
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write_reg(par, 0xB6, 0x00, 0x22, 0x3B);
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write_reg(par, 0x36, 0x38);
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x38);
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break;
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default:
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write_reg(par, 0xB6, 0x00, 0x22, 0x3B);
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write_reg(par, 0x36, 0x08);
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x08);
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break;
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}
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