mirror of https://gitee.com/openkylin/linux.git
b43: HT-PHY: implement RSSI polling
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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396535e137
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4409a23f6b
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@ -387,6 +387,92 @@ static void b43_phy_ht_tx_tone(struct b43_wldev *dev)
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}
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#endif
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/**************************************************
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* RSSI
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**************************************************/
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#if 0
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static void b43_phy_ht_rssi_select(struct b43_wldev *dev, u8 core_sel,
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u8 rssi_type)
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{
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static const u16 ctl_regs[3][2] = {
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{ B43_PHY_HT_AFE_C1, B43_PHY_HT_AFE_C1_OVER, },
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{ B43_PHY_HT_AFE_C2, B43_PHY_HT_AFE_C2_OVER, },
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{ B43_PHY_HT_AFE_C3, B43_PHY_HT_AFE_C3_OVER, },
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};
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static const u16 radio_r[] = { R2059_SYN, R2059_TXRX0, R2059_RXRX1, };
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int core;
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if (core_sel == 0) {
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b43err(dev->wl, "RSSI selection for core off not implemented yet\n");
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} else {
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for (core = 0; core < 3; core++) {
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/* Check if caller requested a one specific core */
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if ((core_sel == 1 && core != 0) ||
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(core_sel == 2 && core != 1) ||
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(core_sel == 3 && core != 2))
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continue;
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switch (rssi_type) {
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case 4:
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b43_phy_set(dev, ctl_regs[core][0], 0x3 << 8);
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b43_phy_set(dev, ctl_regs[core][0], 0x3 << 10);
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b43_phy_set(dev, ctl_regs[core][1], 0x1 << 9);
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b43_phy_set(dev, ctl_regs[core][1], 0x1 << 10);
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b43_radio_set(dev, R2059_RXRX1 | 0xbf, 0x1);
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b43_radio_write(dev, radio_r[core] | 0x159,
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0x11);
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break;
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default:
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b43err(dev->wl, "RSSI selection for type %d not implemented yet\n",
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rssi_type);
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}
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}
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}
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}
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static void b43_phy_ht_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
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u8 nsamp)
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{
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u16 phy_regs_values[12];
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static const u16 phy_regs_to_save[] = {
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B43_PHY_HT_AFE_C1, B43_PHY_HT_AFE_C1_OVER,
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0x848, 0x841,
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B43_PHY_HT_AFE_C2, B43_PHY_HT_AFE_C2_OVER,
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0x868, 0x861,
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B43_PHY_HT_AFE_C3, B43_PHY_HT_AFE_C3_OVER,
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0x888, 0x881,
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};
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u16 tmp[3];
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int i;
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for (i = 0; i < 12; i++)
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phy_regs_values[i] = b43_phy_read(dev, phy_regs_to_save[i]);
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b43_phy_ht_rssi_select(dev, 5, type);
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for (i = 0; i < 6; i++)
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buf[i] = 0;
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for (i = 0; i < nsamp; i++) {
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tmp[0] = b43_phy_read(dev, B43_PHY_HT_RSSI_C1);
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tmp[1] = b43_phy_read(dev, B43_PHY_HT_RSSI_C2);
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tmp[2] = b43_phy_read(dev, B43_PHY_HT_RSSI_C3);
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buf[0] += ((s8)((tmp[0] & 0x3F) << 2)) >> 2;
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buf[1] += ((s8)(((tmp[0] >> 8) & 0x3F) << 2)) >> 2;
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buf[2] += ((s8)((tmp[1] & 0x3F) << 2)) >> 2;
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buf[3] += ((s8)(((tmp[1] >> 8) & 0x3F) << 2)) >> 2;
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buf[4] += ((s8)((tmp[2] & 0x3F) << 2)) >> 2;
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buf[5] += ((s8)(((tmp[2] >> 8) & 0x3F) << 2)) >> 2;
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}
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for (i = 0; i < 12; i++)
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b43_phy_write(dev, phy_regs_to_save[i], phy_regs_values[i]);
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}
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#endif
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/**************************************************
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* Tx/Rx
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**************************************************/
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@ -454,12 +540,20 @@ static void b43_phy_ht_tx_power_ctl(struct b43_wldev *dev, bool enable)
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static void b43_phy_ht_tx_power_ctl_idle_tssi(struct b43_wldev *dev)
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{
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struct b43_phy_ht *phy_ht = dev->phy.ht;
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s32 rssi_buf[6];
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/* TODO */
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b43_phy_ht_tx_tone(dev);
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udelay(20);
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/* TODO: poll RSSI */
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b43_phy_ht_poll_rssi(dev, 4, rssi_buf, 1);
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b43_phy_ht_stop_playback(dev);
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b43_phy_ht_reset_cca(dev);
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phy_ht->idle_tssi[0] = rssi_buf[0] & 0xff;
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phy_ht->idle_tssi[1] = rssi_buf[2] & 0xff;
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phy_ht->idle_tssi[2] = rssi_buf[4] & 0xff;
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/* TODO */
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}
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@ -36,6 +36,9 @@
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#define B43_PHY_HT_TXPCTL_CMD_C1_PCTLEN 0x8000 /* TX power control enable */
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#define B43_PHY_HT_TXPCTL_CMD_C2 0x222
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#define B43_PHY_HT_TXPCTL_CMD_C2_INIT 0x007F
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#define B43_PHY_HT_RSSI_C1 0x219
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#define B43_PHY_HT_RSSI_C2 0x21A
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#define B43_PHY_HT_RSSI_C3 0x21B
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#define B43_PHY_HT_C1_CLIP1THRES B43_PHY_OFDM(0x00E)
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#define B43_PHY_HT_C2_CLIP1THRES B43_PHY_OFDM(0x04E)
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@ -91,6 +94,8 @@ struct b43_phy_ht {
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u8 tx_pwr_idx[3];
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s32 bb_mult_save[3];
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u8 idle_tssi[3];
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};
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