diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c index bc859a311eaf..45bf04eb7d70 100644 --- a/arch/ia64/hp/common/sba_iommu.c +++ b/arch/ia64/hp/common/sba_iommu.c @@ -2034,7 +2034,8 @@ sba_init(void) if (!ia64_platform_is("hpzx1") && !ia64_platform_is("hpzx1_swiotlb")) return 0; -#if defined(CONFIG_IA64_GENERIC) && defined(CONFIG_CRASH_DUMP) +#if defined(CONFIG_IA64_GENERIC) && defined(CONFIG_CRASH_DUMP) && \ + defined(CONFIG_PROC_FS) /* If we are booting a kdump kernel, the sba_iommu will * cause devices that were not shutdown properly to MCA * as soon as they are turned back on. Our only option for diff --git a/arch/ia64/ia32/binfmt_elf32.c b/arch/ia64/ia32/binfmt_elf32.c index f6ae3ec93810..3e35987af458 100644 --- a/arch/ia64/ia32/binfmt_elf32.c +++ b/arch/ia64/ia32/binfmt_elf32.c @@ -52,33 +52,29 @@ extern struct page *ia32_shared_page[]; extern unsigned long *ia32_gdt; extern struct page *ia32_gate_page; -struct page * -ia32_install_shared_page (struct vm_area_struct *vma, unsigned long address, int *type) +int +ia32_install_shared_page (struct vm_area_struct *vma, struct vm_fault *vmf) { - struct page *pg = ia32_shared_page[smp_processor_id()]; - get_page(pg); - if (type) - *type = VM_FAULT_MINOR; - return pg; + vmf->page = ia32_shared_page[smp_processor_id()]; + get_page(vmf->page); + return 0; } -struct page * -ia32_install_gate_page (struct vm_area_struct *vma, unsigned long address, int *type) +int +ia32_install_gate_page (struct vm_area_struct *vma, struct vm_fault *vmf) { - struct page *pg = ia32_gate_page; - get_page(pg); - if (type) - *type = VM_FAULT_MINOR; - return pg; + vmf->page = ia32_gate_page; + get_page(vmf->page); + return 0; } static struct vm_operations_struct ia32_shared_page_vm_ops = { - .nopage = ia32_install_shared_page + .fault = ia32_install_shared_page }; static struct vm_operations_struct ia32_gate_page_vm_ops = { - .nopage = ia32_install_gate_page + .fault = ia32_install_gate_page }; void diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S index 4e5e27540e27..d3a41d5f8d12 100644 --- a/arch/ia64/kernel/head.S +++ b/arch/ia64/kernel/head.S @@ -1176,6 +1176,7 @@ tlb_purge_done: RESTORE_REG(cr.dcr, r25, r17);; RESTORE_REG(cr.iva, r25, r17);; RESTORE_REG(cr.pta, r25, r17);; + srlz.d;; // required not to violate RAW dependency RESTORE_REG(cr.itv, r25, r17);; RESTORE_REG(cr.pmv, r25, r17);; RESTORE_REG(cr.cmcv, r25, r17);; diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c index 00a4599e5f47..0b52f19ed046 100644 --- a/arch/ia64/kernel/irq_ia64.c +++ b/arch/ia64/kernel/irq_ia64.c @@ -200,7 +200,7 @@ assign_irq_vector (int irq) { unsigned long flags; int vector, cpu; - cpumask_t domain; + cpumask_t domain = CPU_MASK_NONE; vector = -ENOSPC; @@ -340,7 +340,7 @@ int create_irq(void) { unsigned long flags; int irq, vector, cpu; - cpumask_t domain; + cpumask_t domain = CPU_MASK_NONE; irq = vector = -ENOSPC; spin_lock_irqsave(&vector_lock, flags); diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c index 10b48cd15a87..6dbf5919d2d0 100644 --- a/arch/ia64/kernel/mca.c +++ b/arch/ia64/kernel/mca.c @@ -75,6 +75,7 @@ #include #include #include +#include #include #include @@ -1813,6 +1814,36 @@ ia64_mca_cpu_init(void *cpu_data) PAGE_KERNEL)); } +static void __cpuinit ia64_mca_cmc_vector_adjust(void *dummy) +{ + unsigned long flags; + + local_irq_save(flags); + if (!cmc_polling_enabled) + ia64_mca_cmc_vector_enable(NULL); + local_irq_restore(flags); +} + +static int __cpuinit mca_cpu_callback(struct notifier_block *nfb, + unsigned long action, + void *hcpu) +{ + int hotcpu = (unsigned long) hcpu; + + switch (action) { + case CPU_ONLINE: + case CPU_ONLINE_FROZEN: + smp_call_function_single(hotcpu, ia64_mca_cmc_vector_adjust, + NULL, 1, 0); + break; + } + return NOTIFY_OK; +} + +static struct notifier_block mca_cpu_notifier __cpuinitdata = { + .notifier_call = mca_cpu_callback +}; + /* * ia64_mca_init * @@ -1996,6 +2027,8 @@ ia64_mca_late_init(void) if (!mca_init) return 0; + register_hotcpu_notifier(&mca_cpu_notifier); + /* Setup the CMCI/P vector and handler */ init_timer(&cmc_poll_timer); cmc_poll_timer.function = ia64_mca_cmc_poll; diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c index 2418289ee5ca..7377d323131d 100644 --- a/arch/ia64/kernel/process.c +++ b/arch/ia64/kernel/process.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -107,8 +108,9 @@ show_regs (struct pt_regs *regs) print_modules(); printk("\nPid: %d, CPU %d, comm: %20s\n", task_pid_nr(current), smp_processor_id(), current->comm); - printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n", - regs->cr_ipsr, regs->cr_ifs, ip, print_tainted()); + printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n", + regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(), + init_utsname()->release); print_symbol("ip is at %s\n", ip); printk("unat: %016lx pfs : %016lx rsc : %016lx\n", regs->ar_unat, regs->ar_pfs, regs->ar_rsc); @@ -737,6 +739,7 @@ flush_thread (void) ia32_drop_ia64_partial_page_list(current); current->thread.task_size = IA32_PAGE_OFFSET; set_fs(USER_DS); + memset(current->thread.tls_array, 0, sizeof(current->thread.tls_array)); } #endif } diff --git a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c index 4c730099d58f..309da3567bc8 100644 --- a/arch/ia64/kernel/signal.c +++ b/arch/ia64/kernel/signal.c @@ -280,15 +280,7 @@ setup_sigcontext (struct sigcontext __user *sc, sigset_t *mask, struct sigscratc err |= __copy_to_user(&sc->sc_gr[15], &scr->pt.r15, 8); /* r15 */ err |= __put_user(scr->pt.cr_iip + ia64_psr(&scr->pt)->ri, &sc->sc_ip); - if (flags & IA64_SC_FLAG_IN_SYSCALL) { - /* Clear scratch registers if the signal interrupted a system call. */ - err |= __put_user(0, &sc->sc_ar_ccv); /* ar.ccv */ - err |= __put_user(0, &sc->sc_br[7]); /* b7 */ - err |= __put_user(0, &sc->sc_gr[14]); /* r14 */ - err |= __clear_user(&sc->sc_ar25, 2*8); /* ar.csd & ar.ssd */ - err |= __clear_user(&sc->sc_gr[2], 2*8); /* r2-r3 */ - err |= __clear_user(&sc->sc_gr[16], 16*8); /* r16-r31 */ - } else { + if (!(flags & IA64_SC_FLAG_IN_SYSCALL)) { /* Copy scratch regs to sigcontext if the signal didn't interrupt a syscall. */ err |= __put_user(scr->pt.ar_ccv, &sc->sc_ar_ccv); /* ar.ccv */ err |= __put_user(scr->pt.b7, &sc->sc_br[7]); /* b7 */ diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c index a7be4f203420..2a90c32024f4 100644 --- a/arch/ia64/kernel/uncached.c +++ b/arch/ia64/kernel/uncached.c @@ -118,7 +118,7 @@ static int uncached_add_chunk(struct uncached_pool *uc_pool, int nid) for (i = 0; i < (IA64_GRANULE_SIZE / PAGE_SIZE); i++) SetPageUncached(&page[i]); - flush_tlb_kernel_range(uc_addr, uc_adddr + IA64_GRANULE_SIZE); + flush_tlb_kernel_range(uc_addr, uc_addr + IA64_GRANULE_SIZE); status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL); if (status == PAL_VISIBILITY_OK_REMOTE_NEEDED) { diff --git a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c index cef164729db7..655da240d13c 100644 --- a/arch/ia64/mm/tlb.c +++ b/arch/ia64/mm/tlb.c @@ -10,6 +10,7 @@ * IPI based ptc implementation and A-step IPI implementation. * Rohit Seth * Ken Chen + * Christophe de Dinechin : Avoid ptc.e on memory allocation */ #include #include @@ -89,9 +90,16 @@ ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start, { static DEFINE_SPINLOCK(ptcg_lock); - if (mm != current->active_mm || !current->mm) { - flush_tlb_all(); - return; + struct mm_struct *active_mm = current->active_mm; + + if (mm != active_mm) { + /* Restore region IDs for mm */ + if (mm && active_mm) { + activate_context(mm); + } else { + flush_tlb_all(); + return; + } } /* HW requires global serialization of ptc.ga. */ @@ -107,6 +115,10 @@ ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start, } while (start < end); } spin_unlock(&ptcg_lock); + + if (mm != active_mm) { + activate_context(active_mm); + } } void diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c index b362d6d6a8c8..9456d4034024 100644 --- a/arch/ia64/sn/kernel/bte.c +++ b/arch/ia64/sn/kernel/bte.c @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. */ #include @@ -227,7 +227,7 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification) BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na)); if (transfer_stat & IBLS_ERROR) { - bte_status = transfer_stat & ~IBLS_ERROR; + bte_status = BTE_GET_ERROR_STATUS(transfer_stat); } else { bte_status = BTE_SUCCESS; } diff --git a/arch/ia64/sn/kernel/bte_error.c b/arch/ia64/sn/kernel/bte_error.c index 27c5936ccfe9..4cb09f3f1efc 100644 --- a/arch/ia64/sn/kernel/bte_error.c +++ b/arch/ia64/sn/kernel/bte_error.c @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. */ #include @@ -148,7 +148,11 @@ int shub2_bte_error_handler(unsigned long _nodepda) for (i = 0; i < BTES_PER_NODE; i++) { bte = &err_nodepda->bte_if[i]; status = BTE_LNSTAT_LOAD(bte); - if ((status & IBLS_ERROR) || !(status & IBLS_BUSY)) + if (status & IBLS_ERROR) { + bte->bh_error = BTE_SHUB2_ERROR(status); + continue; + } + if (!(status & IBLS_BUSY)) continue; mod_timer(recovery_timer, jiffies + (HZ * 5)); BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda, diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index cee9379d44e0..e1a3e19d3d9c 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c @@ -41,7 +41,7 @@ * } else * do desired mmr access * - * According to hw, we can use reads instead of writes to the above addres + * According to hw, we can use reads instead of writes to the above address * * Note this WAR can only to be used for accessing internal MMR's in the * TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff. This includes the diff --git a/include/asm-ia64/bitops.h b/include/asm-ia64/bitops.h index a977affaebec..a1b9719f5fbb 100644 --- a/include/asm-ia64/bitops.h +++ b/include/asm-ia64/bitops.h @@ -124,10 +124,21 @@ clear_bit_unlock (int nr, volatile void *addr) /** * __clear_bit_unlock - Non-atomically clear a bit with release * - * This is like clear_bit_unlock, but the implementation may use a non-atomic - * store (this one uses an atomic, however). + * This is like clear_bit_unlock, but the implementation uses a store + * with release semantics. See also __raw_spin_unlock(). */ -#define __clear_bit_unlock clear_bit_unlock +static __inline__ void +__clear_bit_unlock(int nr, volatile void *addr) +{ + __u32 mask, new; + volatile __u32 *m; + + m = (volatile __u32 *)addr + (nr >> 5); + mask = ~(1 << (nr & 31)); + new = *m & mask; + barrier(); + ia64_st4_rel_nta(m, new); +} /** * __clear_bit - Clears a bit in memory (non-atomic version) diff --git a/include/asm-ia64/gcc_intrin.h b/include/asm-ia64/gcc_intrin.h index 4fb4e439b05c..e58d3298fa10 100644 --- a/include/asm-ia64/gcc_intrin.h +++ b/include/asm-ia64/gcc_intrin.h @@ -191,6 +191,11 @@ register unsigned long ia64_r13 asm ("r13") __attribute_used__; asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \ }) +#define ia64_st4_rel_nta(m, val) \ +({ \ + asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \ +}) + #define ia64_stfs(x, regnum) \ ({ \ register double __f__ asm ("f"#regnum); \ diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h index bba5baa3c7fc..7e6e3779670a 100644 --- a/include/asm-ia64/hw_irq.h +++ b/include/asm-ia64/hw_irq.h @@ -63,7 +63,7 @@ extern int ia64_last_device_vector; #define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1) #define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */ -#define IA64_PERFMON_VECTOR 0xee /* performanc monitor interrupt vector */ +#define IA64_PERFMON_VECTOR 0xee /* performance monitor interrupt vector */ #define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */ #define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */ #define IA64_IPI_LOCAL_TLB_FLUSH 0xfc /* SMP flush local TLB */ diff --git a/include/asm-ia64/intel_intrin.h b/include/asm-ia64/intel_intrin.h index d069b6acddce..a520d103d808 100644 --- a/include/asm-ia64/intel_intrin.h +++ b/include/asm-ia64/intel_intrin.h @@ -110,6 +110,9 @@ #define ia64_st4_rel __st4_rel #define ia64_st8_rel __st8_rel +/* FIXME: need st4.rel.nta intrinsic */ +#define ia64_st4_rel_nta __st4_rel + #define ia64_ld1_acq __ld1_acq #define ia64_ld2_acq __ld2_acq #define ia64_ld4_acq __ld4_acq diff --git a/include/asm-ia64/sn/bte.h b/include/asm-ia64/sn/bte.h index 5335d87ca5f8..a0d214f43115 100644 --- a/include/asm-ia64/sn/bte.h +++ b/include/asm-ia64/sn/bte.h @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. */ @@ -150,6 +150,35 @@ typedef enum { BTEFAIL_NOTAVAIL, /* BTE not available */ } bte_result_t; +#define BTEFAIL_SH2_RESP_SHORT 0x1 /* bit 000001 */ +#define BTEFAIL_SH2_RESP_LONG 0x2 /* bit 000010 */ +#define BTEFAIL_SH2_RESP_DSP 0x4 /* bit 000100 */ +#define BTEFAIL_SH2_RESP_ACCESS 0x8 /* bit 001000 */ +#define BTEFAIL_SH2_CRB_TO 0x10 /* bit 010000 */ +#define BTEFAIL_SH2_NACK_LIMIT 0x20 /* bit 100000 */ +#define BTEFAIL_SH2_ALL 0x3F /* bit 111111 */ + +#define BTE_ERR_BITS 0x3FUL +#define BTE_ERR_SHIFT 36 +#define BTE_ERR_MASK (BTE_ERR_BITS << BTE_ERR_SHIFT) + +#define BTE_ERROR_RETRY(value) \ + (is_shub2() ? (value != BTEFAIL_SH2_CRB_TO) \ + : (value != BTEFAIL_TOUT)) + +/* + * On shub1 BTE_ERR_MASK will always be false, so no need for is_shub2() + */ +#define BTE_SHUB2_ERROR(_status) \ + ((_status & BTE_ERR_MASK) \ + ? (((_status >> BTE_ERR_SHIFT) & BTE_ERR_BITS) | IBLS_ERROR) \ + : _status) + +#define BTE_GET_ERROR_STATUS(_status) \ + (BTE_SHUB2_ERROR(_status) & ~IBLS_ERROR) + +#define BTE_VALID_SH2_ERROR(value) \ + ((value >= BTEFAIL_SH2_RESP_SHORT) && (value <= BTEFAIL_SH2_ALL)) /* * Structure defining a bte. An instance of this diff --git a/include/asm-ia64/sn/xp.h b/include/asm-ia64/sn/xp.h index 6f807e0193b7..f7711b308e48 100644 --- a/include/asm-ia64/sn/xp.h +++ b/include/asm-ia64/sn/xp.h @@ -86,7 +86,7 @@ xp_bte_copy(u64 src, u64 vdst, u64 len, u64 mode, void *notification) BUG_ON(REGION_NUMBER(vdst) != RGN_KERNEL); ret = bte_copy(src, pdst, len, mode, notification); - if (ret != BTE_SUCCESS) { + if ((ret != BTE_SUCCESS) && BTE_ERROR_RETRY(ret)) { if (!in_interrupt()) { cond_resched(); } @@ -244,7 +244,30 @@ enum xpc_retval { xpcDisconnected, /* 51: channel disconnected (closed) */ - xpcUnknownReason /* 52: unknown reason -- must be last in list */ + xpcBteSh2Start, /* 52: BTE CRB timeout */ + + /* 53: 0x1 BTE Error Response Short */ + xpcBteSh2RspShort = xpcBteSh2Start + BTEFAIL_SH2_RESP_SHORT, + + /* 54: 0x2 BTE Error Response Long */ + xpcBteSh2RspLong = xpcBteSh2Start + BTEFAIL_SH2_RESP_LONG, + + /* 56: 0x4 BTE Error Response DSB */ + xpcBteSh2RspDSB = xpcBteSh2Start + BTEFAIL_SH2_RESP_DSP, + + /* 60: 0x8 BTE Error Response Access */ + xpcBteSh2RspAccess = xpcBteSh2Start + BTEFAIL_SH2_RESP_ACCESS, + + /* 68: 0x10 BTE Error CRB timeout */ + xpcBteSh2CRBTO = xpcBteSh2Start + BTEFAIL_SH2_CRB_TO, + + /* 84: 0x20 BTE Error NACK limit */ + xpcBteSh2NACKLimit = xpcBteSh2Start + BTEFAIL_SH2_NACK_LIMIT, + + /* 115: BTE end */ + xpcBteSh2End = xpcBteSh2Start + BTEFAIL_SH2_ALL, + + xpcUnknownReason /* 116: unknown reason -- must be last in list */ }; diff --git a/include/asm-ia64/sn/xpc.h b/include/asm-ia64/sn/xpc.h index e52b8508083b..8e5d7de9c632 100644 --- a/include/asm-ia64/sn/xpc.h +++ b/include/asm-ia64/sn/xpc.h @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2004-2006 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2004-2007 Silicon Graphics, Inc. All Rights Reserved. */ @@ -1211,6 +1211,12 @@ xpc_IPI_init(int index) static inline enum xpc_retval xpc_map_bte_errors(bte_result_t error) { + if (is_shub2()) { + if (BTE_VALID_SH2_ERROR(error)) + return xpcBteSh2Start + error; + else + return xpcBteUnmappedError; + } switch (error) { case BTE_SUCCESS: return xpcSuccess; case BTEFAIL_DIR: return xpcBteDirectoryError; diff --git a/include/asm-ia64/tlbflush.h b/include/asm-ia64/tlbflush.h index 80bcb0a38e8a..7774a1cac0cc 100644 --- a/include/asm-ia64/tlbflush.h +++ b/include/asm-ia64/tlbflush.h @@ -92,6 +92,10 @@ void smp_local_flush_tlb(void); #define smp_local_flush_tlb() #endif -#define flush_tlb_kernel_range(start, end) flush_tlb_all() /* XXX fix me */ +static inline void flush_tlb_kernel_range(unsigned long start, + unsigned long end) +{ + flush_tlb_all(); /* XXX fix me */ +} #endif /* _ASM_IA64_TLBFLUSH_H */