mirror of https://gitee.com/openkylin/linux.git
Merge branch 'for_3.5/gpio/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into gpio/next
This commit is contained in:
commit
453007cf47
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@ -46,7 +46,6 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
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static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
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.virtual_irq_start = IH_MPUIO_BASE,
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.is_mpuio = true,
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.is_mpuio = true,
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.bank_width = 16,
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.bank_width = 16,
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.bank_stride = 1,
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.bank_stride = 1,
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@ -89,7 +88,6 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
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static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
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.virtual_irq_start = IH_GPIO_BASE,
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.bank_width = 16,
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.bank_width = 16,
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.regs = &omap15xx_gpio_regs,
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.regs = &omap15xx_gpio_regs,
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};
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};
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@ -52,7 +52,6 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
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static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
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.virtual_irq_start = IH_MPUIO_BASE,
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.is_mpuio = true,
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.is_mpuio = true,
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.bank_width = 16,
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.bank_width = 16,
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.bank_stride = 1,
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.bank_stride = 1,
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@ -99,7 +98,6 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
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static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
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.virtual_irq_start = IH_GPIO_BASE,
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.bank_width = 16,
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.bank_width = 16,
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.regs = &omap16xx_gpio_regs,
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.regs = &omap16xx_gpio_regs,
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};
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};
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@ -128,7 +126,6 @@ static struct __initdata resource omap16xx_gpio2_resources[] = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
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static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
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.virtual_irq_start = IH_GPIO_BASE + 16,
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.bank_width = 16,
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.bank_width = 16,
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.regs = &omap16xx_gpio_regs,
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.regs = &omap16xx_gpio_regs,
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};
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};
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@ -157,7 +154,6 @@ static struct __initdata resource omap16xx_gpio3_resources[] = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
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static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
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.virtual_irq_start = IH_GPIO_BASE + 32,
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.bank_width = 16,
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.bank_width = 16,
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.regs = &omap16xx_gpio_regs,
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.regs = &omap16xx_gpio_regs,
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};
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};
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@ -186,7 +182,6 @@ static struct __initdata resource omap16xx_gpio4_resources[] = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
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static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
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.virtual_irq_start = IH_GPIO_BASE + 48,
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.bank_width = 16,
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.bank_width = 16,
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.regs = &omap16xx_gpio_regs,
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.regs = &omap16xx_gpio_regs,
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};
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};
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@ -51,7 +51,6 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
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static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
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.virtual_irq_start = IH_MPUIO_BASE,
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.is_mpuio = true,
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.is_mpuio = true,
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.bank_width = 16,
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.bank_width = 16,
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.bank_stride = 2,
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.bank_stride = 2,
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@ -93,7 +92,6 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
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static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
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.virtual_irq_start = IH_GPIO_BASE,
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.bank_width = 32,
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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.regs = &omap7xx_gpio_regs,
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};
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};
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@ -122,7 +120,6 @@ static struct __initdata resource omap7xx_gpio2_resources[] = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
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static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
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.virtual_irq_start = IH_GPIO_BASE + 32,
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.bank_width = 32,
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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.regs = &omap7xx_gpio_regs,
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};
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};
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@ -151,7 +148,6 @@ static struct __initdata resource omap7xx_gpio3_resources[] = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {
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static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {
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.virtual_irq_start = IH_GPIO_BASE + 64,
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.bank_width = 32,
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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.regs = &omap7xx_gpio_regs,
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};
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};
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@ -180,7 +176,6 @@ static struct __initdata resource omap7xx_gpio4_resources[] = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {
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static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {
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.virtual_irq_start = IH_GPIO_BASE + 96,
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.bank_width = 32,
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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.regs = &omap7xx_gpio_regs,
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};
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};
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@ -209,7 +204,6 @@ static struct __initdata resource omap7xx_gpio5_resources[] = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {
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static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {
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.virtual_irq_start = IH_GPIO_BASE + 128,
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.bank_width = 32,
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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.regs = &omap7xx_gpio_regs,
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};
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};
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@ -238,7 +232,6 @@ static struct __initdata resource omap7xx_gpio6_resources[] = {
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};
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};
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static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {
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static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {
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.virtual_irq_start = IH_GPIO_BASE + 160,
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.bank_width = 32,
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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.regs = &omap7xx_gpio_regs,
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};
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};
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@ -55,7 +55,6 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
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dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
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dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
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pdata->bank_width = dev_attr->bank_width;
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pdata->bank_width = dev_attr->bank_width;
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pdata->dbck_flag = dev_attr->dbck_flag;
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pdata->dbck_flag = dev_attr->dbck_flag;
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pdata->virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1);
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pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
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pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
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pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
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pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
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if (!pdata) {
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if (!pdata) {
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@ -102,6 +101,8 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
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pdata->regs->dataout = OMAP4_GPIO_DATAOUT;
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pdata->regs->dataout = OMAP4_GPIO_DATAOUT;
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pdata->regs->set_dataout = OMAP4_GPIO_SETDATAOUT;
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pdata->regs->set_dataout = OMAP4_GPIO_SETDATAOUT;
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pdata->regs->clr_dataout = OMAP4_GPIO_CLEARDATAOUT;
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pdata->regs->clr_dataout = OMAP4_GPIO_CLEARDATAOUT;
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pdata->regs->irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0;
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pdata->regs->irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1;
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pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
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pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
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pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
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pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
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pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
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pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
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@ -172,6 +172,8 @@ struct omap_gpio_reg_offs {
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u16 clr_dataout;
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u16 clr_dataout;
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u16 irqstatus;
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u16 irqstatus;
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u16 irqstatus2;
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u16 irqstatus2;
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u16 irqstatus_raw0;
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u16 irqstatus_raw1;
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u16 irqenable;
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u16 irqenable;
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u16 irqenable2;
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u16 irqenable2;
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u16 set_irqenable;
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u16 set_irqenable;
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@ -193,7 +195,6 @@ struct omap_gpio_reg_offs {
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};
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};
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struct omap_gpio_platform_data {
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struct omap_gpio_platform_data {
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u16 virtual_irq_start;
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int bank_type;
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int bank_type;
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int bank_width; /* GPIO bank width */
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int bank_width; /* GPIO bank width */
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int bank_stride; /* Only needed for omap1 MPUIO */
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int bank_stride; /* Only needed for omap1 MPUIO */
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@ -57,14 +57,10 @@ struct gpio_bank {
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u16 irq;
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u16 irq;
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int irq_base;
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int irq_base;
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struct irq_domain *domain;
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struct irq_domain *domain;
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u32 suspend_wakeup;
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u32 saved_wakeup;
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u32 non_wakeup_gpios;
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u32 non_wakeup_gpios;
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u32 enabled_non_wakeup_gpios;
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u32 enabled_non_wakeup_gpios;
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struct gpio_regs context;
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struct gpio_regs context;
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u32 saved_datain;
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u32 saved_datain;
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u32 saved_fallingdetect;
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u32 saved_risingdetect;
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u32 level_mask;
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u32 level_mask;
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u32 toggle_mask;
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u32 toggle_mask;
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spinlock_t lock;
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spinlock_t lock;
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@ -516,11 +512,11 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
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spin_lock_irqsave(&bank->lock, flags);
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spin_lock_irqsave(&bank->lock, flags);
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if (enable)
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if (enable)
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bank->suspend_wakeup |= gpio_bit;
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bank->context.wake_en |= gpio_bit;
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else
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else
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bank->suspend_wakeup &= ~gpio_bit;
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bank->context.wake_en &= ~gpio_bit;
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__raw_writel(bank->suspend_wakeup, bank->base + bank->regs->wkup_en);
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__raw_writel(bank->context.wake_en, bank->base + bank->regs->wkup_en);
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spin_unlock_irqrestore(&bank->lock, flags);
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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return 0;
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@ -640,7 +636,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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u32 isr;
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u32 isr;
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unsigned int gpio_irq, gpio_index;
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unsigned int gpio_irq, gpio_index;
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struct gpio_bank *bank;
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struct gpio_bank *bank;
|
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u32 retrigger = 0;
|
|
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int unmasked = 0;
|
int unmasked = 0;
|
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||||
|
|
||||||
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@ -677,8 +672,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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chained_irq_exit(chip, desc);
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chained_irq_exit(chip, desc);
|
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}
|
}
|
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|
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||||||
isr |= retrigger;
|
|
||||||
retrigger = 0;
|
|
||||||
if (!isr)
|
if (!isr)
|
||||||
break;
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break;
|
||||||
|
|
||||||
|
@ -789,8 +782,7 @@ static int omap_mpuio_suspend_noirq(struct device *dev)
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
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|
||||||
spin_lock_irqsave(&bank->lock, flags);
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spin_lock_irqsave(&bank->lock, flags);
|
||||||
bank->saved_wakeup = __raw_readl(mask_reg);
|
__raw_writel(0xffff & ~bank->context.wake_en, mask_reg);
|
||||||
__raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg);
|
|
||||||
spin_unlock_irqrestore(&bank->lock, flags);
|
spin_unlock_irqrestore(&bank->lock, flags);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -805,7 +797,7 @@ static int omap_mpuio_resume_noirq(struct device *dev)
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&bank->lock, flags);
|
spin_lock_irqsave(&bank->lock, flags);
|
||||||
__raw_writel(bank->saved_wakeup, mask_reg);
|
__raw_writel(bank->context.wake_en, mask_reg);
|
||||||
spin_unlock_irqrestore(&bank->lock, flags);
|
spin_unlock_irqrestore(&bank->lock, flags);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -965,18 +957,15 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
|
||||||
}
|
}
|
||||||
|
|
||||||
_gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv);
|
_gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv);
|
||||||
_gpio_rmw(base, bank->regs->irqstatus, l,
|
_gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv);
|
||||||
bank->regs->irqenable_inv == false);
|
|
||||||
_gpio_rmw(base, bank->regs->irqenable, l, bank->regs->debounce_en != 0);
|
|
||||||
_gpio_rmw(base, bank->regs->irqenable, l, bank->regs->ctrl != 0);
|
|
||||||
if (bank->regs->debounce_en)
|
if (bank->regs->debounce_en)
|
||||||
_gpio_rmw(base, bank->regs->debounce_en, 0, 1);
|
__raw_writel(0, base + bank->regs->debounce_en);
|
||||||
|
|
||||||
/* Save OE default value (0xffffffff) in the context */
|
/* Save OE default value (0xffffffff) in the context */
|
||||||
bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
|
bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
|
||||||
/* Initialize interface clk ungated, module enabled */
|
/* Initialize interface clk ungated, module enabled */
|
||||||
if (bank->regs->ctrl)
|
if (bank->regs->ctrl)
|
||||||
_gpio_rmw(base, bank->regs->ctrl, 0, 1);
|
__raw_writel(0, base + bank->regs->ctrl);
|
||||||
}
|
}
|
||||||
|
|
||||||
static __devinit void
|
static __devinit void
|
||||||
|
@ -1155,54 +1144,6 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||||
|
|
||||||
#if defined(CONFIG_PM_SLEEP)
|
|
||||||
static int omap_gpio_suspend(struct device *dev)
|
|
||||||
{
|
|
||||||
struct platform_device *pdev = to_platform_device(dev);
|
|
||||||
struct gpio_bank *bank = platform_get_drvdata(pdev);
|
|
||||||
void __iomem *base = bank->base;
|
|
||||||
void __iomem *wakeup_enable;
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
if (!bank->mod_usage || !bank->loses_context)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
if (!bank->regs->wkup_en || !bank->suspend_wakeup)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
wakeup_enable = bank->base + bank->regs->wkup_en;
|
|
||||||
|
|
||||||
spin_lock_irqsave(&bank->lock, flags);
|
|
||||||
bank->saved_wakeup = __raw_readl(wakeup_enable);
|
|
||||||
_gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0);
|
|
||||||
_gpio_rmw(base, bank->regs->wkup_en, bank->suspend_wakeup, 1);
|
|
||||||
spin_unlock_irqrestore(&bank->lock, flags);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int omap_gpio_resume(struct device *dev)
|
|
||||||
{
|
|
||||||
struct platform_device *pdev = to_platform_device(dev);
|
|
||||||
struct gpio_bank *bank = platform_get_drvdata(pdev);
|
|
||||||
void __iomem *base = bank->base;
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
if (!bank->mod_usage || !bank->loses_context)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
if (!bank->regs->wkup_en || !bank->saved_wakeup)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
spin_lock_irqsave(&bank->lock, flags);
|
|
||||||
_gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0);
|
|
||||||
_gpio_rmw(base, bank->regs->wkup_en, bank->saved_wakeup, 1);
|
|
||||||
spin_unlock_irqrestore(&bank->lock, flags);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif /* CONFIG_PM_SLEEP */
|
|
||||||
|
|
||||||
#if defined(CONFIG_PM_RUNTIME)
|
#if defined(CONFIG_PM_RUNTIME)
|
||||||
static void omap_gpio_restore_context(struct gpio_bank *bank);
|
static void omap_gpio_restore_context(struct gpio_bank *bank);
|
||||||
|
|
||||||
|
@ -1216,6 +1157,9 @@ static int omap_gpio_runtime_suspend(struct device *dev)
|
||||||
|
|
||||||
spin_lock_irqsave(&bank->lock, flags);
|
spin_lock_irqsave(&bank->lock, flags);
|
||||||
|
|
||||||
|
if (!bank->enabled_non_wakeup_gpios)
|
||||||
|
goto update_gpio_context_count;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Only edges can generate a wakeup event to the PRCM.
|
* Only edges can generate a wakeup event to the PRCM.
|
||||||
*
|
*
|
||||||
|
@ -1247,11 +1191,9 @@ static int omap_gpio_runtime_suspend(struct device *dev)
|
||||||
*/
|
*/
|
||||||
bank->saved_datain = __raw_readl(bank->base +
|
bank->saved_datain = __raw_readl(bank->base +
|
||||||
bank->regs->datain);
|
bank->regs->datain);
|
||||||
l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
|
l1 = bank->context.fallingdetect;
|
||||||
l2 = __raw_readl(bank->base + bank->regs->risingdetect);
|
l2 = bank->context.risingdetect;
|
||||||
|
|
||||||
bank->saved_fallingdetect = l1;
|
|
||||||
bank->saved_risingdetect = l2;
|
|
||||||
l1 &= ~bank->enabled_non_wakeup_gpios;
|
l1 &= ~bank->enabled_non_wakeup_gpios;
|
||||||
l2 &= ~bank->enabled_non_wakeup_gpios;
|
l2 &= ~bank->enabled_non_wakeup_gpios;
|
||||||
|
|
||||||
|
@ -1293,11 +1235,6 @@ static int omap_gpio_runtime_resume(struct device *dev)
|
||||||
__raw_writel(bank->context.risingdetect,
|
__raw_writel(bank->context.risingdetect,
|
||||||
bank->base + bank->regs->risingdetect);
|
bank->base + bank->regs->risingdetect);
|
||||||
|
|
||||||
if (!bank->workaround_enabled) {
|
|
||||||
spin_unlock_irqrestore(&bank->lock, flags);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (bank->get_context_loss_count) {
|
if (bank->get_context_loss_count) {
|
||||||
context_lost_cnt_after =
|
context_lost_cnt_after =
|
||||||
bank->get_context_loss_count(bank->dev);
|
bank->get_context_loss_count(bank->dev);
|
||||||
|
@ -1310,9 +1247,14 @@ static int omap_gpio_runtime_resume(struct device *dev)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
__raw_writel(bank->saved_fallingdetect,
|
if (!bank->workaround_enabled) {
|
||||||
|
spin_unlock_irqrestore(&bank->lock, flags);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
__raw_writel(bank->context.fallingdetect,
|
||||||
bank->base + bank->regs->fallingdetect);
|
bank->base + bank->regs->fallingdetect);
|
||||||
__raw_writel(bank->saved_risingdetect,
|
__raw_writel(bank->context.risingdetect,
|
||||||
bank->base + bank->regs->risingdetect);
|
bank->base + bank->regs->risingdetect);
|
||||||
l = __raw_readl(bank->base + bank->regs->datain);
|
l = __raw_readl(bank->base + bank->regs->datain);
|
||||||
|
|
||||||
|
@ -1329,14 +1271,15 @@ static int omap_gpio_runtime_resume(struct device *dev)
|
||||||
* No need to generate IRQs for the rising edge for gpio IRQs
|
* No need to generate IRQs for the rising edge for gpio IRQs
|
||||||
* configured with falling edge only; and vice versa.
|
* configured with falling edge only; and vice versa.
|
||||||
*/
|
*/
|
||||||
gen0 = l & bank->saved_fallingdetect;
|
gen0 = l & bank->context.fallingdetect;
|
||||||
gen0 &= bank->saved_datain;
|
gen0 &= bank->saved_datain;
|
||||||
|
|
||||||
gen1 = l & bank->saved_risingdetect;
|
gen1 = l & bank->context.risingdetect;
|
||||||
gen1 &= ~(bank->saved_datain);
|
gen1 &= ~(bank->saved_datain);
|
||||||
|
|
||||||
/* FIXME: Consider GPIO IRQs with level detections properly! */
|
/* FIXME: Consider GPIO IRQs with level detections properly! */
|
||||||
gen = l & (~(bank->saved_fallingdetect) & ~(bank->saved_risingdetect));
|
gen = l & (~(bank->context.fallingdetect) &
|
||||||
|
~(bank->context.risingdetect));
|
||||||
/* Consider all GPIO IRQs needed to be updated */
|
/* Consider all GPIO IRQs needed to be updated */
|
||||||
gen |= gen0 | gen1;
|
gen |= gen0 | gen1;
|
||||||
|
|
||||||
|
@ -1346,14 +1289,14 @@ static int omap_gpio_runtime_resume(struct device *dev)
|
||||||
old0 = __raw_readl(bank->base + bank->regs->leveldetect0);
|
old0 = __raw_readl(bank->base + bank->regs->leveldetect0);
|
||||||
old1 = __raw_readl(bank->base + bank->regs->leveldetect1);
|
old1 = __raw_readl(bank->base + bank->regs->leveldetect1);
|
||||||
|
|
||||||
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
|
if (!bank->regs->irqstatus_raw0) {
|
||||||
__raw_writel(old0 | gen, bank->base +
|
__raw_writel(old0 | gen, bank->base +
|
||||||
bank->regs->leveldetect0);
|
bank->regs->leveldetect0);
|
||||||
__raw_writel(old1 | gen, bank->base +
|
__raw_writel(old1 | gen, bank->base +
|
||||||
bank->regs->leveldetect1);
|
bank->regs->leveldetect1);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cpu_is_omap44xx()) {
|
if (bank->regs->irqstatus_raw0) {
|
||||||
__raw_writel(old0 | l, bank->base +
|
__raw_writel(old0 | l, bank->base +
|
||||||
bank->regs->leveldetect0);
|
bank->regs->leveldetect0);
|
||||||
__raw_writel(old1 | l, bank->base +
|
__raw_writel(old1 | l, bank->base +
|
||||||
|
@ -1432,14 +1375,11 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)
|
||||||
}
|
}
|
||||||
#endif /* CONFIG_PM_RUNTIME */
|
#endif /* CONFIG_PM_RUNTIME */
|
||||||
#else
|
#else
|
||||||
#define omap_gpio_suspend NULL
|
|
||||||
#define omap_gpio_resume NULL
|
|
||||||
#define omap_gpio_runtime_suspend NULL
|
#define omap_gpio_runtime_suspend NULL
|
||||||
#define omap_gpio_runtime_resume NULL
|
#define omap_gpio_runtime_resume NULL
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static const struct dev_pm_ops gpio_pm_ops = {
|
static const struct dev_pm_ops gpio_pm_ops = {
|
||||||
SET_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume)
|
|
||||||
SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
|
SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
|
||||||
NULL)
|
NULL)
|
||||||
};
|
};
|
||||||
|
|
Loading…
Reference in New Issue