Merge branch 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable

This commit is contained in:
Russell King 2009-12-04 17:34:16 +00:00
commit 4567c4a896
89 changed files with 3101 additions and 1114 deletions

View File

@ -707,6 +707,19 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-ixp4xx/
ARM/INTEL RESEARCH IMOTE 2 MACHINE SUPPORT
M: Jonathan Cameron <jic23@cam.ac.uk>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/imote2.c
ARM/INTEL RESEARCH STARGATE 2 MACHINE SUPPORT
M: Jonathan Cameron <jic23@cam.ac.uk>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/stargate2.c
F: drivers/pcmcia/pxa2xx_stargate2.c
ARM/INTEL XSC3 (MANZANO) ARM CORE
M: Lennert Buytenhek <kernel@wantstofly.org>
M: Dan Williams <dan.j.williams@intel.com>

View File

@ -1,15 +1,13 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.30-rc8
# Thu Jun 4 09:53:21 2009
# Linux kernel version: 2.6.32-rc4
# Tue Oct 13 19:03:13 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
# CONFIG_NO_IOPORT is not set
CONFIG_GENERIC_HARDIRQS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@ -18,14 +16,14 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HAS_CPUFREQ=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ARCH_MTD_XIP=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
#
# General setup
@ -46,11 +44,12 @@ CONFIG_SYSVIPC_SYSCTL=y
#
# RCU Subsystem
#
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
# CONFIG_TREE_PREEMPT_RCU is not set
# CONFIG_RCU_TRACE is not set
CONFIG_RCU_FANOUT=32
# CONFIG_RCU_FANOUT_EXACT is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=18
@ -83,7 +82,6 @@ CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
@ -96,6 +94,10 @@ CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
#
# Kernel Performance Events And Counters
#
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
CONFIG_COMPAT_BRK=y
@ -103,13 +105,17 @@ CONFIG_COMPAT_BRK=y
CONFIG_SLUB=y
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_CLK=y
# CONFIG_SLOW_WORK is not set
#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
CONFIG_SLOW_WORK=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
@ -117,11 +123,11 @@ CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_BLOCK=y
# CONFIG_LBD is not set
CONFIG_LBDAF=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
@ -142,19 +148,22 @@ CONFIG_FREEZER=y
#
# System Type
#
CONFIG_MMU=y
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_GEMINI is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_GEMINI is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_STMP3XXX is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_NOMADIK is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
@ -163,25 +172,27 @@ CONFIG_FREEZER=y
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_LOKI is not set
# CONFIG_ARCH_MV78XX0 is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_ORION5X is not set
# CONFIG_ARCH_MMP is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_W90X900 is not set
# CONFIG_ARCH_PNX4008 is not set
CONFIG_ARCH_PXA=y
# CONFIG_ARCH_MMP is not set
# CONFIG_ARCH_MSM is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_S3C64XX is not set
# CONFIG_ARCH_S5PC1XX is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_U300 is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_MSM is not set
# CONFIG_ARCH_W90X900 is not set
# CONFIG_ARCH_BCMRING is not set
#
# Intel PXA2xx/PXA3xx Implementations
@ -191,16 +202,19 @@ CONFIG_ARCH_PXA=y
# Supported PXA3xx Processor Variants
#
CONFIG_CPU_PXA300=y
# CONFIG_CPU_PXA310 is not set
CONFIG_CPU_PXA310=y
# CONFIG_CPU_PXA320 is not set
# CONFIG_CPU_PXA930 is not set
# CONFIG_CPU_PXA935 is not set
# CONFIG_CPU_PXA950 is not set
# CONFIG_ARCH_GUMSTIX is not set
# CONFIG_MACH_INTELMOTE2 is not set
# CONFIG_MACH_STARGATE2 is not set
# CONFIG_ARCH_LUBBOCK is not set
# CONFIG_MACH_LOGICPD_PXA270 is not set
# CONFIG_MACH_MAINSTONE is not set
# CONFIG_MACH_MP900C is not set
# CONFIG_MACH_BALLOON3 is not set
# CONFIG_ARCH_PXA_IDP is not set
# CONFIG_PXA_SHARPSL is not set
# CONFIG_ARCH_VIPER is not set
@ -218,6 +232,7 @@ CONFIG_CPU_PXA300=y
# CONFIG_MACH_SAAR is not set
# CONFIG_MACH_ARMCORE is not set
CONFIG_MACH_CM_X300=y
# CONFIG_MACH_H4700 is not set
# CONFIG_MACH_MAGICIAN is not set
# CONFIG_MACH_HIMALAYA is not set
# CONFIG_MACH_MIOA701 is not set
@ -225,8 +240,8 @@ CONFIG_MACH_CM_X300=y
# CONFIG_ARCH_PXA_PALM is not set
# CONFIG_MACH_CSB726 is not set
# CONFIG_PXA_EZX is not set
# CONFIG_MACH_XCEP is not set
CONFIG_PXA3xx=y
# CONFIG_PXA_PWM is not set
CONFIG_PLAT_PXA=y
#
@ -236,7 +251,7 @@ CONFIG_CPU_32=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_PABRT_NOIFAR=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_CP15=y
@ -246,11 +261,12 @@ CONFIG_IO_36=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
CONFIG_ARM_THUMB=y
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_OUTER_CACHE=y
CONFIG_CACHE_XSC3L2=y
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_IWMMXT=y
CONFIG_COMMON_CLKDEV=y
@ -272,11 +288,12 @@ CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_HZ=100
CONFIG_AEABI=y
CONFIG_OABI_COMPAT=y
# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
CONFIG_HIGHMEM=y
@ -292,17 +309,19 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096
CONFIG_ZONE_DMA_FLAG=0
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_UNEVICTABLE_LRU=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_UACCESS_WITH_MEMCPY is not set
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=jffs2 console=ttyS2,38400"
CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400"
# CONFIG_XIP_KERNEL is not set
# CONFIG_KEXEC is not set
@ -355,6 +374,7 @@ CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_APM_EMULATION=y
# CONFIG_PM_RUNTIME is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y
@ -396,6 +416,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
@ -410,6 +431,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
@ -433,22 +455,27 @@ CONFIG_BT_HIDP=m
#
# Bluetooth device drivers
#
# CONFIG_BT_HCIBTUSB is not set
CONFIG_BT_HCIBTUSB=m
# CONFIG_BT_HCIBTSDIO is not set
# CONFIG_BT_HCIUART is not set
# CONFIG_BT_HCIBCM203X is not set
# CONFIG_BT_HCIBPA10X is not set
# CONFIG_BT_HCIBFUSB is not set
# CONFIG_BT_HCIVHCI is not set
# CONFIG_BT_MRVL is not set
# CONFIG_AF_RXRPC is not set
CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
# CONFIG_WIRELESS_OLD_REGULATORY is not set
CONFIG_WIRELESS_EXT=y
CONFIG_WIRELESS_EXT_SYSFS=y
CONFIG_LIB80211=m
# CONFIG_LIB80211_DEBUG is not set
# CONFIG_MAC80211 is not set
#
# CFG80211 needs to be enabled for MAC80211
#
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
@ -461,6 +488,7 @@ CONFIG_LIB80211=m
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_DEVTMPFS is not set
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
@ -472,9 +500,9 @@ CONFIG_EXTRA_FIRMWARE=""
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AFS_PARTS is not set
@ -521,6 +549,9 @@ CONFIG_MTD_CFI_I2=y
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_DATAFLASH is not set
# CONFIG_MTD_M25P80 is not set
# CONFIG_MTD_SST25L is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
@ -556,7 +587,15 @@ CONFIG_MTD_NAND_PXA3xx=y
#
# UBI - Unsorted block images
#
# CONFIG_MTD_UBI is not set
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MTD_UBI_BEB_RESERVE=1
# CONFIG_MTD_UBI_GLUEBI is not set
#
# UBI debugging options
#
# CONFIG_MTD_UBI_DEBUG is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
@ -570,6 +609,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MG_DISK is not set
# CONFIG_MISC_DEVICES is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
@ -593,10 +633,6 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
@ -621,7 +657,6 @@ CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
CONFIG_COMPAT_NET_DEV_OPS=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
@ -636,6 +671,7 @@ CONFIG_MII=y
CONFIG_DM9000=y
CONFIG_DM9000_DEBUGLEVEL=0
CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y
# CONFIG_ENC28J60 is not set
# CONFIG_ETHOC is not set
# CONFIG_SMC911X is not set
# CONFIG_SMSC911X is not set
@ -648,20 +684,20 @@ CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_B44 is not set
# CONFIG_KS8842 is not set
# CONFIG_KS8851 is not set
# CONFIG_KS8851_MLL is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
#
# Wireless LAN
#
CONFIG_WLAN=y
# CONFIG_WLAN_PRE80211 is not set
CONFIG_WLAN_80211=y
CONFIG_LIBERTAS=m
# CONFIG_LIBERTAS_USB is not set
CONFIG_LIBERTAS_SDIO=m
# CONFIG_LIBERTAS_SPI is not set
# CONFIG_LIBERTAS_DEBUG is not set
# CONFIG_USB_ZD1201 is not set
# CONFIG_USB_NET_RNDIS_WLAN is not set
# CONFIG_HOSTAP is not set
#
@ -683,6 +719,7 @@ CONFIG_LIBERTAS_SDIO=m
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set
#
# Input device support
@ -706,33 +743,51 @@ CONFIG_INPUT_EVDEV=y
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_QT2160 is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
CONFIG_KEYBOARD_PXA27x=m
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
CONFIG_KEYBOARD_PXA27x=m
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_TOUCHSCREEN_ADS7846 is not set
# CONFIG_TOUCHSCREEN_AD7877 is not set
# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
# CONFIG_TOUCHSCREEN_AD7879 is not set
# CONFIG_TOUCHSCREEN_DA9034 is not set
# CONFIG_TOUCHSCREEN_EETI is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
# CONFIG_TOUCHSCREEN_GUNZE is not set
# CONFIG_TOUCHSCREEN_ELO is not set
# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
# CONFIG_TOUCHSCREEN_MCS5000 is not set
# CONFIG_TOUCHSCREEN_MTOUCH is not set
# CONFIG_TOUCHSCREEN_INEXIO is not set
# CONFIG_TOUCHSCREEN_MK712 is not set
# CONFIG_TOUCHSCREEN_PENMOUNT is not set
# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
CONFIG_TOUCHSCREEN_WM97XX=m
# CONFIG_TOUCHSCREEN_WM9705 is not set
CONFIG_TOUCHSCREEN_WM9712=y
# CONFIG_TOUCHSCREEN_WM9713 is not set
# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
# CONFIG_TOUCHSCREEN_TSC2007 is not set
# CONFIG_TOUCHSCREEN_W90X900 is not set
# CONFIG_INPUT_MISC is not set
#
@ -760,6 +815,7 @@ CONFIG_DEVKMEM=y
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_MAX3100 is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_SERIAL_CORE=y
@ -774,6 +830,7 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_TCG_TPM is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
# CONFIG_I2C_CHARDEV is not set
CONFIG_I2C_HELPER_AUTO=y
@ -784,6 +841,7 @@ CONFIG_I2C_HELPER_AUTO=y
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_DESIGNWARE is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_PXA=y
@ -807,19 +865,36 @@ CONFIG_I2C_PXA=y
# Miscellaneous I2C Chip support
#
# CONFIG_DS1682 is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
# CONFIG_SPI is not set
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
# CONFIG_SPI_PXA2XX is not set
#
# SPI Protocol Masters
#
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
#
# PPS support
#
# CONFIG_PPS is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set
CONFIG_GPIO_SYSFS=y
#
# Memory mapped GPIO expanders:
@ -839,11 +914,17 @@ CONFIG_GPIO_PCA953X=y
#
# SPI GPIO expanders:
#
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_GPIO_MC33880 is not set
#
# AC97 GPIO expanders:
#
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
@ -860,32 +941,33 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_MFD_ASIC3 is not set
# CONFIG_HTC_EGPIO is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_UCB1400_CORE is not set
# CONFIG_TPS65010 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_T7L66XB is not set
# CONFIG_MFD_TC6387XB is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_PMIC_DA903X is not set
CONFIG_PMIC_DA903X=y
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_PCF50633 is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
# CONFIG_DAB is not set
# CONFIG_MFD_MC13783 is not set
# CONFIG_AB3100_CORE is not set
# CONFIG_EZX_PCAP is not set
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_BQ24022 is not set
# CONFIG_REGULATOR_MAX1586 is not set
CONFIG_REGULATOR_DA903X=y
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
# CONFIG_MEDIA_SUPPORT is not set
#
# Graphics support
@ -925,7 +1007,17 @@ CONFIG_FB_PXA=y
# CONFIG_FB_METRONOME is not set
# CONFIG_FB_MB862XX is not set
# CONFIG_FB_BROADSHEET is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
# CONFIG_LCD_LMS283GF05 is not set
# CONFIG_LCD_LTV350QV is not set
# CONFIG_LCD_ILI9320 is not set
CONFIG_LCD_TDO24M=y
# CONFIG_LCD_VGG2432A4 is not set
# CONFIG_LCD_PLATFORM is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=m
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_BACKLIGHT_DA903X=m
#
# Display device support
@ -956,38 +1048,48 @@ CONFIG_LOGO_LINUX_MONO=y
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOGO_LINUX_CLUT224=y
CONFIG_SOUND=m
# CONFIG_SOUND_OSS_CORE is not set
CONFIG_SOUND_OSS_CORE=y
CONFIG_SOUND_OSS_CORE_PRECLAIM=y
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
CONFIG_SND_JACK=y
# CONFIG_SND_SEQUENCER is not set
# CONFIG_SND_MIXER_OSS is not set
# CONFIG_SND_PCM_OSS is not set
CONFIG_SND_OSSEMUL=y
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
CONFIG_SND_PCM_OSS_PLUGINS=y
# CONFIG_SND_DYNAMIC_MINORS is not set
CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
CONFIG_SND_VMASTER=y
# CONFIG_SND_RAWMIDI_SEQ is not set
# CONFIG_SND_OPL3_LIB_SEQ is not set
# CONFIG_SND_OPL4_LIB_SEQ is not set
# CONFIG_SND_SBAWE_SEQ is not set
# CONFIG_SND_EMU10K1_SEQ is not set
CONFIG_SND_AC97_CODEC=m
# CONFIG_SND_DRIVERS is not set
CONFIG_SND_ARM=y
CONFIG_SND_PXA2XX_LIB=m
CONFIG_SND_PXA2XX_LIB_AC97=y
# CONFIG_SND_PXA2XX_AC97 is not set
CONFIG_SND_USB=y
# CONFIG_SND_USB_AUDIO is not set
# CONFIG_SND_USB_CAIAQ is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_SOC_AC97_BUS=y
CONFIG_SND_PXA2XX_SOC=m
CONFIG_SND_PXA2XX_SOC_AC97=m
CONFIG_SND_PXA2XX_SOC_EM_X270=m
CONFIG_SND_SOC_I2C_AND_SPI=m
# CONFIG_SND_SOC_ALL_CODECS is not set
CONFIG_SND_SOC_WM9712=m
# CONFIG_SOUND_PRIME is not set
CONFIG_AC97_BUS=m
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
CONFIG_HID_DEBUG=y
# CONFIG_HIDRAW is not set
#
@ -1006,10 +1108,12 @@ CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CHICONY=y
CONFIG_HID_CYPRESS=y
CONFIG_HID_DRAGONRISE=y
# CONFIG_DRAGONRISE_FF is not set
CONFIG_HID_EZKEY=y
CONFIG_HID_KYE=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_LOGITECH=y
# CONFIG_LOGITECH_FF is not set
@ -1023,9 +1127,15 @@ CONFIG_HID_PETALYNX=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SONY=y
CONFIG_HID_SUNPLUS=y
CONFIG_HID_GREENASIA=y
# CONFIG_GREENASIA_FF is not set
CONFIG_HID_SMARTJOYPLUS=y
# CONFIG_SMARTJOYPLUS_FF is not set
CONFIG_HID_TOPSEED=y
CONFIG_HID_THRUSTMASTER=y
# CONFIG_THRUSTMASTER_FF is not set
CONFIG_HID_WACOM=m
CONFIG_HID_ZEROPLUS=y
# CONFIG_ZEROPLUS_FF is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
@ -1054,6 +1164,7 @@ CONFIG_USB_MON=y
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_ISP1760_HCD is not set
# CONFIG_USB_ISP1362_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@ -1151,8 +1262,9 @@ CONFIG_MMC_BLOCK_BOUNCE=y
#
CONFIG_MMC_PXA=m
# CONFIG_MMC_SDHCI is not set
# CONFIG_MMC_AT91 is not set
# CONFIG_MMC_ATMELMCI is not set
# CONFIG_MEMSTICK is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
@ -1162,8 +1274,10 @@ CONFIG_LEDS_CLASS=y
# CONFIG_LEDS_PCA9532 is not set
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_GPIO_PLATFORM=y
# CONFIG_LEDS_LP5521 is not set
# CONFIG_LEDS_LP3944 is not set
# CONFIG_LEDS_PCA955X is not set
# CONFIG_LEDS_DA903X is not set
# CONFIG_LEDS_DAC124S085 is not set
# CONFIG_LEDS_BD2802 is not set
#
@ -1179,6 +1293,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
#
# iptables trigger is under Netfilter config (LED target)
#
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
@ -1210,10 +1325,19 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
#
# SPI RTC drivers
#
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_DS1390 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set
# CONFIG_RTC_DRV_PCF2123 is not set
#
# Platform RTC drivers
@ -1233,12 +1357,15 @@ CONFIG_RTC_DRV_V3020=y
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_SA1100=y
# CONFIG_RTC_DRV_PXA is not set
# CONFIG_RTC_DRV_SA1100 is not set
CONFIG_RTC_DRV_PXA=y
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_REGULATOR is not set
# CONFIG_UIO is not set
#
# TI VLYNQ
#
# CONFIG_STAGING is not set
#
@ -1256,10 +1383,13 @@ CONFIG_JBD=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
@ -1319,6 +1449,12 @@ CONFIG_JFFS2_ZLIB=y
# CONFIG_JFFS2_LZO is not set
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
CONFIG_UBIFS_FS=y
# CONFIG_UBIFS_FS_XATTR is not set
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y
# CONFIG_UBIFS_FS_DEBUG is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
@ -1329,12 +1465,12 @@ CONFIG_JFFS2_RTIME=y
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
# CONFIG_NFS_V4_1 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
@ -1378,7 +1514,7 @@ CONFIG_MSDOS_PARTITION=y
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
# CONFIG_SYSV68_PARTITION is not set
CONFIG_NLS=m
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS_CODEPAGE_737 is not set
@ -1428,6 +1564,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
@ -1441,6 +1578,7 @@ CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
@ -1460,32 +1598,20 @@ CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
# CONFIG_PAGE_POISONING is not set
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_TRACING_SUPPORT=y
#
# Tracers
#
# CONFIG_FUNCTION_TRACER is not set
# CONFIG_IRQSOFF_TRACER is not set
# CONFIG_SCHED_TRACER is not set
# CONFIG_CONTEXT_SWITCH_TRACER is not set
# CONFIG_EVENT_TRACER is not set
# CONFIG_BOOT_TRACER is not set
# CONFIG_TRACE_BRANCH_PROFILING is not set
# CONFIG_STACK_TRACER is not set
# CONFIG_KMEMTRACE is not set
# CONFIG_WORKQUEUE_TRACER is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_FTRACE is not set
# CONFIG_DYNAMIC_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
@ -1509,7 +1635,6 @@ CONFIG_CRYPTO=y
#
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD2=y
@ -1551,11 +1676,13 @@ CONFIG_CRYPTO_ECB=m
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set
#
# Digest
#
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_MICHAEL_MIC=m
@ -1591,9 +1718,9 @@ CONFIG_CRYPTO_DES=y
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
CONFIG_CRYPTO_DEFLATE=y
# CONFIG_CRYPTO_ZLIB is not set
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_LZO=y
#
# Random Number Generation
@ -1608,7 +1735,7 @@ CONFIG_CRYPTO_DES=y
CONFIG_BITREVERSE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
@ -1616,6 +1743,8 @@ CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_LZMA=y

File diff suppressed because it is too large Load Diff

View File

@ -13,6 +13,9 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/smc91x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -85,12 +88,48 @@ static struct platform_device smc91x_device = {
.resource = smc91x_resources,
};
static struct mtd_partition aspenite_nand_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = SZ_1M,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_128K,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_8M,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = (SZ_2M + SZ_1M),
.mask_flags = 0,
}, {
.name = "filesystem",
.offset = MTDPART_OFS_APPEND,
.size = SZ_48M,
.mask_flags = 0,
}
};
static struct pxa3xx_nand_platform_data aspenite_nand_info = {
.enable_arbiter = 1,
.parts = aspenite_nand_partitions,
.nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
};
static void __init common_init(void)
{
mfp_config(ARRAY_AND_SIZE(common_pin_config));
/* on-chip devices */
pxa168_add_uart(1);
pxa168_add_nand(&aspenite_nand_info);
/* off-chip devices */
platform_device_register(&smc91x_device);

View File

@ -34,6 +34,21 @@ struct clkops apbc_clk_ops = {
.disable = apbc_clk_disable,
};
static void apmu_clk_enable(struct clk *clk)
{
__raw_writel(clk->enable_val, clk->clk_rst);
}
static void apmu_clk_disable(struct clk *clk)
{
__raw_writel(0, clk->clk_rst);
}
struct clkops apmu_clk_ops = {
.enable = apmu_clk_enable,
.disable = apmu_clk_disable,
};
static DEFINE_SPINLOCK(clocks_lock);
int clk_enable(struct clk *clk)

View File

@ -25,6 +25,7 @@ struct clk {
};
extern struct clkops apbc_clk_ops;
extern struct clkops apmu_clk_ops;
#define APBC_CLK(_name, _reg, _fnclksel, _rate) \
struct clk clk_##_name = { \

View File

@ -31,7 +31,9 @@
#define IRQ_PXA168_DDR_INT 26
#define IRQ_PXA168_UART1 27
#define IRQ_PXA168_UART2 28
#define IRQ_PXA168_UART3 29
#define IRQ_PXA168_WDT 35
#define IRQ_PXA168_MAIN_PMU 36
#define IRQ_PXA168_FRQ_CHANGE 38
#define IRQ_PXA168_SDH1 39
#define IRQ_PXA168_SDH2 40
@ -46,7 +48,7 @@
#define IRQ_PXA168_USB2 51
#define IRQ_PXA168_AC97 57
#define IRQ_PXA168_TWSI1 58
#define IRQ_PXA168_PMU 60
#define IRQ_PXA168_AP_PMU 60
#define IRQ_PXA168_SM_INT 63
/*

View File

@ -4,6 +4,7 @@
#include <linux/i2c.h>
#include <mach/devices.h>
#include <plat/i2c.h>
#include <plat/pxa3xx_nand.h>
extern struct pxa_device_desc pxa168_device_uart1;
extern struct pxa_device_desc pxa168_device_uart2;
@ -13,6 +14,7 @@ extern struct pxa_device_desc pxa168_device_pwm1;
extern struct pxa_device_desc pxa168_device_pwm2;
extern struct pxa_device_desc pxa168_device_pwm3;
extern struct pxa_device_desc pxa168_device_pwm4;
extern struct pxa_device_desc pxa168_device_nand;
static inline int pxa168_add_uart(int id)
{
@ -64,4 +66,9 @@ static inline int pxa168_add_pwm(int id)
return pxa_register_device(d, NULL, 0);
}
static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info)
{
return pxa_register_device(&pxa168_device_nand, info, sizeof(*info));
}
#endif /* __ASM_MACH_PXA168_H */

View File

@ -4,6 +4,7 @@
#include <linux/i2c.h>
#include <mach/devices.h>
#include <plat/i2c.h>
#include <plat/pxa3xx_nand.h>
extern struct pxa_device_desc pxa910_device_uart1;
extern struct pxa_device_desc pxa910_device_uart2;
@ -13,6 +14,7 @@ extern struct pxa_device_desc pxa910_device_pwm1;
extern struct pxa_device_desc pxa910_device_pwm2;
extern struct pxa_device_desc pxa910_device_pwm3;
extern struct pxa_device_desc pxa910_device_pwm4;
extern struct pxa_device_desc pxa910_device_nand;
static inline int pxa910_add_uart(int id)
{
@ -64,4 +66,9 @@ static inline int pxa910_add_pwm(int id)
return pxa_register_device(d, NULL, 0);
}
static inline int pxa910_add_nand(struct pxa3xx_nand_platform_data *info)
{
return pxa_register_device(&pxa910_device_nand, info, sizeof(*info));
}
#endif /* __ASM_MACH_PXA910_H */

View File

@ -19,6 +19,7 @@
#include <mach/addr-map.h>
#include <mach/cputype.h>
#include <mach/regs-apbc.h>
#include <mach/regs-apmu.h>
#include <mach/irqs.h>
#include <mach/gpio.h>
#include <mach/dma.h>
@ -72,6 +73,8 @@ static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
static APMU_CLK(nand, NAND, 0x01db, 208000000);
/* device and clock bindings */
static struct clk_lookup pxa168_clkregs[] = {
INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
@ -82,6 +85,7 @@ static struct clk_lookup pxa168_clkregs[] = {
INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
};
static int __init pxa168_init(void)
@ -127,3 +131,4 @@ PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);

View File

@ -110,6 +110,8 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
static APMU_CLK(nand, NAND, 0x01db, 208000000);
/* device and clock bindings */
static struct clk_lookup pxa910_clkregs[] = {
INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
@ -120,6 +122,7 @@ static struct clk_lookup pxa910_clkregs[] = {
INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
};
static int __init pxa910_init(void)
@ -174,3 +177,4 @@ PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);

View File

@ -11,9 +11,13 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/onenand.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <mach/addr-map.h>
#include <mach/mfp-pxa910.h>
#include <mach/pxa910.h>
@ -26,6 +30,86 @@ static unsigned long ttc_dkb_pin_config[] __initdata = {
/* UART2 */
GPIO47_UART2_RXD,
GPIO48_UART2_TXD,
/* DFI */
DF_IO0_ND_IO0,
DF_IO1_ND_IO1,
DF_IO2_ND_IO2,
DF_IO3_ND_IO3,
DF_IO4_ND_IO4,
DF_IO5_ND_IO5,
DF_IO6_ND_IO6,
DF_IO7_ND_IO7,
DF_IO8_ND_IO8,
DF_IO9_ND_IO9,
DF_IO10_ND_IO10,
DF_IO11_ND_IO11,
DF_IO12_ND_IO12,
DF_IO13_ND_IO13,
DF_IO14_ND_IO14,
DF_IO15_ND_IO15,
DF_nCS0_SM_nCS2_nCS0,
DF_ALE_SM_WEn_ND_ALE,
DF_CLE_SM_OEn_ND_CLE,
DF_WEn_DF_WEn,
DF_REn_DF_REn,
DF_RDY0_DF_RDY0,
};
static struct mtd_partition ttc_dkb_onenand_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = SZ_1M,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_128K,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_8M,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = (SZ_2M + SZ_1M),
.mask_flags = 0,
}, {
.name = "filesystem",
.offset = MTDPART_OFS_APPEND,
.size = SZ_48M,
.mask_flags = 0,
}
};
static struct onenand_platform_data ttc_dkb_onenand_info = {
.parts = ttc_dkb_onenand_partitions,
.nr_parts = ARRAY_SIZE(ttc_dkb_onenand_partitions),
};
static struct resource ttc_dkb_resource_onenand[] = {
[0] = {
.start = SMC_CS0_PHYS_BASE,
.end = SMC_CS0_PHYS_BASE + SZ_1M,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device ttc_dkb_device_onenand = {
.name = "onenand-flash",
.id = -1,
.resource = ttc_dkb_resource_onenand,
.num_resources = ARRAY_SIZE(ttc_dkb_resource_onenand),
.dev = {
.platform_data = &ttc_dkb_onenand_info,
},
};
static struct platform_device *ttc_dkb_devices[] = {
&ttc_dkb_device_onenand,
};
static void __init ttc_dkb_init(void)
@ -34,6 +118,9 @@ static void __init ttc_dkb_init(void)
/* on-chip devices */
pxa910_add_uart(1);
/* off-chip devices */
platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices));
}
MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")

View File

@ -2,34 +2,105 @@ if ARCH_PXA
menu "Intel PXA2xx/PXA3xx Implementations"
if PXA3xx
comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
menu "Supported PXA3xx Processor Variants"
config ARCH_LUBBOCK
bool "Intel DBPXA250 Development Platform (aka Lubbock)"
select PXA25x
select SA1111
select PXA_HAVE_BOARD_IRQS
config CPU_PXA300
bool "PXA300 (codename Monahans-L)"
config MACH_MAINSTONE
bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)"
select PXA27x
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config CPU_PXA310
bool "PXA310 (codename Monahans-LV)"
config MACH_ZYLONITE
bool
select PXA3xx
select PXA_SSP
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_ZYLONITE300
bool "PXA3xx Development Platform (aka Zylonite) PXA300/310"
select CPU_PXA300
select CPU_PXA310
select MACH_ZYLONITE
config CPU_PXA320
bool "PXA320 (codename Monahans-P)"
config MACH_ZYLONITE320
bool "PXA3xx Development Platform (aka Zylonite) PXA320"
select CPU_PXA320
select MACH_ZYLONITE
config CPU_PXA930
bool "PXA930 (codename Tavor-P)"
config MACH_LITTLETON
bool "PXA3xx Form Factor Platform (aka Littleton)"
select PXA3xx
select PXA_SSP
config CPU_PXA935
bool "PXA935 (codename Tavor-P65)"
config MACH_TAVOREVB
bool "PXA930 Evaluation Board (aka TavorEVB)"
select PXA3xx
select CPU_PXA930
config CPU_PXA950
bool "PXA950 (codename Tavor-PV2)"
config MACH_SAAR
bool "PXA930 Handheld Platform (aka SAAR)"
select PXA3xx
select CPU_PXA930
endmenu
comment "Third Party Dev Platforms (sorted by vendor name)"
endif
config ARCH_PXA_IDP
bool "Accelent Xscale IDP"
select PXA25x
config ARCH_VIPER
bool "Arcom/Eurotech VIPER SBC"
select PXA25x
select ISA
select I2C_GPIO
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
select PXA_HAVE_ISA_IRQS
config MACH_BALLOON3
bool "Balloon 3 board"
select PXA27x
select IWMMXT
select PXA_HAVE_BOARD_IRQS
config MACH_CSB726
bool "Enable Cogent CSB726 System On a Module"
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on a Cogent
CSB726 System On Module.
config CSB726_CSB701
bool "Enable support for CSB701 baseboard"
depends on MACH_CSB726
config MACH_ARMCORE
bool "CompuLab CM-X255/CM-X270 modules"
select PXA27x
select IWMMXT
select PXA25x
select PXA_SSP
config MACH_EM_X270
bool "CompuLab EM-x270 platform"
select PXA27x
config MACH_EXEDA
bool "CompuLab eXeda platform"
select PXA27x
config MACH_CM_X300
bool "CompuLab CM-X300 modules"
select PXA3xx
select CPU_PXA300
config ARCH_GUMSTIX
bool "Gumstix XScale 255 boards"
@ -62,11 +133,56 @@ config MACH_STARGATE2
select IWMMXT
select PXA_HAVE_BOARD_IRQS
config ARCH_LUBBOCK
bool "Intel DBPXA250 Development Platform"
config MACH_XCEP
bool "Iskratel Electronics XCEP"
select PXA25x
select SA1111
select PXA_HAVE_BOARD_IRQS
select MTD
select MTD_PARTITIONS
select MTD_PHYSMAP
select MTD_CFI_INTELEXT
select MTD_CFI
select MTD_CHAR
select SMC91X
select PXA_SSP
help
PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
Tuned for usage in Libera instruments for particle accelerators.
config TRIZEPS_PXA
bool "PXA based Keith und Koep Trizeps DIMM-Modules"
config MACH_TRIZEPS4
bool "Keith und Koep Trizeps4 DIMM-Module"
depends on TRIZEPS_PXA
select TRIZEPS_PCMCIA
select PXA27x
config MACH_TRIZEPS4WL
bool "Keith und Koep Trizeps4-WL DIMM-Module"
depends on TRIZEPS_PXA
select TRIZEPS_PCMCIA
select PXA27x
select PXA_SSP
choice
prompt "Select base board for Trizeps module"
depends on TRIZEPS_PXA
config MACH_TRIZEPS_CONXS
bool "ConXS Eval Board"
config MACH_TRIZEPS_UCONXS
bool "uConXS Eval Board"
config MACH_TRIZEPS_ANY
bool "another Board"
endchoice
config TRIZEPS_PCMCIA
bool
help
Enable PCMCIA support for Trizeps modules
config MACH_LOGICPD_PXA270
bool "LogicPD PXA270 Card Engine Development Platform"
@ -74,25 +190,215 @@ config MACH_LOGICPD_PXA270
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_MAINSTONE
bool "Intel HCDDBBVA0 Development Platform"
config MACH_PCM027
bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
select PXA27x
select IWMMXT
select PXA_SSP
select PXA_HAVE_BOARD_IRQS
config MACH_PCM990_BASEBOARD
bool "PHYTEC PCM-990 development board"
select HAVE_PWM
depends on MACH_PCM027
choice
prompt "display on pcm990"
depends on MACH_PCM990_BASEBOARD
config PCM990_DISPLAY_SHARP
bool "sharp lq084v1dg21 stn display"
config PCM990_DISPLAY_NEC
bool "nec nl6448bc20_18d tft display"
config PCM990_DISPLAY_NONE
bool "no display"
endchoice
config MACH_COLIBRI
bool "Toradex Colibri PXA270"
select PXA27x
config MACH_COLIBRI300
bool "Toradex Colibri PXA300/310"
select PXA3xx
select CPU_PXA300
select CPU_PXA310
select HAVE_PWM
config MACH_COLIBRI320
bool "Toradex Colibri PXA320"
select PXA3xx
select CPU_PXA320
comment "End-user Products (sorted by vendor name)"
config MACH_H4700
bool "HP iPAQ hx4700"
select PXA27x
select IWMMXT
select PXA_SSP
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_H5000
bool "HP iPAQ h5000"
select PXA25x
config MACH_HIMALAYA
bool "HTC Himalaya Support"
select CPU_PXA26x
select FB_W100
config MACH_MAGICIAN
bool "Enable HTC Magician Support"
select PXA27x
select IWMMXT
select PXA_SSP
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_MIOA701
bool "Mitac Mio A701 Support"
select PXA27x
select IWMMXT
select HAVE_PWM
select GPIO_SYSFS
help
Say Y here if you intend to run this kernel on a
MIO A701. Currently there is only basic support
for this PDA.
config PXA_EZX
bool "Motorola EZX Platform"
select PXA27x
select IWMMXT
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_EZX_A780
bool "Motorola EZX A780"
default y
depends on PXA_EZX
config MACH_EZX_E680
bool "Motorola EZX E680"
default y
depends on PXA_EZX
config MACH_EZX_A1200
bool "Motorola EZX A1200"
default y
depends on PXA_EZX
config MACH_EZX_A910
bool "Motorola EZX A910"
default y
depends on PXA_EZX
config MACH_EZX_E6
bool "Motorola EZX E6"
default y
depends on PXA_EZX
config MACH_EZX_E2
bool "Motorola EZX E2"
default y
depends on PXA_EZX
config MACH_MP900C
bool "Nec Mobilepro 900/c"
select PXA25x
config MACH_BALLOON3
bool "Balloon 3 board"
config ARCH_PXA_PALM
bool "PXA based Palm PDAs"
select HAVE_PWM
config MACH_PALMTE2
bool "Palm Tungsten|E2"
default y
depends on ARCH_PXA_PALM
select PXA25x
help
Say Y here if you intend to run this kernel on a Palm Tungsten|E2
handheld computer.
config MACH_PALMTC
bool "Palm Tungsten|C"
default y
depends on ARCH_PXA_PALM
select PXA25x
help
Say Y here if you intend to run this kernel on a Palm Tungsten|C
handheld computer.
config MACH_PALMT5
bool "Palm Tungsten|T5"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
select PXA_HAVE_BOARD_IRQS
help
Say Y here if you intend to run this kernel on a Palm Tungsten|T5
handheld computer.
config ARCH_PXA_IDP
bool "Accelent Xscale IDP"
select PXA25x
config MACH_PALMTX
bool "Palm T|X"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on a Palm T|X
handheld computer.
config MACH_PALMZ72
bool "Palm Zire 72"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on Palm Zire 72
handheld computer.
config MACH_PALMLD
bool "Palm LifeDrive"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on a Palm LifeDrive
handheld computer.
config PALM_TREO
bool
depends on ARCH_PXA_PALM
config MACH_CENTRO
bool "Palm Centro 685 (GSM)"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
select PALM_TREO
help
Say Y here if you intend to run this kernel on Palm Centro 685 (GSM)
smartphone.
config MACH_TREO680
bool "Palm Treo 680"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
select PALM_TREO
help
Say Y here if you intend to run this kernel on Palm Treo 680
smartphone.
config PXA_SHARPSL
bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
@ -169,15 +475,6 @@ config MACH_TOSA
select PXA25x
select PXA_HAVE_BOARD_IRQS
config ARCH_VIPER
bool "Arcom/Eurotech VIPER SBC"
select PXA25x
select ISA
select I2C_GPIO
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
select PXA_HAVE_ISA_IRQS
config ARCH_PXA_ESERIES
bool "PXA based Toshiba e-series PDAs"
select PXA25x
@ -234,297 +531,6 @@ config MACH_E800
Say Y here if you intend to run this kernel on a Toshiba
e800 family PDA.
config TRIZEPS_PXA
bool "PXA based Keith und Koep Trizeps DIMM-Modules"
config MACH_H5000
bool "HP iPAQ h5000"
select PXA25x
config MACH_TRIZEPS4
bool "Keith und Koep Trizeps4 DIMM-Module"
depends on TRIZEPS_PXA
select TRIZEPS_PCMCIA
select PXA27x
config MACH_TRIZEPS4WL
bool "Keith und Koep Trizeps4-WL DIMM-Module"
depends on TRIZEPS_PXA
select TRIZEPS_PCMCIA
select PXA27x
select PXA_SSP
choice
prompt "Select base board for Trizeps module"
depends on TRIZEPS_PXA
config MACH_TRIZEPS_CONXS
bool "ConXS Eval Board"
config MACH_TRIZEPS_UCONXS
bool "uConXS Eval Board"
config MACH_TRIZEPS_ANY
bool "another Board"
endchoice
config TRIZEPS_PCMCIA
bool
help
Enable PCMCIA support for Trizeps modules
config MACH_EM_X270
bool "CompuLab EM-x270 platform"
select PXA27x
config MACH_EXEDA
bool "CompuLab eXeda platform"
select PXA27x
config MACH_COLIBRI
bool "Toradex Colibri PXA270"
select PXA27x
config MACH_COLIBRI300
bool "Toradex Colibri PXA300/310"
select PXA3xx
select CPU_PXA300
config MACH_COLIBRI320
bool "Toradex Colibri PXA320"
select PXA3xx
select CPU_PXA320
config MACH_ZYLONITE
bool "PXA3xx Development Platform (aka Zylonite)"
select PXA3xx
select PXA_SSP
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_LITTLETON
bool "PXA3xx Form Factor Platform (aka Littleton)"
select PXA3xx
select PXA_SSP
config MACH_TAVOREVB
bool "PXA930 Evaluation Board (aka TavorEVB)"
select PXA3xx
select CPU_PXA930
config MACH_SAAR
bool "PXA930 Handheld Platform (aka SAAR)"
select PXA3xx
select CPU_PXA930
config MACH_ARMCORE
bool "CompuLab CM-X255/CM-X270 modules"
select PXA27x
select IWMMXT
select PXA25x
select PXA_SSP
config MACH_CM_X300
bool "CompuLab CM-X300 modules"
select PXA3xx
select CPU_PXA300
config MACH_H4700
bool "HP iPAQ hx4700"
select PXA27x
select IWMMXT
select PXA_SSP
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_MAGICIAN
bool "Enable HTC Magician Support"
select PXA27x
select IWMMXT
select PXA_SSP
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_HIMALAYA
bool "HTC Himalaya Support"
select CPU_PXA26x
select FB_W100
config MACH_MIOA701
bool "Mitac Mio A701 Support"
select PXA27x
select IWMMXT
select HAVE_PWM
select GPIO_SYSFS
help
Say Y here if you intend to run this kernel on a
MIO A701. Currently there is only basic support
for this PDA.
config MACH_PCM027
bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
select PXA27x
select IWMMXT
select PXA_SSP
select PXA_HAVE_BOARD_IRQS
config ARCH_PXA_PALM
bool "PXA based Palm PDAs"
select HAVE_PWM
config MACH_PALMTE2
bool "Palm Tungsten|E2"
default y
depends on ARCH_PXA_PALM
select PXA25x
help
Say Y here if you intend to run this kernel on a Palm Tungsten|E2
handheld computer.
config MACH_PALMTC
bool "Palm Tungsten|C"
default y
depends on ARCH_PXA_PALM
select PXA25x
help
Say Y here if you intend to run this kernel on a Palm Tungsten|C
handheld computer.
config MACH_PALMT5
bool "Palm Tungsten|T5"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on a Palm Tungsten|T5
handheld computer.
config MACH_PALMTX
bool "Palm T|X"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on a Palm T|X
handheld computer.
config MACH_PALMZ72
bool "Palm Zire 72"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on Palm Zire 72
handheld computer.
config MACH_TREO680
bool "Palm Treo 680"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on Palm Treo 680
smartphone.
config MACH_PALMLD
bool "Palm LifeDrive"
default y
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on a Palm LifeDrive
handheld computer.
config MACH_PCM990_BASEBOARD
bool "PHYTEC PCM-990 development board"
select HAVE_PWM
depends on MACH_PCM027
choice
prompt "display on pcm990"
depends on MACH_PCM990_BASEBOARD
config PCM990_DISPLAY_SHARP
bool "sharp lq084v1dg21 stn display"
config PCM990_DISPLAY_NEC
bool "nec nl6448bc20_18d tft display"
config PCM990_DISPLAY_NONE
bool "no display"
endchoice
config MACH_CSB726
bool "Enable Cogent CSB726 System On a Module"
select PXA27x
select IWMMXT
help
Say Y here if you intend to run this kernel on a Cogent
CSB726 System On Module.
config CSB726_CSB701
bool "Enable supprot for CSB701 baseboard"
depends on MACH_CSB726
config PXA_EZX
bool "Motorola EZX Platform"
select PXA27x
select IWMMXT
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_EZX_A780
bool "Motorola EZX A780"
default y
depends on PXA_EZX
config MACH_EZX_E680
bool "Motorola EZX E680"
default y
depends on PXA_EZX
config MACH_EZX_A1200
bool "Motorola EZX A1200"
default y
depends on PXA_EZX
config MACH_EZX_A910
bool "Motorola EZX A910"
default y
depends on PXA_EZX
config MACH_EZX_E6
bool "Motorola EZX E6"
default y
depends on PXA_EZX
config MACH_EZX_E2
bool "Motorola EZX E2"
default y
depends on PXA_EZX
config MACH_XCEP
bool "Iskratel Electronics XCEP"
select PXA25x
select MTD
select MTD_PARTITIONS
select MTD_PHYSMAP
select MTD_CFI_INTELEXT
select MTD_CFI
select MTD_CHAR
select SMC91X
select PXA_SSP
help
PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
Tuned for usage in Libera instruments for particle accelerators.
endmenu
config PXA25x
@ -551,6 +557,42 @@ config PXA3xx
help
Select code specific to PXA3xx variants
config CPU_PXA300
bool
select PXA3xx
help
PXA300 (codename Monahans-L)
config CPU_PXA310
bool
select CPU_PXA300
help
PXA310 (codename Monahans-LV)
config CPU_PXA320
bool
select PXA3xx
help
PXA320 (codename Monahans-P)
config CPU_PXA930
bool
select PXA3xx
help
PXA930 (codename Tavor-P)
config CPU_PXA935
bool
select CPU_PXA930
help
PXA935 (codename Tavor-P65)
config CPU_PXA950
bool
select CPU_PXA930
help
PXA950 (codename Tavor-PV2)
config PXA_SHARP_C7xx
bool
select PXA_SSP

View File

@ -24,33 +24,63 @@ obj-$(CONFIG_CPU_PXA300) += pxa300.o
obj-$(CONFIG_CPU_PXA320) += pxa320.o
obj-$(CONFIG_CPU_PXA930) += pxa930.o
# Specific board support
# NOTE: keep the order of boards in accordance to their order in Kconfig
# Intel/Marvell Dev Platforms
obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_MACH_ZYLONITE300) += zylonite.o zylonite_pxa300.o
obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o
obj-$(CONFIG_MACH_LITTLETON) += littleton.o
obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
obj-$(CONFIG_MACH_SAAR) += saar.o
# 3rd Party Dev Platforms
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_ARCH_VIPER) += viper.o
obj-$(CONFIG_MACH_BALLOON3) += balloon3.o
obj-$(CONFIG_MACH_CSB726) += csb726.o
obj-$(CONFIG_CSB726_CSB701) += csb701.o
obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o
ifeq ($(CONFIG_PCI),y)
obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o
endif
obj-$(CONFIG_MACH_EM_X270) += em-x270.o
obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o
obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_MACH_BALLOON3) += balloon3.o
obj-$(CONFIG_MACH_MP900C) += mp900.o
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o
obj-$(CONFIG_MACH_STARGATE2) += stargate2.o
obj-$(CONFIG_MACH_XCEP) += xcep.o
obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_PCM027) += pcm027.o
obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
# End-user Products
obj-$(CONFIG_MACH_H4700) += hx4700.o
obj-$(CONFIG_MACH_H5000) += h5000.o
obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o
obj-$(CONFIG_MACH_MAGICIAN) += magician.o
obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o
obj-$(CONFIG_PXA_EZX) += ezx.o
obj-$(CONFIG_MACH_MP900C) += mp900.o
obj-$(CONFIG_MACH_PALMTE2) += palmte2.o
obj-$(CONFIG_MACH_PALMTC) += palmtc.o
obj-$(CONFIG_MACH_PALMT5) += palmt5.o
obj-$(CONFIG_MACH_PALMTX) += palmtx.o
obj-$(CONFIG_MACH_PALMZ72) += palmz72.o
obj-$(CONFIG_MACH_PALMLD) += palmld.o
obj-$(CONFIG_PALM_TREO) += palmtreo.o
obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o
obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o
obj-$(CONFIG_MACH_POODLE) += poodle.o
obj-$(CONFIG_MACH_PCM027) += pcm027.o
obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
obj-$(CONFIG_MACH_TOSA) += tosa.o
obj-$(CONFIG_MACH_EM_X270) += em-x270.o
obj-$(CONFIG_MACH_H4700) += hx4700.o
obj-$(CONFIG_MACH_MAGICIAN) += magician.o
obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o
obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o
obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o
obj-$(CONFIG_MACH_E330) += e330.o
obj-$(CONFIG_MACH_E350) += e350.o
@ -58,34 +88,6 @@ obj-$(CONFIG_MACH_E740) += e740.o
obj-$(CONFIG_MACH_E750) += e750.o
obj-$(CONFIG_MACH_E400) += e400.o
obj-$(CONFIG_MACH_E800) += e800.o
obj-$(CONFIG_MACH_PALMTE2) += palmte2.o
obj-$(CONFIG_MACH_PALMTC) += palmtc.o
obj-$(CONFIG_MACH_PALMT5) += palmt5.o
obj-$(CONFIG_MACH_PALMTX) += palmtx.o
obj-$(CONFIG_MACH_PALMLD) += palmld.o
obj-$(CONFIG_MACH_PALMZ72) += palmz72.o
obj-$(CONFIG_MACH_TREO680) += treo680.o
obj-$(CONFIG_ARCH_VIPER) += viper.o
ifeq ($(CONFIG_MACH_ZYLONITE),y)
obj-y += zylonite.o
obj-$(CONFIG_CPU_PXA300) += zylonite_pxa300.o
obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o
endif
obj-$(CONFIG_MACH_LITTLETON) += littleton.o
obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
obj-$(CONFIG_MACH_SAAR) += saar.o
obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o
obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
obj-$(CONFIG_PXA_EZX) += ezx.o
obj-$(CONFIG_MACH_XCEP) += xcep.o
obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o
obj-$(CONFIG_MACH_STARGATE2) += stargate2.o
obj-$(CONFIG_MACH_CSB726) += csb726.o
obj-$(CONFIG_CSB726_CSB701) += csb701.o
# Support for blinky lights
led-y := leds.o
@ -95,8 +97,4 @@ led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
obj-$(CONFIG_LEDS) += $(led-y)
ifeq ($(CONFIG_PCI),y)
obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o
endif
obj-$(CONFIG_TOSA_BT) += tosa-bt.o

View File

@ -306,6 +306,10 @@ static void __init balloon3_init(void)
*/
ARB_CNTRL = ARB_CORE_PARK | 0x234;
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
if (balloon3_has(BALLOON3_FEATURE_AUDIO))
pxa_set_ac97_info(NULL);

View File

@ -453,6 +453,10 @@ static inline void cmx2xx_init_ac97(void) {}
static void __init cmx2xx_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
cmx2xx_pm_init();
if (cpu_is_pxa25x())

View File

@ -3,9 +3,10 @@
*
* Support for the CompuLab CM-X300 modules
*
* Copyright (C) 2008 CompuLab Ltd.
* Copyright (C) 2008,2009 CompuLab Ltd.
*
* Mike Rapoport <mike@compulab.co.il>
* Igor Grinberg <grinberg@compulab.co.il>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@ -16,30 +17,41 @@
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/dm9000.h>
#include <linux/leds.h>
#include <linux/rtc-v3020.h>
#include <linux/pwm_backlight.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/mfd/da903x.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
#include <linux/spi/tdo24m.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/setup.h>
#include <mach/pxa300.h>
#include <mach/pxa27x-udc.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
#include <mach/ohci.h>
#include <plat/i2c.h>
#include <mach/pxa3xx_nand.h>
#include <plat/pxa3xx_nand.h>
#include <mach/audio.h>
#include <asm/mach/map.h>
#include "generic.h"
#include "devices.h"
#define CM_X300_ETH_PHYS 0x08000010
@ -53,7 +65,7 @@
#define GPIO97_RTC_RD (97)
#define GPIO98_RTC_IO (98)
static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = {
/* LCD */
GPIO54_LCD_LDD_0,
GPIO55_LCD_LDD_1,
@ -137,7 +149,6 @@ static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
GPIO36_UART1_DTR,
/* GPIOs */
GPIO79_GPIO, /* LED */
GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */
GPIO85_GPIO, /* MMC WP */
GPIO99_GPIO, /* Ethernet IRQ */
@ -151,6 +162,50 @@ static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
/* Standard I2C */
GPIO21_I2C_SCL,
GPIO22_I2C_SDA,
/* PWM Backlight */
GPIO19_PWM2_OUT,
};
static mfp_cfg_t cm_x3xx_rev_lt130_mfp_cfg[] __initdata = {
/* GPIOs */
GPIO79_GPIO, /* LED */
GPIO77_GPIO, /* WiFi reset */
GPIO78_GPIO, /* BT reset */
};
static mfp_cfg_t cm_x3xx_rev_ge130_mfp_cfg[] __initdata = {
/* GPIOs */
GPIO76_GPIO, /* LED */
GPIO71_GPIO, /* WiFi reset */
GPIO70_GPIO, /* BT reset */
};
static mfp_cfg_t cm_x310_mfp_cfg[] __initdata = {
/* USB PORT 2 */
ULPI_STP,
ULPI_NXT,
ULPI_DIR,
GPIO30_ULPI_DATA_OUT_0,
GPIO31_ULPI_DATA_OUT_1,
GPIO32_ULPI_DATA_OUT_2,
GPIO33_ULPI_DATA_OUT_3,
GPIO34_ULPI_DATA_OUT_4,
GPIO35_ULPI_DATA_OUT_5,
GPIO36_ULPI_DATA_OUT_6,
GPIO37_ULPI_DATA_OUT_7,
GPIO38_ULPI_CLK,
/* external PHY reset pin */
GPIO127_GPIO,
/* USB PORT 3 */
GPIO77_USB_P3_1,
GPIO78_USB_P3_2,
GPIO79_USB_P3_3,
GPIO80_USB_P3_4,
GPIO81_USB_P3_5,
GPIO82_USB_P3_6,
GPIO0_2_USBH_PEN,
};
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
@ -195,17 +250,18 @@ static void __init cm_x300_init_dm9000(void)
static inline void cm_x300_init_dm9000(void) {}
#endif
/* LCD */
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pxafb_mode_info cm_x300_lcd_modes[] = {
[0] = {
.pixclock = 38000,
.pixclock = 38250,
.bpp = 16,
.xres = 480,
.yres = 640,
.hsync_len = 8,
.vsync_len = 2,
.left_margin = 8,
.upper_margin = 0,
.upper_margin = 2,
.right_margin = 24,
.lower_margin = 4,
.cmap_greyscale = 0,
@ -227,7 +283,7 @@ static struct pxafb_mode_info cm_x300_lcd_modes[] = {
static struct pxafb_mach_info cm_x300_lcd = {
.modes = cm_x300_lcd_modes,
.num_modes = 2,
.num_modes = ARRAY_SIZE(cm_x300_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
@ -239,6 +295,87 @@ static void __init cm_x300_init_lcd(void)
static inline void cm_x300_init_lcd(void) {}
#endif
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
static struct platform_pwm_backlight_data cm_x300_backlight_data = {
.pwm_id = 2,
.max_brightness = 100,
.dft_brightness = 100,
.pwm_period_ns = 10000,
};
static struct platform_device cm_x300_backlight_device = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &cm_x300_backlight_data,
},
};
static void cm_x300_init_bl(void)
{
platform_device_register(&cm_x300_backlight_device);
}
#else
static inline void cm_x300_init_bl(void) {}
#endif
#if defined(CONFIG_SPI_GPIO) || defined(CONFIG_SPI_GPIO_MODULE)
#define GPIO_LCD_BASE (144)
#define GPIO_LCD_DIN (GPIO_LCD_BASE + 8) /* aux_gpio3_0 */
#define GPIO_LCD_DOUT (GPIO_LCD_BASE + 9) /* aux_gpio3_1 */
#define GPIO_LCD_SCL (GPIO_LCD_BASE + 10) /* aux_gpio3_2 */
#define GPIO_LCD_CS (GPIO_LCD_BASE + 11) /* aux_gpio3_3 */
#define LCD_SPI_BUS_NUM (1)
static struct spi_gpio_platform_data cm_x300_spi_gpio_pdata = {
.sck = GPIO_LCD_SCL,
.mosi = GPIO_LCD_DIN,
.miso = GPIO_LCD_DOUT,
.num_chipselect = 1,
};
static struct platform_device cm_x300_spi_gpio = {
.name = "spi_gpio",
.id = LCD_SPI_BUS_NUM,
.dev = {
.platform_data = &cm_x300_spi_gpio_pdata,
},
};
static struct tdo24m_platform_data cm_x300_tdo24m_pdata = {
.model = TDO35S,
};
static struct spi_board_info cm_x300_spi_devices[] __initdata = {
{
.modalias = "tdo24m",
.max_speed_hz = 1000000,
.bus_num = LCD_SPI_BUS_NUM,
.chip_select = 0,
.controller_data = (void *) GPIO_LCD_CS,
.platform_data = &cm_x300_tdo24m_pdata,
},
};
static void __init cm_x300_init_spi(void)
{
spi_register_board_info(cm_x300_spi_devices,
ARRAY_SIZE(cm_x300_spi_devices));
platform_device_register(&cm_x300_spi_gpio);
}
#else
static inline void cm_x300_init_spi(void) {}
#endif
#if defined(CONFIG_SND_PXA2XX_LIB_AC97)
static void __init cm_x300_init_ac97(void)
{
pxa_set_ac97_info(NULL);
}
#else
static inline void cm_x300_init_ac97(void) {}
#endif
#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
static struct mtd_partition cm_x300_nand_partitions[] = {
[0] = {
@ -333,9 +470,19 @@ static inline void cm_x300_init_mmc(void) {}
#endif
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static int cm_x300_ohci_init(struct device *dev)
{
if (cpu_is_pxa300())
UP2OCR = UP2OCR_HXS
| UP2OCR_HXOE | UP2OCR_DMPDE | UP2OCR_DPPDE;
return 0;
}
static struct pxaohci_platform_data cm_x300_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW,
.init = cm_x300_ohci_init,
};
static void __init cm_x300_init_ohci(void)
@ -351,7 +498,6 @@ static struct gpio_led cm_x300_leds[] = {
[0] = {
.name = "cm-x300:green",
.default_trigger = "heartbeat",
.gpio = 79,
.active_low = 1,
},
};
@ -371,6 +517,11 @@ static struct platform_device cm_x300_led_device = {
static void __init cm_x300_init_leds(void)
{
if (system_rev < 130)
cm_x300_leds[0].gpio = 79;
else
cm_x300_leds[0].gpio = 76;
platform_device_register(&cm_x300_led_device);
}
#else
@ -433,11 +584,94 @@ static void __init cm_x300_init_rtc(void)
static inline void cm_x300_init_rtc(void) {}
#endif
static void __init cm_x300_init(void)
/* DA9030 */
struct da903x_subdev_info cm_x300_da9030_subdevs[] = {
{
.name = "da903x-backlight",
.id = DA9030_ID_WLED,
}
};
static struct da903x_platform_data cm_x300_da9030_info = {
.num_subdevs = ARRAY_SIZE(cm_x300_da9030_subdevs),
.subdevs = cm_x300_da9030_subdevs,
};
static struct i2c_board_info cm_x300_pmic_info = {
I2C_BOARD_INFO("da9030", 0x49),
.irq = IRQ_GPIO(0),
.platform_data = &cm_x300_da9030_info,
};
static struct i2c_pxa_platform_data cm_x300_pwr_i2c_info = {
.use_pio = 1,
};
static void __init cm_x300_init_da9030(void)
{
pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
i2c_register_board_info(1, &cm_x300_pmic_info, 1);
}
static void __init cm_x300_init_wi2wi(void)
{
int bt_reset, wlan_en;
int err;
if (system_rev < 130) {
wlan_en = 77;
bt_reset = 78;
} else {
wlan_en = 71;
bt_reset = 70;
}
/* Libertas and CSR reset */
err = gpio_request(wlan_en, "wlan en");
if (err) {
pr_err("CM-X300: failed to request wlan en gpio: %d\n", err);
} else {
gpio_direction_output(wlan_en, 1);
gpio_free(wlan_en);
}
err = gpio_request(bt_reset, "bt reset");
if (err) {
pr_err("CM-X300: failed to request bt reset gpio: %d\n", err);
} else {
gpio_direction_output(bt_reset, 1);
udelay(10);
gpio_set_value(bt_reset, 0);
udelay(10);
gpio_set_value(bt_reset, 1);
gpio_free(bt_reset);
}
}
/* MFP */
static void __init cm_x300_init_mfp(void)
{
/* board-processor specific GPIO initialization */
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg));
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_mfp_cfg));
if (system_rev < 130)
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_lt130_mfp_cfg));
else
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_ge130_mfp_cfg));
if (cpu_is_pxa310())
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x310_mfp_cfg));
}
static void __init cm_x300_init(void)
{
cm_x300_init_mfp();
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
cm_x300_init_da9030();
cm_x300_init_dm9000();
cm_x300_init_lcd();
cm_x300_init_ohci();
@ -445,7 +679,11 @@ static void __init cm_x300_init(void)
cm_x300_init_nand();
cm_x300_init_leds();
cm_x300_init_i2c();
cm_x300_init_spi();
cm_x300_init_rtc();
cm_x300_init_ac97();
cm_x300_init_wi2wi();
cm_x300_init_bl();
}
static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,

View File

@ -130,6 +130,9 @@ static struct platform_device *colibri_pxa270_devices[] __initdata = {
static void __init colibri_pxa270_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_add_devices(ARRAY_AND_SIZE(colibri_pxa270_devices));
}

View File

@ -170,6 +170,10 @@ static inline void colibri_pxa310_init_ac97(void) {}
void __init colibri_pxa300_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
colibri_pxa300_init_eth();
colibri_pxa300_init_ohci();
colibri_pxa3xx_init_nand();

View File

@ -199,6 +199,10 @@ static void __init colibri_pxa320_init_uart(void)
void __init colibri_pxa320_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
colibri_pxa320_init_eth();
colibri_pxa320_init_ohci();
colibri_pxa3xx_init_nand();

View File

@ -25,7 +25,7 @@
#include <mach/colibri.h>
#include <mach/mmc.h>
#include <mach/pxafb.h>
#include <mach/pxa3xx_nand.h>
#include <plat/pxa3xx_nand.h>
#include "generic.h"
#include "devices.h"

View File

@ -671,6 +671,10 @@ static void __init corgi_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
corgi_init_spi();
pxa_set_udc_info(&udc_info);

View File

@ -214,8 +214,8 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
.fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT,
.fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT,
.bat_levels = 40,
.bat_levels_noac = spitz_battery_levels_noac,
.bat_levels_acin = spitz_battery_levels_acin,
.bat_levels_noac = sharpsl_battery_levels_noac,
.bat_levels_acin = sharpsl_battery_levels_acin,
.status_high_acin = 188,
.status_low_acin = 178,
.status_high_noac = 185,

View File

@ -268,6 +268,9 @@ static void __init csb726_init(void)
/* MSC2 = 0x06697ff4; *//* none/SM501 */
MSC2 = (MSC2 & ~0xffff) | 0x7ff4; /* SM501 */
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
pxa27x_set_i2c_power_info(NULL);
pxa_set_mci_info(&csb726_mci);

View File

@ -4,17 +4,18 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/udc.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
#include <mach/irda.h>
#include <plat/i2c.h>
#include <mach/ohci.h>
#include <mach/pxa27x_keypad.h>
#include <mach/pxa2xx_spi.h>
#include <mach/camera.h>
#include <mach/audio.h>
#include <mach/pxa3xx_nand.h>
#include <plat/i2c.h>
#include <plat/pxa3xx_nand.h>
#include "devices.h"
#include "generic.h"
@ -167,13 +168,18 @@ static struct resource pxa_resource_ffuart[] = {
}
};
struct platform_device pxa_device_ffuart= {
struct platform_device pxa_device_ffuart = {
.name = "pxa2xx-uart",
.id = 0,
.resource = pxa_resource_ffuart,
.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
};
void __init pxa_set_ffuart_info(void *info)
{
pxa_register_device(&pxa_device_ffuart, info);
}
static struct resource pxa_resource_btuart[] = {
{
.start = 0x40200000,
@ -193,6 +199,11 @@ struct platform_device pxa_device_btuart = {
.num_resources = ARRAY_SIZE(pxa_resource_btuart),
};
void __init pxa_set_btuart_info(void *info)
{
pxa_register_device(&pxa_device_btuart, info);
}
static struct resource pxa_resource_stuart[] = {
{
.start = 0x40700000,
@ -212,6 +223,11 @@ struct platform_device pxa_device_stuart = {
.num_resources = ARRAY_SIZE(pxa_resource_stuart),
};
void __init pxa_set_stuart_info(void *info)
{
pxa_register_device(&pxa_device_stuart, info);
}
static struct resource pxa_resource_hwuart[] = {
{
.start = 0x41600000,
@ -231,6 +247,14 @@ struct platform_device pxa_device_hwuart = {
.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
};
void __init pxa_set_hwuart_info(void *info)
{
if (cpu_is_pxa255())
pxa_register_device(&pxa_device_hwuart, info);
else
pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
}
static struct resource pxai2c_resources[] = {
{
.start = 0x40301680,

View File

@ -55,6 +55,9 @@ static struct platform_device *devices[] __initdata = {
static void __init e330_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
eseries_get_tmio_gpios();
platform_add_devices(devices, ARRAY_SIZE(devices));

View File

@ -56,6 +56,9 @@ static struct platform_device *devices[] __initdata = {
static void __init e350_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
eseries_get_tmio_gpios();
platform_add_devices(devices, ARRAY_SIZE(devices));

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@ -130,6 +130,9 @@ static struct platform_device *devices[] __initdata = {
static void __init e400_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/* Fixme - e400 may have a switched clock */
eseries_register_clks();
eseries_get_tmio_gpios();

View File

@ -192,6 +192,9 @@ static struct platform_device *devices[] __initdata = {
static void __init e740_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name,
"UDCCLK", &pxa25x_device_udc.dev),

View File

@ -194,6 +194,9 @@ static struct platform_device *devices[] __initdata = {
static void __init e750_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name,
"GPIO11_CLK", NULL),
eseries_get_tmio_gpios();

View File

@ -195,6 +195,9 @@ static struct platform_device *devices[] __initdata = {
static void __init e800_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name,
"GPIO11_CLK", NULL),
eseries_get_tmio_gpios();

View File

@ -967,7 +967,7 @@ static inline void em_x270_init_gpio_keys(void) {}
#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
static struct regulator *em_x270_camera_ldo;
static int em_x270_sensor_init(struct device *dev)
static int em_x270_sensor_init(void)
{
int ret;
@ -996,7 +996,6 @@ static int em_x270_sensor_init(struct device *dev)
}
struct pxacamera_platform_data em_x270_camera_platform_data = {
.init = em_x270_sensor_init,
.flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
.mclk_10khz = 2600,
@ -1049,8 +1048,10 @@ static struct platform_device em_x270_camera = {
static void __init em_x270_init_camera(void)
{
pxa_set_camera_info(&em_x270_camera_platform_data);
platform_device_register(&em_x270_camera);
if (em_x270_sensor_init() == 0) {
pxa_set_camera_info(&em_x270_camera_platform_data);
platform_device_register(&em_x270_camera);
}
}
#else
static inline void em_x270_init_camera(void) {}
@ -1286,6 +1287,10 @@ static void __init em_x270_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(common_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
#ifdef CONFIG_PM
pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP);
#endif

View File

@ -17,7 +17,11 @@
#include <linux/delay.h>
#include <linux/pwm_backlight.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/leds-lp3944.h>
#include <media/soc_camera.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@ -29,6 +33,7 @@
#include <plat/i2c.h>
#include <mach/hardware.h>
#include <mach/pxa27x_keypad.h>
#include <mach/camera.h>
#include "devices.h"
#include "generic.h"
@ -38,6 +43,9 @@
#define GPIO15_A910_FLIP_LID 15
#define GPIO12_E680_LOCK_SWITCH 12
#define GPIO15_E6_LOCK_SWITCH 15
#define GPIO50_nCAM_EN 50
#define GPIO19_GEN1_CAM_RST 19
#define GPIO28_GEN2_CAM_RST 28
static struct platform_pwm_backlight_data ezx_backlight_data = {
.pwm_id = 0,
@ -191,8 +199,8 @@ static unsigned long gen1_pin_config[] __initdata = {
GPIO94_CIF_DD_5,
GPIO17_CIF_DD_6,
GPIO108_CIF_DD_7,
GPIO50_GPIO, /* CAM_EN */
GPIO19_GPIO, /* CAM_RST */
GPIO50_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_EN */
GPIO19_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_RST */
/* EMU */
GPIO120_GPIO, /* EMU_MUX1 */
@ -248,8 +256,8 @@ static unsigned long gen2_pin_config[] __initdata = {
GPIO48_CIF_DD_5,
GPIO93_CIF_DD_6,
GPIO12_CIF_DD_7,
GPIO50_GPIO, /* CAM_EN */
GPIO28_GPIO, /* CAM_RST */
GPIO50_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_EN */
GPIO28_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_RST */
GPIO17_GPIO, /* CAM_FLASH */
};
#endif
@ -683,6 +691,81 @@ static struct platform_device a780_gpio_keys = {
},
};
/* camera */
static int a780_camera_init(void)
{
int err;
/*
* GPIO50_nCAM_EN is active low
* GPIO19_GEN1_CAM_RST is active on rising edge
*/
err = gpio_request(GPIO50_nCAM_EN, "nCAM_EN");
if (err) {
pr_err("%s: Failed to request nCAM_EN\n", __func__);
goto fail;
}
err = gpio_request(GPIO19_GEN1_CAM_RST, "CAM_RST");
if (err) {
pr_err("%s: Failed to request CAM_RST\n", __func__);
goto fail_gpio_cam_rst;
}
gpio_direction_output(GPIO50_nCAM_EN, 1);
gpio_direction_output(GPIO19_GEN1_CAM_RST, 0);
return 0;
fail_gpio_cam_rst:
gpio_free(GPIO50_nCAM_EN);
fail:
return err;
}
static int a780_camera_power(struct device *dev, int on)
{
gpio_set_value(GPIO50_nCAM_EN, !on);
return 0;
}
static int a780_camera_reset(struct device *dev)
{
gpio_set_value(GPIO19_GEN1_CAM_RST, 0);
msleep(10);
gpio_set_value(GPIO19_GEN1_CAM_RST, 1);
return 0;
}
struct pxacamera_platform_data a780_pxacamera_platform_data = {
.flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
.mclk_10khz = 5000,
};
static struct i2c_board_info a780_camera_i2c_board_info = {
I2C_BOARD_INFO("mt9m111", 0x5d),
};
static struct soc_camera_link a780_iclink = {
.bus_id = 0,
.flags = SOCAM_SENSOR_INVERT_PCLK,
.i2c_adapter_id = 0,
.board_info = &a780_camera_i2c_board_info,
.module_name = "mt9m111",
.power = a780_camera_power,
.reset = a780_camera_reset,
};
static struct platform_device a780_camera = {
.name = "soc-camera-pdrv",
.id = 0,
.dev = {
.platform_data = &a780_iclink,
},
};
static struct platform_device *a780_devices[] __initdata = {
&a780_gpio_keys,
};
@ -693,12 +776,21 @@ static void __init a780_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config));
pxa2xx_mfp_config(ARRAY_AND_SIZE(a780_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
set_pxa_fb_info(&ezx_fb_info_1);
pxa_set_keypad_info(&a780_keypad_platform_data);
if (a780_camera_init() == 0) {
pxa_set_camera_info(&a780_pxacamera_platform_data);
platform_device_register(&a780_camera);
}
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
platform_add_devices(ARRAY_AND_SIZE(a780_devices));
}
@ -754,6 +846,10 @@ static void __init e680_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config));
pxa2xx_mfp_config(ARRAY_AND_SIZE(e680_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info));
@ -816,6 +912,10 @@ static void __init a1200_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config));
pxa2xx_mfp_config(ARRAY_AND_SIZE(a1200_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info));
@ -864,6 +964,131 @@ static struct platform_device a910_gpio_keys = {
},
};
/* camera */
static int a910_camera_init(void)
{
int err;
/*
* GPIO50_nCAM_EN is active low
* GPIO28_GEN2_CAM_RST is active on rising edge
*/
err = gpio_request(GPIO50_nCAM_EN, "nCAM_EN");
if (err) {
pr_err("%s: Failed to request nCAM_EN\n", __func__);
goto fail;
}
err = gpio_request(GPIO28_GEN2_CAM_RST, "CAM_RST");
if (err) {
pr_err("%s: Failed to request CAM_RST\n", __func__);
goto fail_gpio_cam_rst;
}
gpio_direction_output(GPIO50_nCAM_EN, 1);
gpio_direction_output(GPIO28_GEN2_CAM_RST, 0);
return 0;
fail_gpio_cam_rst:
gpio_free(GPIO50_nCAM_EN);
fail:
return err;
}
static int a910_camera_power(struct device *dev, int on)
{
gpio_set_value(GPIO50_nCAM_EN, !on);
return 0;
}
static int a910_camera_reset(struct device *dev)
{
gpio_set_value(GPIO28_GEN2_CAM_RST, 0);
msleep(10);
gpio_set_value(GPIO28_GEN2_CAM_RST, 1);
return 0;
}
struct pxacamera_platform_data a910_pxacamera_platform_data = {
.flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
.mclk_10khz = 5000,
};
static struct i2c_board_info a910_camera_i2c_board_info = {
I2C_BOARD_INFO("mt9m111", 0x5d),
};
static struct soc_camera_link a910_iclink = {
.bus_id = 0,
.i2c_adapter_id = 0,
.board_info = &a910_camera_i2c_board_info,
.module_name = "mt9m111",
.power = a910_camera_power,
.reset = a910_camera_reset,
};
static struct platform_device a910_camera = {
.name = "soc-camera-pdrv",
.id = 0,
.dev = {
.platform_data = &a910_iclink,
},
};
/* leds-lp3944 */
static struct lp3944_platform_data a910_lp3944_leds = {
.leds_size = LP3944_LEDS_MAX,
.leds = {
[0] = {
.name = "a910:red:",
.status = LP3944_LED_STATUS_OFF,
.type = LP3944_LED_TYPE_LED,
},
[1] = {
.name = "a910:green:",
.status = LP3944_LED_STATUS_OFF,
.type = LP3944_LED_TYPE_LED,
},
[2] {
.name = "a910:blue:",
.status = LP3944_LED_STATUS_OFF,
.type = LP3944_LED_TYPE_LED,
},
/* Leds 3 and 4 are used as display power switches */
[3] = {
.name = "a910::cli_display",
.status = LP3944_LED_STATUS_OFF,
.type = LP3944_LED_TYPE_LED_INVERTED
},
[4] = {
.name = "a910::main_display",
.status = LP3944_LED_STATUS_ON,
.type = LP3944_LED_TYPE_LED_INVERTED
},
[5] = { .type = LP3944_LED_TYPE_NONE },
[6] = {
.name = "a910::torch",
.status = LP3944_LED_STATUS_OFF,
.type = LP3944_LED_TYPE_LED,
},
[7] = {
.name = "a910::flash",
.status = LP3944_LED_STATUS_OFF,
.type = LP3944_LED_TYPE_LED_INVERTED,
},
},
};
static struct i2c_board_info __initdata a910_i2c_board_info[] = {
{
I2C_BOARD_INFO("lp3944", 0x60),
.platform_data = &a910_lp3944_leds,
},
};
static struct platform_device *a910_devices[] __initdata = {
&a910_gpio_keys,
};
@ -874,12 +1099,22 @@ static void __init a910_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config));
pxa2xx_mfp_config(ARRAY_AND_SIZE(a910_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info));
set_pxa_fb_info(&ezx_fb_info_2);
pxa_set_keypad_info(&a910_keypad_platform_data);
if (a910_camera_init() == 0) {
pxa_set_camera_info(&a910_pxacamera_platform_data);
platform_device_register(&a910_camera);
}
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
platform_add_devices(ARRAY_AND_SIZE(a910_devices));
}
@ -935,6 +1170,10 @@ static void __init e6_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config));
pxa2xx_mfp_config(ARRAY_AND_SIZE(e6_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info));
@ -971,6 +1210,10 @@ static void __init e2_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config));
pxa2xx_mfp_config(ARRAY_AND_SIZE(e2_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info));

View File

@ -67,3 +67,8 @@ extern struct sysdev_class pxa_irq_sysclass;
extern struct sysdev_class pxa_gpio_sysclass;
extern struct sysdev_class pxa2xx_mfp_sysclass;
extern struct sysdev_class pxa3xx_mfp_sysclass;
void __init pxa_set_ffuart_info(void *info);
void __init pxa_set_btuart_info(void *info);
void __init pxa_set_stuart_info(void *info);
void __init pxa_set_hwuart_info(void *info);

View File

@ -211,6 +211,11 @@ static void __init gumstix_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_hwuart_info(NULL);
gumstix_bluetooth_init();
gumstix_udc_init();
gumstix_mmc_init();

View File

@ -193,6 +193,9 @@ static void __init h5000_init(void)
fix_msc();
pxa2xx_mfp_config(ARRAY_AND_SIZE(h5000_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_udc_info(&h5000_udc_mach_info);
platform_add_devices(ARRAY_AND_SIZE(devices));
}

View File

@ -150,6 +150,9 @@ static void __init himalaya_lcd_init(void)
static void __init himalaya_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
himalaya_lcd_init();
platform_add_devices(devices, ARRAY_SIZE(devices));
}

View File

@ -820,6 +820,7 @@ static struct platform_device *devices[] __initdata = {
&gpio_keys,
&backlight,
&w3220,
&hx4700_lcd,
&egpio,
&bq24022,
&gpio_vbus,
@ -849,6 +850,10 @@ static void __init hx4700_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
hx4700_gpio_request(ARRAY_AND_SIZE(global_gpios));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_ficp_info(&ficp_info);

View File

@ -179,6 +179,9 @@ static void __init idp_init(void)
printk("idp_init()\n");
pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_device_register(&smc91x_device);
//platform_device_register(&mst_audio_device);

View File

@ -554,8 +554,12 @@ static struct i2c_pxa_platform_data i2c_pdata = {
static void __init imote2_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/* SPI chip select directions - all other directions should
* be handled by drivers.*/
gpio_direction_output(37, 0);

View File

@ -105,6 +105,7 @@
*
* PXA935 A0 0x56056931 0x1E653013
* PXA935 B0 0x56056936 0x6E653013
* PXA935 B1 0x56056938 0x8E653013
*/
#ifdef CONFIG_PXA25x
#define __cpu_is_pxa210(id) \
@ -283,7 +284,7 @@
_id == 0x3; \
})
#define __cpu_is_pxa9xx(id) \
#define __cpu_is_pxa93x(id) \
({ \
unsigned int _id = (id) >> 4 & 0xfff; \
_id == 0x683 || _id == 0x693; \
@ -299,9 +300,9 @@
__cpu_is_pxa3xx(read_cpuid_id()); \
})
#define cpu_is_pxa9xx() \
#define cpu_is_pxa93x() \
({ \
__cpu_is_pxa9xx(read_cpuid_id()); \
__cpu_is_pxa93x(read_cpuid_id()); \
})
/*
* return current memory and LCD clock frequency in units of 10kHz

View File

@ -0,0 +1,67 @@
/*
* GPIOs and interrupts for Palm Treo smartphones
*
* currently supported:
* Palm Treo 680 (GSM)
* Palm Centro 685 (GSM)
*
* Author: Tomas Cech <sleep_walker@suse.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* find more info at www.hackndev.com
*
*/
#ifndef _INCLUDE_TREO_H_
#define _INCLUDE_TREO_H_
/* GPIOs */
#define GPIO_NR_TREO_POWER_DETECT 0
#define GPIO_NR_TREO_AMP_EN 27
#define GPIO_NR_TREO_GREEN_LED 20
#define GPIO_NR_TREO_RED_LED 79
#define GPIO_NR_TREO_SD_DETECT_N 113
#define GPIO_NR_TREO_EP_DETECT_N 116
#define GPIO_NR_TREO_USB_DETECT 1
#define GPIO_NR_TREO_USB_PULLUP 114
#define GPIO_NR_TREO_GSM_POWER 40
#define GPIO_NR_TREO_GSM_RESET 87
#define GPIO_NR_TREO_GSM_WAKE 57
#define GPIO_NR_TREO_GSM_HOST_WAKE 14
#define GPIO_NR_TREO_GSM_TRIGGER 10
#define GPIO_NR_TREO_IR_EN 115
#define GPIO_NR_TREO_IR_TXD 47
#define GPIO_NR_TREO_BL_POWER 38
#define GPIO_NR_TREO_LCD_POWER 25
/* Treo680 specific GPIOs */
#ifdef CONFIG_MACH_TREO680
#define GPIO_NR_TREO680_SD_READONLY 33
#define GPIO_NR_TREO680_SD_POWER 42
#define GPIO_NR_TREO680_VIBRATE_EN 44
#define GPIO_NR_TREO680_KEYB_BL 24
#define GPIO_NR_TREO680_BT_EN 43
#endif /* CONFIG_MACH_TREO680 */
/* Centro685 specific GPIOs */
#define GPIO_NR_CENTRO_SD_POWER 21
#define GPIO_NR_CENTRO_VIBRATE_EN 22
#define GPIO_NR_CENTRO_KEYB_BL 33
#define GPIO_NR_CENTRO_BT_EN 80
/* Various addresses */
#define TREO_PHYS_RAM_START 0xa0000000
#define TREO_PHYS_IO_START 0x40000000
#define TREO_STR_BASE 0xa2000000
/* BACKLIGHT */
#define TREO_MAX_INTENSITY 254
#define TREO_DEFAULT_INTENSITY 160
#define TREO_LIMIT_MASK 0x7F
#define TREO_PRESCALER 63
#define TREO_PERIOD_NS 3500
#endif

View File

@ -76,7 +76,8 @@ struct pxafb_mode_info {
u_char bpp;
u_int cmap_greyscale:1,
depth:8,
unused:23;
transparency:1,
unused:22;
/* Parallel Mode Timing */
u_char hsync_len;

View File

@ -0,0 +1,199 @@
#ifndef __ASM_ARCH_PXA3xx_U2D_H
#define __ASM_ARCH_PXA3xx_U2D_H
#include <mach/bitfield.h>
/*
* USB2 device controller registers and bits definitions
*/
#define U2DCR (0x0000) /* U2D Control Register */
#define U2DCR_NDC (1 << 31) /* NAK During Config */
#define U2DCR_HSTC (0x7 << 28) /* High Speed Timeout Calibration */
#define U2DCR_SPEOREN (1 << 27) /* Short Packet EOR INTR generation Enable */
#define U2DCR_FSTC (0x7 << 24) /* Full Speed Timeout Calibration */
#define U2DCR_UCLKOVR (1 << 22) /* UTM Clock Override */
#define U2DCR_ABP (1 << 21) /* Application Bus Power */
#define U2DCR_ADD (1 << 20) /* Application Device Disconnect */
#define U2DCR_CC (1 << 19) /* Configuration Change */
#define U2DCR_HS (1 << 18) /* High Speed USB Detection */
#define U2DCR_SMAC (1 << 17) /* Switch Endpoint Memory to Active Configuration */
#define U2DCR_DWRE (1 << 16) /* Device Remote Wake-up Feature */
#define U2DCR_ACN (0xf << 12) /* Active U2D Configuration Number */
#define U2DCR_AIN (0xf << 8) /* Active U2D Interface Number */
#define U2DCR_AAISN (0xf << 4) /* Active U2D Alternate Interface Setting Number */
#define U2DCR_EMCE (1 << 3) /* Endpoint Memory Configuration Error */
#define U2DCR_UDR (1 << 2) /* U2D Resume */
#define U2DCR_UDA (1 << 1) /* U2D Active */
#define U2DCR_UDE (1 << 0) /* U2D Enable */
#define U2DICR (0x0004) /* U2D Interrupt Control Register */
#define U2DISR (0x000C) /* U2D Interrupt Status Register */
#define U2DINT_CC (1 << 31) /* Interrupt - Configuration Change */
#define U2DINT_SOF (1 << 30) /* Interrupt - SOF */
#define U2DINT_USOF (1 << 29) /* Interrupt - micro SOF */
#define U2DINT_RU (1 << 28) /* Interrupt - Resume */
#define U2DINT_SU (1 << 27) /* Interrupt - Suspend */
#define U2DINT_RS (1 << 26) /* Interrupt - Reset */
#define U2DINT_DPE (1 << 25) /* Interrupt - Data Packet Error */
#define U2DINT_FIFOERR (0x4) /* Interrupt - endpoint FIFO error */
#define U2DINT_PACKETCMP (0x2) /* Interrupt - endpoint packet complete */
#define U2DINT_SPACKETCMP (0x1) /* Interrupt - endpoint short packet complete */
#define U2DFNR (0x0014) /* U2D Frame Number Register */
#define U2DINT(n, intr) (((intr) & 0x07) << (((n) & 0x07) * 3))
#define U2DICR2 (0x0008) /* U2D Interrupt Control Register 2 */
#define U2DISR2 (0x0010) /* U2D Interrupt Status Register 2 */
#define U2DOTGCR (0x0020) /* U2D OTG Control Register */
#define U2DOTGCR_OTGEN (1 << 31) /* On-The-Go Enable */
#define U2DOTGCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation Protocal Port Support */
#define U2DOTGCR_AHNP (1 << 29) /* A-device Host Negotiation Protocal Support */
#define U2DOTGCR_BHNP (1 << 28) /* B-device Host Negotiation Protocal Enable */
#ifdef CONFIG_CPU_PXA930
#define U2DOTGCR_LPA (1 << 15) /* ULPI low power mode active */
#define U2DOTGCR_IESI (1 << 13) /* OTG interrupt Enable */
#define U2DOTGCR_ISSI (1 << 12) /* OTG interrupt status */
#endif
#define U2DOTGCR_CKAF (1 << 5) /* Carkit Mode Alternate Function Select */
#define U2DOTGCR_UTMID (1 << 4) /* UTMI Interface Disable */
#define U2DOTGCR_ULAF (1 << 3) /* ULPI Mode Alternate Function Select */
#define U2DOTGCR_SMAF (1 << 2) /* Serial Mode Alternate Function Select */
#define U2DOTGCR_RTSM (1 << 1) /* Return to Synchronous Mode (ULPI Mode) */
#define U2DOTGCR_ULE (1 << 0) /* ULPI Wrapper Enable */
#define U2DOTGICR (0x0024) /* U2D OTG Interrupt Control Register */
#define U2DOTGISR (0x0028) /* U2D OTG Interrupt Status Register */
#define U2DOTGINT_SF (1 << 17) /* OTG Set Feature Command Received */
#define U2DOTGINT_SI (1 << 16) /* OTG Interrupt */
#define U2DOTGINT_RLS1 (1 << 14) /* RXCMD Linestate[1] Change Interrupt Rise */
#define U2DOTGINT_RLS0 (1 << 13) /* RXCMD Linestate[0] Change Interrupt Rise */
#define U2DOTGINT_RID (1 << 12) /* RXCMD OTG ID Change Interrupt Rise */
#define U2DOTGINT_RSE (1 << 11) /* RXCMD OTG Session End Interrupt Rise */
#define U2DOTGINT_RSV (1 << 10) /* RXCMD OTG Session Valid Interrupt Rise */
#define U2DOTGINT_RVV (1 << 9) /* RXCMD OTG Vbus Valid Interrupt Rise */
#define U2DOTGINT_RCK (1 << 8) /* RXCMD Carkit Interrupt Rise */
#define U2DOTGINT_FLS1 (1 << 6) /* RXCMD Linestate[1] Change Interrupt Fall */
#define U2DOTGINT_FLS0 (1 << 5) /* RXCMD Linestate[0] Change Interrupt Fall */
#define U2DOTGINT_FID (1 << 4) /* RXCMD OTG ID Change Interrupt Fall */
#define U2DOTGINT_FSE (1 << 3) /* RXCMD OTG Session End Interrupt Fall */
#define U2DOTGINT_FSV (1 << 2) /* RXCMD OTG Session Valid Interrupt Fall */
#define U2DOTGINT_FVV (1 << 1) /* RXCMD OTG Vbus Valid Interrupt Fall */
#define U2DOTGINT_FCK (1 << 0) /* RXCMD Carkit Interrupt Fall */
#define U2DOTGUSR (0x002C) /* U2D OTG ULPI Status Register */
#define U2DOTGUSR_LPA (1 << 31) /* ULPI Low Power Mode Active */
#define U2DOTGUSR_S6A (1 << 30) /* ULPI Serial Mode (6-pin) Active */
#define U2DOTGUSR_S3A (1 << 29) /* ULPI Serial Mode (3-pin) Active */
#define U2DOTGUSR_CKA (1 << 28) /* ULPI Car Kit Mode Active */
#define U2DOTGUSR_LS1 (1 << 6) /* RXCMD Linestate 1 Status */
#define U2DOTGUSR_LS0 (1 << 5) /* RXCMD Linestate 0 Status */
#define U2DOTGUSR_ID (1 << 4) /* OTG IDGnd Status */
#define U2DOTGUSR_SE (1 << 3) /* OTG Session End Status */
#define U2DOTGUSR_SV (1 << 2) /* OTG Session Valid Status */
#define U2DOTGUSR_VV (1 << 1) /* OTG Vbus Valid Status */
#define U2DOTGUSR_CK (1 << 0) /* Carkit Interrupt Status */
#define U2DOTGUCR (0x0030) /* U2D OTG ULPI Control Register */
#define U2DOTGUCR_RUN (1 << 25) /* RUN */
#define U2DOTGUCR_RNW (1 << 24) /* Read or Write operation */
#define U2DOTGUCR_ADDR (0x3f << 16) /* Address of the ULPI PHY register */
#define U2DOTGUCR_WDATA (0xff << 8) /* The data for a WRITE command */
#define U2DOTGUCR_RDATA (0xff << 0) /* The data for a READ command */
#define U2DP3CR (0x0034) /* U2D Port 3 Control Register */
#define U2DP3CR_P2SS (0x3 << 8) /* Host Port 2 Serial Mode Select */
#define U2DP3CR_P3SS (0x7 << 4) /* Host Port 3 Serial Mode Select */
#define U2DP3CR_VPVMBEN (0x1 << 2) /* Host Port 3 Vp/Vm Block Enable */
#define U2DP3CR_CFG (0x3 << 0) /* Host Port 3 Configuration */
#define U2DCSR0 (0x0100) /* U2D Control/Status Register - Endpoint 0 */
#define U2DCSR0_IPA (1 << 8) /* IN Packet Adjusted */
#define U2DCSR0_SA (1 << 7) /* SETUP Active */
#define U2DCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */
#define U2DCSR0_FST (1 << 5) /* Force Stall */
#define U2DCSR0_SST (1 << 4) /* Send Stall */
#define U2DCSR0_DME (1 << 3) /* DMA Enable */
#define U2DCSR0_FTF (1 << 2) /* Flush Transmit FIFO */
#define U2DCSR0_IPR (1 << 1) /* IN Packet Ready */
#define U2DCSR0_OPC (1 << 0) /* OUT Packet Complete */
#define U2DCSR(x) (0x0100 + ((x) << 2)) /* U2D Control/Status Register - Endpoint x */
#define U2DCSR_BF (1 << 10) /* Buffer Full, for OUT eps */
#define U2DCSR_BE (1 << 10) /* Buffer Empty, for IN eps */
#define U2DCSR_DPE (1 << 9) /* Data Packet Error, for ISO eps only */
#define U2DCSR_FEF (1 << 8) /* Flush Endpoint FIFO */
#define U2DCSR_SP (1 << 7) /* Short Packet Control/Status, for OUT eps only, readonly */
#define U2DCSR_BNE (1 << 6) /* Buffer Not Empty, for OUT eps */
#define U2DCSR_BNF (1 << 6) /* Buffer Not Full, for IN eps */
#define U2DCSR_FST (1 << 5) /* Force STALL, write 1 set */
#define U2DCSR_SST (1 << 4) /* Sent STALL, write 1 clear */
#define U2DCSR_DME (1 << 3) /* DMA Enable */
#define U2DCSR_TRN (1 << 2) /* Tx/Rx NAK, write 1 clear */
#define U2DCSR_PC (1 << 1) /* Packet Complete, write 1 clear */
#define U2DCSR_FS (1 << 0) /* FIFO needs Service */
#define U2DBCR0 (0x0200) /* U2D Byte Count Register - Endpoint 0 */
#define U2DBCR(x) (0x0200 + ((x) << 2)) /* U2D Byte Count Register - Endpoint x */
#define U2DDR0 (0x0300) /* U2D Data Register - Endpoint 0 */
#define U2DEPCR(x) (0x0400 + ((x) << 2)) /* U2D Configuration Register - Endpoint x */
#define U2DEPCR_EE (1 << 0) /* Endpoint Enable */
#define U2DEPCR_BS_MASK (0x3FE) /* Buffer Size, BS*8=FIFO size, max 8184B = 8KB */
#define U2DSCA (0x0500) /* U2D Setup Command Address */
#define U2DSCA_VALUE (0x0120)
#define U2DEN0 (0x0504) /* U2D Endpoint Information Register - Endpoint 0 */
#define U2DEN(x) (0x0504 + ((x) << 2)) /* U2D Endpoint Information Register - Endpoint x */
/* U2DMA registers */
#define U2DMACSR0 (0x1000) /* U2DMA Control/Status Register - Channel 0 */
#define U2DMACSR(x) (0x1000 + ((x) << 2)) /* U2DMA Control/Status Register - Channel x */
#define U2DMACSR_RUN (1 << 31) /* Run Bit (read / write) */
#define U2DMACSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */
#define U2DMACSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */
#define U2DMACSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */
#define U2DMACSR_EORSTOPEN (1 << 26) /* STOP on an EOR */
#define U2DMACSR_RASIRQEN (1 << 23) /* Request After Cnannel Stopped Interrupt Enable */
#define U2DMACSR_MASKRUN (1 << 22) /* Mask Run */
#define U2DMACSR_SCEMC (3 << 18) /* System Bus Split Completion Error Message Class */
#define U2DMACSR_SCEMI (0x1f << 13) /* System Bus Split Completion Error Message Index */
#define U2DMACSR_BUSERRTYPE (7 << 10) /* PX Bus Error Type */
#define U2DMACSR_EORINTR (1 << 9) /* End Of Receive */
#define U2DMACSR_REQPEND (1 << 8) /* Request Pending */
#define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */
#define U2DMACSR_ENDINTR (1 << 2) /* End Interrupt (read / write 1 clear) */
#define U2DMACSR_STARTINTR (1 << 1) /* Start Interrupt (read / write 1 clear) */
#define U2DMACSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write 1 clear) */
#define U2DMACR (0x1080) /* U2DMA Control Register */
#define U2DMAINT (0x10F0) /* U2DMA Interrupt Register */
#define U2DMABR0 (0x1100) /* U2DMA Branch Register - Channel 0 */
#define U2DMABR(x) (0x1100 + (x) << 2) /* U2DMA Branch Register - Channel x */
#define U2DMADADR0 (0x1200) /* U2DMA Descriptor Address Register - Channel 0 */
#define U2DMADADR(x) (0x1200 + (x) * 0x10) /* U2DMA Descriptor Address Register - Channel x */
#define U2DMADADR_STOP (1U << 0)
#define U2DMASADR0 (0x1204) /* U2DMA Source Address Register - Channel 0 */
#define U2DMASADR(x) (0x1204 + (x) * 0x10) /* U2DMA Source Address Register - Channel x */
#define U2DMATADR0 (0x1208) /* U2DMA Target Address Register - Channel 0 */
#define U2DMATADR(x) (0x1208 + (x) * 0x10) /* U2DMA Target Address Register - Channel x */
#define U2DMACMDR0 (0x120C) /* U2DMA Command Address Register - Channel 0 */
#define U2DMACMDR(x) (0x120C + (x) * 0x10) /* U2DMA Command Address Register - Channel x */
#define U2DMACMDR_XFRDIS (1 << 31) /* Transfer Direction */
#define U2DMACMDR_STARTIRQEN (1 << 22) /* Start Interrupt Enable */
#define U2DMACMDR_ENDIRQEN (1 << 21) /* End Interrupt Enable */
#define U2DMACMDR_PACKCOMP (1 << 13) /* Packet Complete */
#define U2DMACMDR_LEN (0x07ff) /* length mask (max = 2K - 1) */
#endif /* __ASM_ARCH_PXA3xx_U2D_H */

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@ -1,49 +0,0 @@
/*
* GPIOs and interrupts for Palm Treo 680 smartphone
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef _INCLUDE_TREO680_H_
#define _INCLUDE_TREO680_H_
/* GPIOs */
#define GPIO_NR_TREO680_POWER_DETECT 0
#define GPIO_NR_TREO680_AMP_EN 27
#define GPIO_NR_TREO680_KEYB_BL 24
#define GPIO_NR_TREO680_VIBRATE_EN 44
#define GPIO_NR_TREO680_GREEN_LED 20
#define GPIO_NR_TREO680_RED_LED 79
#define GPIO_NR_TREO680_SD_DETECT_N 113
#define GPIO_NR_TREO680_SD_READONLY 33
#define GPIO_NR_TREO680_EP_DETECT_N 116
#define GPIO_NR_TREO680_SD_POWER 42
#define GPIO_NR_TREO680_USB_DETECT 1
#define GPIO_NR_TREO680_USB_PULLUP 114
#define GPIO_NR_TREO680_GSM_POWER 40
#define GPIO_NR_TREO680_GSM_RESET 87
#define GPIO_NR_TREO680_GSM_WAKE 57
#define GPIO_NR_TREO680_GSM_HOST_WAKE 14
#define GPIO_NR_TREO680_GSM_TRIGGER 10
#define GPIO_NR_TREO680_BT_EN 43
#define GPIO_NR_TREO680_IR_EN 115
#define GPIO_NR_TREO680_IR_TXD 47
#define GPIO_NR_TREO680_BL_POWER 38
#define GPIO_NR_TREO680_LCD_POWER 25
/* Various addresses */
#define TREO680_PHYS_RAM_START 0xa0000000
#define TREO680_PHYS_IO_START 0x40000000
#define TREO680_STR_BASE 0xa2000000
/* BACKLIGHT */
#define TREO680_MAX_INTENSITY 254
#define TREO680_DEFAULT_INTENSITY 160
#define TREO680_LIMIT_MASK 0x7F
#define TREO680_PRESCALER 63
#define TREO680_PERIOD_NS 3500
#endif

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@ -44,10 +44,10 @@
#include <mach/ssp.h>
#include <mach/mmc.h>
#include <mach/pxa2xx_spi.h>
#include <plat/i2c.h>
#include <mach/pxa27x_keypad.h>
#include <mach/pxa3xx_nand.h>
#include <mach/littleton.h>
#include <plat/i2c.h>
#include <plat/pxa3xx_nand.h>
#include "generic.h"
@ -413,6 +413,10 @@ static void __init littleton_init(void)
/* initialize MFP configurations */
pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/*
* Note: we depend bootloader set the correct
* value to MSC register for SMC91x.

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@ -455,6 +455,10 @@ static void __init lpd270_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
lpd270_flash_data[1].width = 4;

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@ -518,6 +518,10 @@ static void __init lubbock_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(lubbock_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL);
pxa_set_udc_info(&udc_info);
set_pxa_fb_info(&sharp_lm8v31);

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@ -742,6 +742,10 @@ static void __init magician_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_add_devices(ARRAY_AND_SIZE(devices));
err = gpio_request(GPIO83_MAGICIAN_nIR_EN, "nIR_EN");

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@ -576,6 +576,10 @@ static void __init mainstone_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
mst_flash_data[1].width = 4;

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@ -798,6 +798,9 @@ static void __init mioa701_machine_init(void)
UP2OCR = UP2OCR_HXOE;
pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
bootstrap_init();
set_pxa_fb_info(&mioa701_pxafb_info);

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@ -84,6 +84,9 @@ static struct platform_device *devices[] __initdata = {
static void __init mp900c_init(void)
{
printk(KERN_INFO "MobilePro 900/C machine init\n");
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_add_devices(devices, ARRAY_SIZE(devices));
}

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@ -530,6 +530,10 @@ static void __init palmld_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
palmld_pm_init();
set_pxa_fb_info(&palmld_lcd_screen);
pxa_set_mci_info(&palmld_mci_platform_data);

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@ -419,6 +419,10 @@ static void __init palmt5_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
palmt5_pm_init();
set_pxa_fb_info(&palmt5_lcd_screen);
pxa_set_mci_info(&palmt5_mci_platform_data);

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@ -416,6 +416,11 @@ static void __init palmtc_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_hwuart_info(NULL);
set_pxa_fb_info(&palmtc_lcd_screen);
pxa_set_mci_info(&palmtc_mci_platform_data);
pxa_set_udc_info(&palmtc_udc_info);

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@ -373,6 +373,10 @@ static void __init palmte2_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmte2_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
set_pxa_fb_info(&palmte2_lcd_screen);
pxa_set_mci_info(&palmte2_mci_platform_data);
palmte2_udc_init();

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@ -1,5 +1,9 @@
/*
* Hardware definitions for Palm Treo 680
* Hardware definitions for Palm Treo smartphones
*
* currently supported:
* Palm Treo 680 (GSM)
* Palm Centro 685 (GSM)
*
* Author: Tomas Cech <sleep_walker@suse.cz>
*
@ -31,7 +35,7 @@
#include <mach/pxa27x.h>
#include <mach/pxa27x-udc.h>
#include <mach/audio.h>
#include <mach/treo680.h>
#include <mach/palmtreo.h>
#include <mach/mmc.h>
#include <mach/pxafb.h>
#include <mach/irda.h>
@ -50,7 +54,7 @@
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long treo680_pin_config[] __initdata = {
static unsigned long treo_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
@ -58,7 +62,6 @@ static unsigned long treo680_pin_config[] __initdata = {
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO33_GPIO, /* SD read only */
GPIO113_GPIO, /* SD detect */
/* AC97 */
@ -80,12 +83,10 @@ static unsigned long treo680_pin_config[] __initdata = {
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, /* usb detect */
/* MATRIX KEYPAD */
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO101_KP_MKIN_1,
GPIO102_KP_MKIN_2,
GPIO97_KP_MKIN_3,
GPIO98_KP_MKIN_4,
GPIO99_KP_MKIN_5,
GPIO91_KP_MKIN_6,
GPIO13_KP_MKIN_7,
GPIO103_KP_MKOUT_0 | MFP_LPM_DRIVE_HIGH,
@ -150,19 +151,57 @@ static unsigned long treo680_pin_config[] __initdata = {
GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* bluetooth host wake up */
};
#ifdef CONFIG_MACH_TREO680
static unsigned long treo680_pin_config[] __initdata = {
GPIO33_GPIO, /* SD read only */
/* MATRIX KEYPAD - different wake up source */
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO99_KP_MKIN_5,
};
#endif /* CONFIG_MACH_TREO680 */
#ifdef CONFIG_MACH_CENTRO
static unsigned long centro685_pin_config[] __initdata = {
/* Bluetooth attached to BT UART*/
MFP_CFG_OUT(GPIO80, AF0, DRIVE_LOW), /* power: LOW = off */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* MATRIX KEYPAD - different wake up source */
GPIO100_KP_MKIN_0,
GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
};
#endif /* CONFIG_MACH_CENTRO */
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#ifdef CONFIG_MACH_TREO680
static struct pxamci_platform_data treo680_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_NR_TREO680_SD_DETECT_N,
.gpio_card_detect = GPIO_NR_TREO_SD_DETECT_N,
.gpio_card_ro = GPIO_NR_TREO680_SD_READONLY,
.gpio_power = GPIO_NR_TREO680_SD_POWER,
};
#endif /* CONFIG_MACH_TREO680 */
#ifdef CONFIG_MACH_CENTRO
static struct pxamci_platform_data centro_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_NR_TREO_SD_DETECT_N,
.gpio_card_ro = -1,
.gpio_power = GPIO_NR_CENTRO_SD_POWER,
.gpio_power_invert = 1,
};
#endif /* CONFIG_MACH_CENTRO */
/******************************************************************************
* GPIO keyboard
******************************************************************************/
#ifdef CONFIG_MACH_TREO680
static unsigned int treo680_matrix_keys[] = {
KEY(0, 0, KEY_F8), /* Red/Off/Power */
KEY(0, 1, KEY_LEFT),
@ -232,92 +271,167 @@ static struct pxa27x_keypad_platform_data treo680_keypad_platform_data = {
.debounce_interval = 30,
};
#endif /* CONFIG_MACH_TREO680 */
#ifdef CONFIG_MACH_CENTRO
static unsigned int centro_matrix_keys[] = {
KEY(0, 0, KEY_F9), /* Home */
KEY(0, 1, KEY_LEFT),
KEY(0, 2, KEY_LEFTCTRL), /* Alternate */
KEY(0, 3, KEY_L),
KEY(0, 4, KEY_A),
KEY(0, 5, KEY_Q),
KEY(0, 6, KEY_P),
KEY(1, 0, KEY_RIGHTCTRL), /* Menu */
KEY(1, 1, KEY_RIGHT),
KEY(1, 2, KEY_LEFTSHIFT), /* Left shift */
KEY(1, 3, KEY_Z),
KEY(1, 4, KEY_S),
KEY(1, 5, KEY_W),
KEY(2, 0, KEY_F1), /* Phone */
KEY(2, 1, KEY_UP),
KEY(2, 2, KEY_0),
KEY(2, 3, KEY_X),
KEY(2, 4, KEY_D),
KEY(2, 5, KEY_E),
KEY(3, 0, KEY_F10), /* Calendar */
KEY(3, 1, KEY_DOWN),
KEY(3, 2, KEY_SPACE),
KEY(3, 3, KEY_C),
KEY(3, 4, KEY_F),
KEY(3, 5, KEY_R),
KEY(4, 0, KEY_F12), /* Mail */
KEY(4, 1, KEY_KPENTER),
KEY(4, 2, KEY_RIGHTALT), /* Alt */
KEY(4, 3, KEY_V),
KEY(4, 4, KEY_G),
KEY(4, 5, KEY_T),
KEY(5, 0, KEY_F8), /* Red/Off/Power */
KEY(5, 1, KEY_PAGEUP), /* Side up */
KEY(5, 2, KEY_DOT),
KEY(5, 3, KEY_B),
KEY(5, 4, KEY_H),
KEY(5, 5, KEY_Y),
KEY(6, 0, KEY_TAB), /* Side Activate */
KEY(6, 1, KEY_PAGEDOWN), /* Side down */
KEY(6, 2, KEY_ENTER),
KEY(6, 3, KEY_N),
KEY(6, 4, KEY_J),
KEY(6, 5, KEY_U),
KEY(7, 0, KEY_F6), /* Green/Call */
KEY(7, 1, KEY_O),
KEY(7, 2, KEY_BACKSPACE),
KEY(7, 3, KEY_M),
KEY(7, 4, KEY_K),
KEY(7, 5, KEY_I),
};
static struct pxa27x_keypad_platform_data centro_keypad_platform_data = {
.matrix_key_rows = 8,
.matrix_key_cols = 7,
.matrix_key_map = centro_matrix_keys,
.matrix_key_map_size = ARRAY_SIZE(centro_matrix_keys),
.direct_key_map = { KEY_CONNECT },
.direct_key_num = 1,
.debounce_interval = 30,
};
#endif /* CONFIG_MACH_CENTRO */
/******************************************************************************
* aSoC audio
******************************************************************************/
static pxa2xx_audio_ops_t treo680_ac97_pdata = {
static pxa2xx_audio_ops_t treo_ac97_pdata = {
.reset_gpio = 95,
};
/******************************************************************************
* Backlight
******************************************************************************/
static int treo680_backlight_init(struct device *dev)
static int treo_backlight_init(struct device *dev)
{
int ret;
ret = gpio_request(GPIO_NR_TREO680_BL_POWER, "BL POWER");
ret = gpio_request(GPIO_NR_TREO_BL_POWER, "BL POWER");
if (ret)
goto err;
ret = gpio_direction_output(GPIO_NR_TREO680_BL_POWER, 0);
ret = gpio_direction_output(GPIO_NR_TREO_BL_POWER, 0);
if (ret)
goto err2;
return 0;
err2:
gpio_free(GPIO_NR_TREO680_BL_POWER);
gpio_free(GPIO_NR_TREO_BL_POWER);
err:
return ret;
}
static int treo680_backlight_notify(int brightness)
static int treo_backlight_notify(int brightness)
{
gpio_set_value(GPIO_NR_TREO680_BL_POWER, brightness);
return TREO680_MAX_INTENSITY - brightness;
gpio_set_value(GPIO_NR_TREO_BL_POWER, brightness);
return TREO_MAX_INTENSITY - brightness;
};
static void treo680_backlight_exit(struct device *dev)
static void treo_backlight_exit(struct device *dev)
{
gpio_free(GPIO_NR_TREO680_BL_POWER);
gpio_free(GPIO_NR_TREO_BL_POWER);
}
static struct platform_pwm_backlight_data treo680_backlight_data = {
static struct platform_pwm_backlight_data treo_backlight_data = {
.pwm_id = 0,
.max_brightness = TREO680_MAX_INTENSITY,
.dft_brightness = TREO680_DEFAULT_INTENSITY,
.pwm_period_ns = TREO680_PERIOD_NS,
.init = treo680_backlight_init,
.notify = treo680_backlight_notify,
.exit = treo680_backlight_exit,
.max_brightness = TREO_MAX_INTENSITY,
.dft_brightness = TREO_DEFAULT_INTENSITY,
.pwm_period_ns = TREO_PERIOD_NS,
.init = treo_backlight_init,
.notify = treo_backlight_notify,
.exit = treo_backlight_exit,
};
static struct platform_device treo680_backlight = {
static struct platform_device treo_backlight = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &treo680_backlight_data,
.platform_data = &treo_backlight_data,
},
};
/******************************************************************************
* IrDA
******************************************************************************/
static struct pxaficp_platform_data treo680_ficp_info = {
.gpio_pwdown = GPIO_NR_TREO680_IR_EN,
static struct pxaficp_platform_data treo_ficp_info = {
.gpio_pwdown = GPIO_NR_TREO_IR_EN,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/******************************************************************************
* UDC
******************************************************************************/
static struct pxa2xx_udc_mach_info treo680_udc_info __initdata = {
.gpio_vbus = GPIO_NR_TREO680_USB_DETECT,
static struct pxa2xx_udc_mach_info treo_udc_info __initdata = {
.gpio_vbus = GPIO_NR_TREO_USB_DETECT,
.gpio_vbus_inverted = 1,
.gpio_pullup = GPIO_NR_TREO680_USB_PULLUP,
.gpio_pullup = GPIO_NR_TREO_USB_PULLUP,
};
/******************************************************************************
* USB host
******************************************************************************/
#ifdef CONFIG_MACH_TREO680
static struct pxaohci_platform_data treo680_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT1 | ENABLE_PORT3,
.power_budget = 0,
};
#endif /* CONFIG_MACH_TREO680 */
/******************************************************************************
* Power supply
@ -326,41 +440,41 @@ static int power_supply_init(struct device *dev)
{
int ret;
ret = gpio_request(GPIO_NR_TREO680_POWER_DETECT, "CABLE_STATE_AC");
ret = gpio_request(GPIO_NR_TREO_POWER_DETECT, "CABLE_STATE_AC");
if (ret)
goto err1;
ret = gpio_direction_input(GPIO_NR_TREO680_POWER_DETECT);
ret = gpio_direction_input(GPIO_NR_TREO_POWER_DETECT);
if (ret)
goto err2;
return 0;
err2:
gpio_free(GPIO_NR_TREO680_POWER_DETECT);
gpio_free(GPIO_NR_TREO_POWER_DETECT);
err1:
return ret;
}
static int treo680_is_ac_online(void)
static int treo_is_ac_online(void)
{
return gpio_get_value(GPIO_NR_TREO680_POWER_DETECT);
return gpio_get_value(GPIO_NR_TREO_POWER_DETECT);
}
static void power_supply_exit(struct device *dev)
{
gpio_free(GPIO_NR_TREO680_POWER_DETECT);
gpio_free(GPIO_NR_TREO_POWER_DETECT);
}
static char *treo680_supplicants[] = {
static char *treo_supplicants[] = {
"main-battery",
};
static struct pda_power_pdata power_supply_info = {
.init = power_supply_init,
.is_ac_online = treo680_is_ac_online,
.is_ac_online = treo_is_ac_online,
.exit = power_supply_exit,
.supplied_to = treo680_supplicants,
.num_supplicants = ARRAY_SIZE(treo680_supplicants),
.supplied_to = treo_supplicants,
.num_supplicants = ARRAY_SIZE(treo_supplicants),
};
static struct platform_device power_supply = {
@ -374,7 +488,8 @@ static struct platform_device power_supply = {
/******************************************************************************
* Vibra and LEDs
******************************************************************************/
static struct gpio_led gpio_leds[] = {
#ifdef CONFIG_MACH_TREO680
static struct gpio_led treo680_gpio_leds[] = {
{
.name = "treo680:vibra:vibra",
.default_trigger = "none",
@ -383,34 +498,68 @@ static struct gpio_led gpio_leds[] = {
{
.name = "treo680:green:led",
.default_trigger = "mmc0",
.gpio = GPIO_NR_TREO680_GREEN_LED,
.gpio = GPIO_NR_TREO_GREEN_LED,
},
{
.name = "treo680:keybbl:keybbl",
.name = "treo680:white:keybbl",
.default_trigger = "none",
.gpio = GPIO_NR_TREO680_KEYB_BL,
},
};
static struct gpio_led_platform_data gpio_led_info = {
.leds = gpio_leds,
.num_leds = ARRAY_SIZE(gpio_leds),
static struct gpio_led_platform_data treo680_gpio_led_info = {
.leds = treo680_gpio_leds,
.num_leds = ARRAY_SIZE(treo680_gpio_leds),
};
static struct platform_device treo680_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &gpio_led_info,
.platform_data = &treo680_gpio_led_info,
}
};
#endif /* CONFIG_MACH_TREO680 */
#ifdef CONFIG_MACH_CENTRO
static struct gpio_led centro_gpio_leds[] = {
{
.name = "centro:vibra:vibra",
.default_trigger = "none",
.gpio = GPIO_NR_CENTRO_VIBRATE_EN,
},
{
.name = "centro:green:led",
.default_trigger = "mmc0",
.gpio = GPIO_NR_TREO_GREEN_LED,
},
{
.name = "centro:white:keybbl",
.default_trigger = "none",
.active_low = 1,
.gpio = GPIO_NR_CENTRO_KEYB_BL,
},
};
static struct gpio_led_platform_data centro_gpio_led_info = {
.leds = centro_gpio_leds,
.num_leds = ARRAY_SIZE(centro_gpio_leds),
};
static struct platform_device centro_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &centro_gpio_led_info,
}
};
#endif /* CONFIG_MACH_CENTRO */
/******************************************************************************
* Framebuffer
******************************************************************************/
/* TODO: add support for 324x324 */
static struct pxafb_mode_info treo680_lcd_modes[] = {
static struct pxafb_mode_info treo_lcd_modes[] = {
{
.pixclock = 86538,
.xres = 320,
@ -427,21 +576,21 @@ static struct pxafb_mode_info treo680_lcd_modes[] = {
},
};
static void treo680_lcd_power(int on, struct fb_var_screeninfo *info)
static void treo_lcd_power(int on, struct fb_var_screeninfo *info)
{
gpio_set_value(GPIO_NR_TREO680_BL_POWER, on);
gpio_set_value(GPIO_NR_TREO_BL_POWER, on);
}
static struct pxafb_mach_info treo680_lcd_screen = {
.modes = treo680_lcd_modes,
.num_modes = ARRAY_SIZE(treo680_lcd_modes),
static struct pxafb_mach_info treo_lcd_screen = {
.modes = treo_lcd_modes,
.num_modes = ARRAY_SIZE(treo_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
/******************************************************************************
* Power management - standby
******************************************************************************/
static void __init treo680_pm_init(void)
static void __init treo_pm_init(void)
{
static u32 resume[] = {
0xe3a00101, /* mov r0, #0x40000000 */
@ -450,70 +599,118 @@ static void __init treo680_pm_init(void)
};
/* this is where the bootloader jumps */
memcpy(phys_to_virt(TREO680_STR_BASE), resume, sizeof(resume));
memcpy(phys_to_virt(TREO_STR_BASE), resume, sizeof(resume));
}
/******************************************************************************
* Machine init
******************************************************************************/
static struct platform_device *devices[] __initdata = {
&treo680_backlight,
&treo680_leds,
static struct platform_device *treo_devices[] __initdata = {
&treo_backlight,
&power_supply,
};
#ifdef CONFIG_MACH_TREO680
static struct platform_device *treo680_devices[] __initdata = {
&treo680_leds,
};
#endif /* CONFIG_MACH_TREO680 */
#ifdef CONFIG_MACH_CENTRO
static struct platform_device *centro_devices[] __initdata = {
&centro_leds,
};
#endif /* CONFIG_MACH_CENTRO */
/* setup udc GPIOs initial state */
static void __init treo680_udc_init(void)
static void __init treo_udc_init(void)
{
if (!gpio_request(GPIO_NR_TREO680_USB_PULLUP, "UDC Vbus")) {
gpio_direction_output(GPIO_NR_TREO680_USB_PULLUP, 1);
gpio_free(GPIO_NR_TREO680_USB_PULLUP);
if (!gpio_request(GPIO_NR_TREO_USB_PULLUP, "UDC Vbus")) {
gpio_direction_output(GPIO_NR_TREO_USB_PULLUP, 1);
gpio_free(GPIO_NR_TREO_USB_PULLUP);
}
}
static void __init treo680_lcd_power_init(void)
static void __init treo_lcd_power_init(void)
{
int ret;
ret = gpio_request(GPIO_NR_TREO680_LCD_POWER, "LCD POWER");
ret = gpio_request(GPIO_NR_TREO_LCD_POWER, "LCD POWER");
if (ret) {
pr_err("Treo680: LCD power GPIO request failed!\n");
return;
}
ret = gpio_direction_output(GPIO_NR_TREO680_LCD_POWER, 0);
ret = gpio_direction_output(GPIO_NR_TREO_LCD_POWER, 0);
if (ret) {
pr_err("Treo680: setting LCD power GPIO direction failed!\n");
gpio_free(GPIO_NR_TREO680_LCD_POWER);
gpio_free(GPIO_NR_TREO_LCD_POWER);
return;
}
treo680_lcd_screen.pxafb_lcd_power = treo680_lcd_power;
treo_lcd_screen.pxafb_lcd_power = treo_lcd_power;
}
static void __init treo_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
treo_pm_init();
pxa2xx_mfp_config(ARRAY_AND_SIZE(treo_pin_config));
treo_lcd_power_init();
set_pxa_fb_info(&treo_lcd_screen);
treo_udc_init();
pxa_set_udc_info(&treo_udc_info);
pxa_set_ac97_info(&treo_ac97_pdata);
pxa_set_ficp_info(&treo_ficp_info);
platform_add_devices(ARRAY_AND_SIZE(treo_devices));
}
#ifdef CONFIG_MACH_TREO680
static void __init treo680_init(void)
{
treo680_pm_init();
treo_init();
pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
pxa_set_keypad_info(&treo680_keypad_platform_data);
treo680_lcd_power_init();
set_pxa_fb_info(&treo680_lcd_screen);
pxa_set_mci_info(&treo680_mci_platform_data);
treo680_udc_init();
pxa_set_udc_info(&treo680_udc_info);
pxa_set_ac97_info(&treo680_ac97_pdata);
pxa_set_ficp_info(&treo680_ficp_info);
pxa_set_keypad_info(&treo680_keypad_platform_data);
pxa_set_ohci_info(&treo680_ohci_info);
platform_add_devices(devices, ARRAY_SIZE(devices));
platform_add_devices(ARRAY_AND_SIZE(treo680_devices));
}
MACHINE_START(TREO680, "Palm Treo 680")
.phys_io = TREO680_PHYS_IO_START,
.io_pg_offst = io_p2v(0x40000000),
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = treo680_init,
.phys_io = TREO_PHYS_IO_START,
.io_pg_offst = io_p2v(0x40000000),
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = treo680_init,
MACHINE_END
#endif /* CONFIG_MACH_TREO680 */
#ifdef CONFIG_MACH_CENTRO
static void __init centro_init(void)
{
treo_init();
pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config));
pxa_set_mci_info(&centro_mci_platform_data);
pxa_set_keypad_info(&centro_keypad_platform_data);
platform_add_devices(ARRAY_AND_SIZE(centro_devices));
}
MACHINE_START(CENTRO, "Palm Centro 685")
.phys_io = TREO_PHYS_IO_START,
.io_pg_offst = io_p2v(0x40000000),
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = centro_init,
MACHINE_END
#endif /* CONFIG_MACH_CENTRO */

View File

@ -570,6 +570,10 @@ static void __init palmtx_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
palmtx_pm_init();
set_pxa_fb_info(&palmtx_lcd_screen);
pxa_set_mci_info(&palmtx_mci_platform_data);

View File

@ -491,6 +491,10 @@ static void __init palmz72_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
set_pxa_fb_info(&palmz72_lcd_screen);
pxa_set_mci_info(&palmz72_mci_platform_data);
palmz72_udc_init();

View File

@ -227,6 +227,10 @@ static void __init pcm027_init(void)
pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_add_devices(devices, ARRAY_SIZE(devices));
/* at last call the baseboard to initialize itself */

View File

@ -359,19 +359,12 @@ static unsigned long pcm990_camera_pin_config[] = {
GPIO44_CIF_LV,
};
static int pcm990_pxacamera_init(struct device *dev)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
return 0;
}
/*
* CICR4: PCLK_EN: Pixel clock is supplied by the sensor
* MCLK_EN: Master clock is generated by PXA
* PCP: Data sampled on the falling edge of pixel clock
*/
struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
.init = pcm990_pxacamera_init,
.flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 |
PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/,
.mclk_10khz = 1000,
@ -532,6 +525,7 @@ void __init pcm990_baseboard_init(void)
pxa_set_ac97_info(NULL);
#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
pxa_set_camera_info(&pcm990_pxacamera_platform_data);
i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));

View File

@ -449,6 +449,10 @@ static void __init poodle_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_scoop_config = &poodle_pcmcia_config;
ret = platform_add_devices(devices, ARRAY_SIZE(devices));

View File

@ -322,9 +322,6 @@ void __init pxa26x_init_irq(void)
static struct platform_device *pxa25x_devices[] __initdata = {
&pxa25x_device_udc,
&pxa_device_ffuart,
&pxa_device_btuart,
&pxa_device_stuart,
&pxa_device_i2s,
&sa1100_device_rtc,
&pxa25x_device_ssp,
@ -372,10 +369,8 @@ static int __init pxa25x_init(void)
}
/* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
if (cpu_is_pxa255()) {
if (cpu_is_pxa255())
clks_register(&pxa25x_hwuart_clkreg, 1);
ret = platform_device_register(&pxa_device_hwuart);
}
return ret;
}

View File

@ -364,9 +364,6 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
static struct platform_device *devices[] __initdata = {
&pxa27x_device_udc,
&pxa_device_ffuart,
&pxa_device_btuart,
&pxa_device_stuart,
&pxa_device_i2s,
&sa1100_device_rtc,
&pxa_device_rtc,

View File

@ -30,6 +30,7 @@
#include <mach/pm.h>
#include <mach/dma.h>
#include <mach/ssp.h>
#include <mach/regs-intc.h>
#include <plat/i2c.h>
#include "generic.h"
@ -45,6 +46,9 @@
#define ACCR_D0CS (1 << 26)
#define ACCR_PCCE (1 << 11)
#define PECR_IE(n) ((1 << ((n) * 2)) << 28)
#define PECR_IS(n) ((1 << ((n) * 2)) << 29)
/* crystal frequency to static memory controller multiplier (SMCFS) */
static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
@ -237,6 +241,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5);
static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_u2d, USB2, 48000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0);
static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0);
@ -261,6 +266,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),
INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL),
INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL),
INIT_CLKREG(&clk_pxa3xx_u2d, NULL, "U2DCLK"),
INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL),
INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL),
INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL),
@ -530,6 +536,43 @@ static inline void pxa3xx_init_pm(void) {}
#define pxa3xx_set_wake NULL
#endif
static void pxa_ack_ext_wakeup(unsigned int irq)
{
PECR |= PECR_IS(irq - IRQ_WAKEUP0);
}
static void pxa_mask_ext_wakeup(unsigned int irq)
{
ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f));
PECR &= ~PECR_IE(irq - IRQ_WAKEUP0);
}
static void pxa_unmask_ext_wakeup(unsigned int irq)
{
ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f);
PECR |= PECR_IE(irq - IRQ_WAKEUP0);
}
static struct irq_chip pxa_ext_wakeup_chip = {
.name = "WAKEUP",
.ack = pxa_ack_ext_wakeup,
.mask = pxa_mask_ext_wakeup,
.unmask = pxa_unmask_ext_wakeup,
};
static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
{
int irq;
for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) {
set_irq_chip(irq, &pxa_ext_wakeup_chip);
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID);
}
pxa_ext_wakeup_chip.set_wake = fn;
}
void __init pxa3xx_init_irq(void)
{
/* enable CP6 access */
@ -539,6 +582,7 @@ void __init pxa3xx_init_irq(void)
__asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value));
pxa_init_irq(56, pxa3xx_set_wake);
pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
}
@ -553,9 +597,6 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
static struct platform_device *devices[] __initdata = {
&pxa27x_device_udc,
&pxa_device_ffuart,
&pxa_device_btuart,
&pxa_device_stuart,
&pxa_device_i2s,
&sa1100_device_rtc,
&pxa_device_rtc,

View File

@ -22,9 +22,13 @@
#include <linux/i2c.h>
#include <linux/smc91x.h>
#include <linux/mfd/da903x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/onenand.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <mach/pxa930.h>
#include <plat/i2c.h>
@ -33,7 +37,7 @@
#include "devices.h"
#include "generic.h"
#define GPIO_LCD_RESET (16)
#define GPIO_LCD_RESET (16)
/* SAAR MFP configurations */
static mfp_cfg_t saar_mfp_cfg[] __initdata = {
@ -56,6 +60,31 @@ static mfp_cfg_t saar_mfp_cfg[] __initdata = {
/* Ethernet */
DF_nCS1_nCS3,
GPIO97_GPIO,
/* DFI */
DF_INT_RnB_ND_INT_RnB,
DF_nRE_nOE_ND_nRE,
DF_nWE_ND_nWE,
DF_CLE_nOE_ND_CLE,
DF_nADV1_ALE_ND_ALE,
DF_nADV2_ALE_nCS3,
DF_nCS0_ND_nCS0,
DF_IO0_ND_IO0,
DF_IO1_ND_IO1,
DF_IO2_ND_IO2,
DF_IO3_ND_IO3,
DF_IO4_ND_IO4,
DF_IO5_ND_IO5,
DF_IO6_ND_IO6,
DF_IO7_ND_IO7,
DF_IO8_ND_IO8,
DF_IO9_ND_IO9,
DF_IO10_ND_IO10,
DF_IO11_ND_IO11,
DF_IO12_ND_IO12,
DF_IO13_ND_IO13,
DF_IO14_ND_IO14,
DF_IO15_ND_IO15,
};
#define SAAR_ETH_PHYS (0x14000000)
@ -451,10 +480,15 @@ static inline void saar_init_lcd(void) {}
#endif
#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
static struct da9034_backlight_pdata saar_da9034_backlight = {
.output_current = 4, /* 4mA */
};
static struct da903x_subdev_info saar_da9034_subdevs[] = {
[0] = {
.name = "da903x-backlight",
.id = DA9034_ID_WLED,
.platform_data = &saar_da9034_backlight,
},
};
@ -480,12 +514,81 @@ static void __init saar_init_i2c(void)
#else
static inline void saar_init_i2c(void) {}
#endif
#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE)
static struct mtd_partition saar_onenand_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = SZ_1M,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_128K,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_8M,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = (SZ_2M + SZ_1M),
.mask_flags = 0,
}, {
.name = "filesystem",
.offset = MTDPART_OFS_APPEND,
.size = SZ_48M,
.mask_flags = 0,
}
};
static struct onenand_platform_data saar_onenand_info = {
.parts = saar_onenand_partitions,
.nr_parts = ARRAY_SIZE(saar_onenand_partitions),
};
#define SMC_CS0_PHYS_BASE (0x10000000)
static struct resource saar_resource_onenand[] = {
[0] = {
.start = SMC_CS0_PHYS_BASE,
.end = SMC_CS0_PHYS_BASE + SZ_1M,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device saar_device_onenand = {
.name = "onenand-flash",
.id = -1,
.dev = {
.platform_data = &saar_onenand_info,
},
.resource = saar_resource_onenand,
.num_resources = ARRAY_SIZE(saar_resource_onenand),
};
static void __init saar_init_onenand(void)
{
platform_device_register(&saar_device_onenand);
}
#else
static void __init saar_init_onenand(void) {}
#endif
static void __init saar_init(void)
{
/* initialize MFP configurations */
pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_device_register(&smc91x_device);
saar_init_onenand();
saar_init_i2c();
saar_init_lcd();

View File

@ -42,8 +42,8 @@ void corgi_lcdtg_hw_init(int mode);
#define MAX1111_BATT_TEMP 2u
#define MAX1111_ACIN_VOLT 6u
extern struct battery_thresh spitz_battery_levels_acin[];
extern struct battery_thresh spitz_battery_levels_noac[];
extern struct battery_thresh sharpsl_battery_levels_acin[];
extern struct battery_thresh sharpsl_battery_levels_noac[];
int sharpsl_pm_pxa_read_max1111(int channel);

View File

@ -78,7 +78,7 @@ DEFINE_LED_TRIGGER(sharpsl_charge_led_trigger);
struct battery_thresh spitz_battery_levels_acin[] = {
struct battery_thresh sharpsl_battery_levels_acin[] = {
{ 213, 100},
{ 212, 98},
{ 211, 95},
@ -121,7 +121,7 @@ struct battery_thresh spitz_battery_levels_acin[] = {
{ 0, 0},
};
struct battery_thresh spitz_battery_levels_noac[] = {
struct battery_thresh sharpsl_battery_levels_noac[] = {
{ 213, 100},
{ 212, 98},
{ 211, 95},
@ -165,19 +165,20 @@ struct battery_thresh spitz_battery_levels_noac[] = {
};
/* MAX1111 Commands */
#define MAXCTRL_PD0 1u << 0
#define MAXCTRL_PD1 1u << 1
#define MAXCTRL_SGL 1u << 2
#define MAXCTRL_UNI 1u << 3
#define MAXCTRL_PD0 (1u << 0)
#define MAXCTRL_PD1 (1u << 1)
#define MAXCTRL_SGL (1u << 2)
#define MAXCTRL_UNI (1u << 3)
#define MAXCTRL_SEL_SH 4
#define MAXCTRL_STR 1u << 7
#define MAXCTRL_STR (1u << 7)
/*
* Read MAX1111 ADC
*/
int sharpsl_pm_pxa_read_max1111(int channel)
{
if (machine_is_tosa()) // Ugly, better move this function into another module
/* Ugly, better move this function into another module */
if (machine_is_tosa())
return 0;
#ifdef CONFIG_CORGI_SSP_DEPRECATED
@ -238,7 +239,7 @@ EXPORT_SYMBOL(sharpsl_battery_kick);
static void sharpsl_battery_thread(struct work_struct *private_)
{
int voltage, percent, apm_status, i = 0;
int voltage, percent, apm_status, i;
if (!sharpsl_pm.machinfo)
return;
@ -250,15 +251,14 @@ static void sharpsl_battery_thread(struct work_struct *private_)
&& time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_ON_TIME_INTERVAL))
schedule_delayed_work(&toggle_charger, 0);
while(1) {
for (i = 0; i < 5; i++) {
voltage = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
if (voltage > 0) break;
if (i++ > 5) {
voltage = sharpsl_pm.machinfo->bat_levels_noac[0].voltage;
dev_warn(sharpsl_pm.dev, "Warning: Cannot read main battery!\n");
if (voltage > 0)
break;
}
}
if (voltage <= 0) {
voltage = sharpsl_pm.machinfo->bat_levels_noac[0].voltage;
dev_warn(sharpsl_pm.dev, "Warning: Cannot read main battery!\n");
}
voltage = sharpsl_average_value(voltage);
@ -266,8 +266,10 @@ static void sharpsl_battery_thread(struct work_struct *private_)
percent = get_percentage(voltage);
/* At low battery voltages, the voltage has a tendency to start
creeping back up so we try to avoid this here */
if ((sharpsl_pm.battstat.ac_status == APM_AC_ONLINE) || (apm_status == APM_BATTERY_STATUS_HIGH) || percent <= sharpsl_pm.battstat.mainbat_percent) {
creeping back up so we try to avoid this here */
if ((sharpsl_pm.battstat.ac_status == APM_AC_ONLINE)
|| (apm_status == APM_BATTERY_STATUS_HIGH)
|| percent <= sharpsl_pm.battstat.mainbat_percent) {
sharpsl_pm.battstat.mainbat_voltage = voltage;
sharpsl_pm.battstat.mainbat_status = apm_status;
sharpsl_pm.battstat.mainbat_percent = percent;
@ -279,8 +281,8 @@ static void sharpsl_battery_thread(struct work_struct *private_)
#ifdef CONFIG_BACKLIGHT_CORGI
/* If battery is low. limit backlight intensity to save power. */
if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
&& ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) ||
(sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) {
&& ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW)
|| (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) {
if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) {
sharpsl_pm.machinfo->backlight_limit(1);
sharpsl_pm.flags |= SHARPSL_BL_LIMIT;
@ -293,8 +295,8 @@ static void sharpsl_battery_thread(struct work_struct *private_)
/* Suspend if critical battery level */
if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
&& (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL)
&& !(sharpsl_pm.flags & SHARPSL_APM_QUEUED)) {
&& (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL)
&& !(sharpsl_pm.flags & SHARPSL_APM_QUEUED)) {
sharpsl_pm.flags |= SHARPSL_APM_QUEUED;
dev_err(sharpsl_pm.dev, "Fatal Off\n");
apm_queue_event(APM_CRITICAL_SUSPEND);
@ -346,7 +348,7 @@ static void sharpsl_charge_error(void)
static void sharpsl_charge_toggle(struct work_struct *private_)
{
dev_dbg(sharpsl_pm.dev, "Toogling Charger at time: %lx\n", jiffies);
dev_dbg(sharpsl_pm.dev, "Toggling Charger at time: %lx\n", jiffies);
if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
sharpsl_charge_off();
@ -368,7 +370,7 @@ static void sharpsl_ac_timer(unsigned long data)
{
int acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
dev_dbg(sharpsl_pm.dev, "AC Status: %d\n",acin);
dev_dbg(sharpsl_pm.dev, "AC Status: %d\n", acin);
sharpsl_average_clear();
if (acin && (sharpsl_pm.charge_mode != CHRG_ON))
@ -472,14 +474,14 @@ static int sharpsl_average_value(int ad)
sharpsl_ad[sharpsl_ad_index] = ad;
sharpsl_ad_index++;
if (sharpsl_ad_index >= SHARPSL_CNV_VALUE_NUM) {
for (i=0; i < (SHARPSL_CNV_VALUE_NUM-1); i++)
for (i = 0; i < (SHARPSL_CNV_VALUE_NUM-1); i++)
sharpsl_ad[i] = sharpsl_ad[i+1];
sharpsl_ad_index = SHARPSL_CNV_VALUE_NUM - 1;
}
for (i=0; i < sharpsl_ad_index; i++)
for (i = 0; i < sharpsl_ad_index; i++)
ad_val += sharpsl_ad[i];
return (ad_val / sharpsl_ad_index);
return ad_val / sharpsl_ad_index;
}
/*
@ -492,8 +494,8 @@ static int get_select_val(int *val)
/* Find MAX val */
temp = val[0];
j=0;
for (i=1; i<5; i++) {
j = 0;
for (i = 1; i < 5; i++) {
if (temp < val[i]) {
temp = val[i];
j = i;
@ -502,21 +504,21 @@ static int get_select_val(int *val)
/* Find MIN val */
temp = val[4];
k=4;
for (i=3; i>=0; i--) {
k = 4;
for (i = 3; i >= 0; i--) {
if (temp > val[i]) {
temp = val[i];
k = i;
}
}
for (i=0; i<5; i++)
if (i != j && i != k )
for (i = 0; i < 5; i++)
if (i != j && i != k)
sum += val[i];
dev_dbg(sharpsl_pm.dev, "Average: %d from values: %d, %d, %d, %d, %d\n", sum/3, val[0], val[1], val[2], val[3], val[4]);
return (sum/3);
return sum/3;
}
static int sharpsl_check_battery_temp(void)
@ -524,7 +526,7 @@ static int sharpsl_check_battery_temp(void)
int val, i, buff[5];
/* Check battery temperature */
for (i=0; i<5; i++) {
for (i = 0; i < 5; i++) {
mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP);
sharpsl_pm.machinfo->measure_temp(1);
mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP);
@ -557,7 +559,7 @@ static int sharpsl_check_battery_voltage(void)
sharpsl_pm.machinfo->discharge1(1);
/* Check battery voltage */
for (i=0; i<5; i++) {
for (i = 0; i < 5; i++) {
buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
}
@ -581,16 +583,16 @@ static int sharpsl_ac_check(void)
{
int temp, i, buff[5];
for (i=0; i<5; i++) {
for (i = 0; i < 5; i++) {
buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_ACIN_VOLT);
mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_ACIN);
}
temp = get_select_val(buff);
dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp);
dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n", temp);
if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) {
dev_err(sharpsl_pm.dev, "Error: AC check failed.\n");
dev_err(sharpsl_pm.dev, "Error: AC check failed: voltage %d.\n", temp);
return -1;
}
@ -624,9 +626,9 @@ static int sharpsl_pm_resume(struct platform_device *pdev)
static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state)
{
dev_dbg(sharpsl_pm.dev, "Time is: %08x\n",RCNR);
dev_dbg(sharpsl_pm.dev, "Time is: %08x\n", RCNR);
dev_dbg(sharpsl_pm.dev, "Offline Charge Activate = %d\n",sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG);
dev_dbg(sharpsl_pm.dev, "Offline Charge Activate = %d\n", sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG);
/* not charging and AC-IN! */
if ((sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG) && (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN))) {
@ -644,12 +646,12 @@ static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable
if ((sharpsl_pm.charge_mode == CHRG_ON) && ((alarm_enable && ((alarm_time - RCNR) > (SHARPSL_BATCHK_TIME_SUSPEND + 30))) || !alarm_enable)) {
RTSR &= RTSR_ALE;
RTAR = RCNR + SHARPSL_BATCHK_TIME_SUSPEND;
dev_dbg(sharpsl_pm.dev, "Charging alarm at: %08x\n",RTAR);
dev_dbg(sharpsl_pm.dev, "Charging alarm at: %08x\n", RTAR);
sharpsl_pm.flags |= SHARPSL_ALARM_ACTIVE;
} else if (alarm_enable) {
RTSR &= RTSR_ALE;
RTAR = alarm_time;
dev_dbg(sharpsl_pm.dev, "User alarm at: %08x\n",RTAR);
dev_dbg(sharpsl_pm.dev, "User alarm at: %08x\n", RTAR);
} else {
dev_dbg(sharpsl_pm.dev, "No alarms set.\n");
}
@ -658,19 +660,18 @@ static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable
sharpsl_pm.machinfo->postsuspend();
dev_dbg(sharpsl_pm.dev, "Corgi woken up from suspend: %08x\n",PEDR);
dev_dbg(sharpsl_pm.dev, "Corgi woken up from suspend: %08x\n", PEDR);
}
static int corgi_enter_suspend(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state)
{
if (!sharpsl_pm.machinfo->should_wakeup(!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE) && alarm_enable) )
{
if (!sharpsl_pm.machinfo->should_wakeup(!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE) && alarm_enable)) {
if (!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE)) {
dev_dbg(sharpsl_pm.dev, "No user triggered wakeup events and not charging. Strange. Suspend.\n");
corgi_goto_sleep(alarm_time, alarm_enable, state);
return 1;
}
if(sharpsl_off_charge_battery()) {
if (sharpsl_off_charge_battery()) {
dev_dbg(sharpsl_pm.dev, "Charging. Suspend...\n");
corgi_goto_sleep(alarm_time, alarm_enable, state);
return 1;
@ -697,7 +698,7 @@ static int corgi_pxa_pm_enter(suspend_state_t state)
corgi_goto_sleep(alarm_time, alarm_status, state);
while (corgi_enter_suspend(alarm_time,alarm_status,state))
while (corgi_enter_suspend(alarm_time, alarm_status, state))
{}
if (sharpsl_pm.machinfo->earlyresume)
@ -732,7 +733,7 @@ static int sharpsl_fatal_check(void)
sharpsl_pm.machinfo->discharge1(1);
/* Check battery : check inserting battery ? */
for (i=0; i<5; i++) {
for (i = 0; i < 5; i++) {
buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
}
@ -812,7 +813,7 @@ static int sharpsl_off_charge_battery(void)
mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);
time = RCNR;
while(1) {
while (1) {
/* Check if any wakeup event had occurred */
if (sharpsl_pm.machinfo->charger_wakeup() != 0)
return 0;
@ -835,9 +836,9 @@ static int sharpsl_off_charge_battery(void)
mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);
time = RCNR;
while(1) {
while (1) {
/* Check if any wakeup event had occurred */
if (sharpsl_pm.machinfo->charger_wakeup() != 0)
if (sharpsl_pm.machinfo->charger_wakeup())
return 0;
/* Check for timeout */
if ((RCNR-time) > SHARPSL_WAIT_CO_TIME) {
@ -864,12 +865,12 @@ static int sharpsl_off_charge_battery(void)
static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_percent);
return sprintf(buf, "%d\n", sharpsl_pm.battstat.mainbat_percent);
}
static ssize_t battery_voltage_show(struct device *dev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_voltage);
return sprintf(buf, "%d\n", sharpsl_pm.battstat.mainbat_voltage);
}
static DEVICE_ATTR(battery_percentage, 0444, battery_percentage_show, NULL);
@ -943,8 +944,7 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev)
}
}
if (sharpsl_pm.machinfo->batfull_irq)
{
if (sharpsl_pm.machinfo->batfull_irq) {
/* Register interrupt handler. */
if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));

View File

@ -768,6 +768,10 @@ static void __init common_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
spitz_init_spi();
platform_add_devices(devices, ARRAY_SIZE(devices));

View File

@ -103,7 +103,7 @@ static void spitz_presuspend(void)
PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
PWER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET) | PWER_RTC;
PKWR = GPIO_bit(SPITZ_GPIO_SYNC) | GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
PKSR = 0xffffffff; // clear
PKSR = 0xffffffff; /* clear */
/* nRESET_OUT Disable */
PSLR |= PSLR_SL_ROD;
@ -149,7 +149,7 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
if (resume_on_alarm && (PEDR & PWER_RTC))
is_resume |= PWER_RTC;
dev_dbg(sharpsl_pm.dev, "is_resume: %x\n",is_resume);
dev_dbg(sharpsl_pm.dev, "is_resume: %x\n", is_resume);
return is_resume;
}
@ -160,7 +160,7 @@ static unsigned long spitz_charger_wakeup(void)
unsigned long spitzpm_read_devdata(int type)
{
switch(type) {
switch (type) {
case SHARPSL_STATUS_ACIN:
return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0);
case SHARPSL_STATUS_LOCK:
@ -199,7 +199,7 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
#if defined(CONFIG_LCD_CORGI)
.backlight_limit = corgi_lcd_limit_intensity,
#elif defined(CONFIG_BACKLIGHT_CORGI)
.backlight_limit = corgibl_limit_intensity,
.backlight_limit = corgibl_limit_intensity,
#endif
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
.charge_on_temp = SHARPSL_CHARGE_ON_TEMP,
@ -208,8 +208,8 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
.fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT,
.fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT,
.bat_levels = 40,
.bat_levels_noac = spitz_battery_levels_noac,
.bat_levels_acin = spitz_battery_levels_acin,
.bat_levels_noac = sharpsl_battery_levels_noac,
.bat_levels_acin = sharpsl_battery_levels_acin,
.status_high_acin = 188,
.status_low_acin = 178,
.status_high_noac = 185,
@ -241,7 +241,7 @@ static int __devinit spitzpm_init(void)
static void spitzpm_exit(void)
{
platform_device_unregister(spitzpm_device);
platform_device_unregister(spitzpm_device);
}
module_init(spitzpm_init);

View File

@ -342,8 +342,9 @@ void ssp_free(struct ssp_device *ssp)
}
EXPORT_SYMBOL(ssp_free);
static int __devinit ssp_probe(struct platform_device *pdev, int type)
static int __devinit ssp_probe(struct platform_device *pdev)
{
const struct platform_device_id *id = platform_get_device_id(pdev);
struct resource *res;
struct ssp_device *ssp;
int ret = 0;
@ -413,7 +414,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type)
*/
ssp->port_id = pdev->id + 1;
ssp->use_count = 0;
ssp->type = type;
ssp->type = (int)id->driver_data;
mutex_lock(&ssp_lock);
list_add(&ssp->node, &ssp_list);
@ -457,75 +458,31 @@ static int __devexit ssp_remove(struct platform_device *pdev)
return 0;
}
static int __devinit pxa25x_ssp_probe(struct platform_device *pdev)
{
return ssp_probe(pdev, PXA25x_SSP);
}
static int __devinit pxa25x_nssp_probe(struct platform_device *pdev)
{
return ssp_probe(pdev, PXA25x_NSSP);
}
static int __devinit pxa27x_ssp_probe(struct platform_device *pdev)
{
return ssp_probe(pdev, PXA27x_SSP);
}
static struct platform_driver pxa25x_ssp_driver = {
.driver = {
.name = "pxa25x-ssp",
},
.probe = pxa25x_ssp_probe,
.remove = __devexit_p(ssp_remove),
static const struct platform_device_id ssp_id_table[] = {
{ "pxa25x-ssp", PXA25x_SSP },
{ "pxa25x-nssp", PXA25x_NSSP },
{ "pxa27x-ssp", PXA27x_SSP },
{ },
};
static struct platform_driver pxa25x_nssp_driver = {
.driver = {
.name = "pxa25x-nssp",
},
.probe = pxa25x_nssp_probe,
static struct platform_driver ssp_driver = {
.probe = ssp_probe,
.remove = __devexit_p(ssp_remove),
};
static struct platform_driver pxa27x_ssp_driver = {
.driver = {
.name = "pxa27x-ssp",
.owner = THIS_MODULE,
.name = "pxa2xx-ssp",
},
.probe = pxa27x_ssp_probe,
.remove = __devexit_p(ssp_remove),
.id_table = ssp_id_table,
};
static int __init pxa_ssp_init(void)
{
int ret = 0;
ret = platform_driver_register(&pxa25x_ssp_driver);
if (ret) {
printk(KERN_ERR "failed to register pxa25x_ssp_driver");
return ret;
}
ret = platform_driver_register(&pxa25x_nssp_driver);
if (ret) {
printk(KERN_ERR "failed to register pxa25x_nssp_driver");
return ret;
}
ret = platform_driver_register(&pxa27x_ssp_driver);
if (ret) {
printk(KERN_ERR "failed to register pxa27x_ssp_driver");
return ret;
}
return ret;
return platform_driver_register(&ssp_driver);
}
static void __exit pxa_ssp_exit(void)
{
platform_driver_unregister(&pxa25x_ssp_driver);
platform_driver_unregister(&pxa25x_nssp_driver);
platform_driver_unregister(&pxa27x_ssp_driver);
platform_driver_unregister(&ssp_driver);
}
arch_initcall(pxa_ssp_init);

View File

@ -760,6 +760,10 @@ static void __init stargate2_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/* spi chip selects */
gpio_direction_output(37, 0);
gpio_direction_output(24, 0);

View File

@ -477,6 +477,10 @@ static void __init tavorevb_init(void)
/* initialize MFP configurations */
pxa3xx_mfp_config(ARRAY_AND_SIZE(tavorevb_mfp_cfg));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_device_register(&smc91x_device);
tavorevb_init_lcd();

View File

@ -825,6 +825,11 @@ static void __init tosa_init(void)
int dummy;
pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
gpio_set_wake(MFP_PIN_GPIO1, 1);
/* We can't pass to gpio-keys since it will drop the Reset altfunc */

View File

@ -524,6 +524,10 @@ static void __init trizeps4_init(void)
ARRAY_SIZE(trizeps4_devices));
}
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
if (0) /* dont know how to determine LCD */
set_pxa_fb_info(&sharp_lcd);
else

View File

@ -301,15 +301,6 @@ static void __init viper_init_irq(void)
set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
viper_irq_handler);
set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
#ifndef CONFIG_SERIAL_PXA
/*
* 8250 doesn't support IRQ_TYPE being passed as part
* of the plat_serial8250_port structure...
*/
set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING);
set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING);
#endif
}
/* Flat Panel */
@ -539,6 +530,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
{
.mapbase = VIPER_UARTA_PHYS,
.irq = gpio_to_irq(VIPER_UARTA_GPIO),
.irqflags = IRQF_TRIGGER_RISING,
.uartclk = 1843200,
.regshift = 1,
.iotype = UPIO_MEM,
@ -548,6 +540,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
{
.mapbase = VIPER_UARTB_PHYS,
.irq = gpio_to_irq(VIPER_UARTB_GPIO),
.irqflags = IRQF_TRIGGER_RISING,
.uartclk = 1843200,
.regshift = 1,
.iotype = UPIO_MEM,
@ -908,6 +901,10 @@ static void __init viper_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/* Wake-up serial console */
viper_init_serial_gpio();

View File

@ -165,6 +165,11 @@ static void __init xcep_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_hwuart_info(NULL);
/* See Intel XScale Developer's Guide for details */
/* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
MSC1 = (MSC1 & 0xffff) | 0xD5540000;

View File

@ -31,7 +31,7 @@
#include <mach/mmc.h>
#include <mach/ohci.h>
#include <mach/pxa27x_keypad.h>
#include <mach/pxa3xx_nand.h>
#include <plat/pxa3xx_nand.h>
#include "devices.h"
#include "generic.h"
@ -444,6 +444,10 @@ static inline void zylonite_init_ohci(void) {}
static void __init zylonite_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/* board-processor specific initialization */
zylonite_pxa300_init();
zylonite_pxa320_init();

View File

@ -881,7 +881,7 @@ void __init reserve_node_zero(pg_data_t *pgdat)
BOOTMEM_EXCLUSIVE);
}
if (machine_is_treo680()) {
if (machine_is_treo680() || machine_is_centro()) {
reserve_bootmem_node(pgdat, 0xa0000000, 0x1000,
BOOTMEM_EXCLUSIVE);
reserve_bootmem_node(pgdat, 0xa2000000, 0x1000,

View File

@ -43,6 +43,9 @@
#define NR_SG 1
#define CLKRT_OFF (~0)
#define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \
|| cpu_is_pxa935())
struct pxamci_host {
struct mmc_host *mmc;
spinlock_t lock;
@ -457,7 +460,7 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
clk_enable(host->clk);
if (ios->clock == 26000000) {
/* to support 26MHz on pxa300/pxa310 */
/* to support 26MHz */
host->clkrt = 7;
} else {
/* to handle (19.5MHz, 26MHz) */
@ -608,8 +611,7 @@ static int pxamci_probe(struct platform_device *pdev)
* Calculate minimum clock rate, rounding up.
*/
mmc->f_min = (host->clkrate + 63) / 64;
mmc->f_max = (cpu_is_pxa300() || cpu_is_pxa310()) ? 26000000
: host->clkrate;
mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate;
pxamci_init_ocr(host);
@ -618,7 +620,7 @@ static int pxamci_probe(struct platform_device *pdev)
if (!cpu_is_pxa25x()) {
mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
host->cmdat |= CMDAT_SDIO_INT_EN;
if (cpu_is_pxa300() || cpu_is_pxa310())
if (mmc_has_26MHz())
mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
MMC_CAP_SD_HIGHSPEED;
}

View File

@ -358,7 +358,7 @@ endchoice
config MTD_NAND_PXA3xx
tristate "Support for NAND flash devices on PXA3xx"
depends on MTD_NAND && PXA3xx
depends on MTD_NAND && (PXA3xx || ARCH_MMP)
help
This enables the driver for the NAND flash device found on
PXA3xx processors

View File

@ -9,6 +9,7 @@
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
@ -22,7 +23,7 @@
#include <linux/irq.h>
#include <mach/dma.h>
#include <mach/pxa3xx_nand.h>
#include <plat/pxa3xx_nand.h>
#define CHIP_DELAY_TIMEOUT (2 * HZ/10)
@ -84,10 +85,6 @@
#define NDCB0_CMD1_MASK (0xff)
#define NDCB0_ADDR_CYC_SHIFT (16)
/* dma-able I/O address for the NAND data and commands */
#define NDCB0_DMA_ADDR (0x43100048)
#define NDDB_DMA_ADDR (0x43100040)
/* macros for registers read/write */
#define nand_writel(info, off, val) \
__raw_writel((val), (info)->mmio_base + (off))
@ -123,6 +120,7 @@ struct pxa3xx_nand_info {
struct clk *clk;
void __iomem *mmio_base;
unsigned long mmio_phys;
unsigned int buf_start;
unsigned int buf_count;
@ -228,13 +226,35 @@ static struct pxa3xx_nand_flash samsung512MbX16 = {
.chip_id = 0x46ec,
};
static struct pxa3xx_nand_flash samsung2GbX8 = {
.timing = &samsung512MbX16_timing,
.cmdset = &smallpage_cmdset,
.page_per_block = 64,
.page_size = 2048,
.flash_width = 8,
.dfc_width = 8,
.num_blocks = 2048,
.chip_id = 0xdaec,
};
static struct pxa3xx_nand_flash samsung32GbX8 = {
.timing = &samsung512MbX16_timing,
.cmdset = &smallpage_cmdset,
.page_per_block = 128,
.page_size = 4096,
.flash_width = 8,
.dfc_width = 8,
.num_blocks = 8192,
.chip_id = 0xd7ec,
};
static struct pxa3xx_nand_timing micron_timing = {
.tCH = 10,
.tCS = 25,
.tWH = 15,
.tWP = 25,
.tRH = 15,
.tRP = 25,
.tRP = 30,
.tR = 25000,
.tWHR = 60,
.tAR = 10,
@ -262,6 +282,28 @@ static struct pxa3xx_nand_flash micron1GbX16 = {
.chip_id = 0xb12c,
};
static struct pxa3xx_nand_flash micron4GbX8 = {
.timing = &micron_timing,
.cmdset = &largepage_cmdset,
.page_per_block = 64,
.page_size = 2048,
.flash_width = 8,
.dfc_width = 8,
.num_blocks = 4096,
.chip_id = 0xdc2c,
};
static struct pxa3xx_nand_flash micron4GbX16 = {
.timing = &micron_timing,
.cmdset = &largepage_cmdset,
.page_per_block = 64,
.page_size = 2048,
.flash_width = 16,
.dfc_width = 16,
.num_blocks = 4096,
.chip_id = 0xcc2c,
};
static struct pxa3xx_nand_timing stm2GbX16_timing = {
.tCH = 10,
.tCS = 35,
@ -287,8 +329,12 @@ static struct pxa3xx_nand_flash stm2GbX16 = {
static struct pxa3xx_nand_flash *builtin_flash_types[] = {
&samsung512MbX16,
&samsung2GbX8,
&samsung32GbX8,
&micron1GbX8,
&micron1GbX16,
&micron4GbX8,
&micron4GbX16,
&stm2GbX16,
};
#endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */
@ -489,7 +535,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info)
switch (info->state) {
case STATE_PIO_WRITING:
__raw_writesl(info->mmio_base + NDDB, info->data_buff,
info->data_size << 2);
DIV_ROUND_UP(info->data_size, 4));
enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD);
@ -501,7 +547,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info)
break;
case STATE_PIO_READING:
__raw_readsl(info->mmio_base + NDDB, info->data_buff,
info->data_size << 2);
DIV_ROUND_UP(info->data_size, 4));
break;
default:
printk(KERN_ERR "%s: invalid state %d\n", __func__,
@ -523,11 +569,11 @@ static void start_data_dma(struct pxa3xx_nand_info *info, int dir_out)
if (dir_out) {
desc->dsadr = info->data_buff_phys;
desc->dtadr = NDDB_DMA_ADDR;
desc->dtadr = info->mmio_phys + NDDB;
desc->dcmd |= DCMD_INCSRCADDR | DCMD_FLOWTRG;
} else {
desc->dtadr = info->data_buff_phys;
desc->dsadr = NDDB_DMA_ADDR;
desc->dsadr = info->mmio_phys + NDDB;
desc->dcmd |= DCMD_INCTRGADDR | DCMD_FLOWSRC;
}
@ -669,6 +715,7 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
/* disable HW ECC to get all the OOB data */
info->buf_count = mtd->writesize + mtd->oobsize;
info->buf_start = mtd->writesize + column;
memset(info->data_buff, 0xFF, info->buf_count);
if (prepare_read_prog_cmd(info, cmdset->read1, column, page_addr))
break;
@ -1239,13 +1286,17 @@ static int pxa3xx_nand_probe(struct platform_device *pdev)
ret = -ENODEV;
goto fail_free_res;
}
info->mmio_phys = r->start;
ret = pxa3xx_nand_init_buff(info);
if (ret)
goto fail_free_io;
ret = request_irq(IRQ_NAND, pxa3xx_nand_irq, IRQF_DISABLED,
pdev->name, info);
/* initialize all interrupts to be disabled */
disable_int(info, NDSR_MASK);
ret = request_irq(irq, pxa3xx_nand_irq, IRQF_DISABLED,
pdev->name, info);
if (ret < 0) {
dev_err(&pdev->dev, "failed to request IRQ\n");
goto fail_free_buf;
@ -1271,7 +1322,7 @@ static int pxa3xx_nand_probe(struct platform_device *pdev)
return add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts);
fail_free_irq:
free_irq(IRQ_NAND, info);
free_irq(irq, info);
fail_free_buf:
if (use_dma) {
pxa_free_dma(info->data_dma_ch);
@ -1296,12 +1347,15 @@ static int pxa3xx_nand_remove(struct platform_device *pdev)
struct mtd_info *mtd = platform_get_drvdata(pdev);
struct pxa3xx_nand_info *info = mtd->priv;
struct resource *r;
int irq;
platform_set_drvdata(pdev, NULL);
del_mtd_device(mtd);
del_mtd_partitions(mtd);
free_irq(IRQ_NAND, info);
irq = platform_get_irq(pdev, 0);
if (irq >= 0)
free_irq(irq, info);
if (use_dma) {
pxa_free_dma(info->data_dma_ch);
dma_free_writecombine(&pdev->dev, info->data_buff_size,

View File

@ -25,6 +25,7 @@
#define DA9034_WLED_CONTROL1 0x3C
#define DA9034_WLED_CONTROL2 0x3D
#define DA9034_WLED_ISET(x) ((x) & 0x1f)
#define DA9034_WLED_BOOST_EN (1 << 5)
@ -101,6 +102,7 @@ static struct backlight_ops da903x_backlight_ops = {
static int da903x_backlight_probe(struct platform_device *pdev)
{
struct da9034_backlight_pdata *pdata = pdev->dev.platform_data;
struct da903x_backlight_data *data;
struct backlight_device *bl;
int max_brightness;
@ -127,6 +129,11 @@ static int da903x_backlight_probe(struct platform_device *pdev)
data->da903x_dev = pdev->dev.parent;
data->current_brightness = 0;
/* adjust the WLED output current */
if (pdata)
da903x_write(data->da903x_dev, DA9034_WLED_CONTROL2,
DA9034_WLED_ISET(pdata->output_current));
bl = backlight_device_register(pdev->name, data->da903x_dev,
data, &da903x_backlight_ops);
if (IS_ERR(bl)) {

View File

@ -367,6 +367,7 @@ static int __devinit tdo24m_probe(struct spi_device *spi)
spi_message_init(m);
x->cs_change = 1;
x->tx_buf = &lcd->buf[0];
spi_message_add_tail(x, m);

View File

@ -687,6 +687,7 @@ static int __init pxa168fb_probe(struct platform_device *pdev)
}
info->fix.smem_start = (unsigned long)fbi->fb_start_dma;
set_graphics_start(info, 0, 0);
/*
* Set video mode according to platform data.

View File

@ -80,7 +80,8 @@
static int pxafb_activate_var(struct fb_var_screeninfo *var,
struct pxafb_info *);
static void set_ctrlr_state(struct pxafb_info *fbi, u_int state);
static void setup_base_frame(struct pxafb_info *fbi, int branch);
static void setup_base_frame(struct pxafb_info *fbi,
struct fb_var_screeninfo *var, int branch);
static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal,
unsigned long offset, size_t size);
@ -397,6 +398,7 @@ static void pxafb_setmode(struct fb_var_screeninfo *var,
var->lower_margin = mode->lower_margin;
var->sync = mode->sync;
var->grayscale = mode->cmap_greyscale;
var->transp.length = mode->transparency;
/* set the initial RGBA bitfields */
pxafb_set_pixfmt(var, mode->depth);
@ -531,12 +533,22 @@ static int pxafb_pan_display(struct fb_var_screeninfo *var,
struct fb_info *info)
{
struct pxafb_info *fbi = (struct pxafb_info *)info;
struct fb_var_screeninfo newvar;
int dma = DMA_MAX + DMA_BASE;
if (fbi->state != C_ENABLE)
return 0;
setup_base_frame(fbi, 1);
/* Only take .xoffset, .yoffset and .vmode & FB_VMODE_YWRAP from what
* was passed in and copy the rest from the old screeninfo.
*/
memcpy(&newvar, &fbi->fb.var, sizeof(newvar));
newvar.xoffset = var->xoffset;
newvar.yoffset = var->yoffset;
newvar.vmode &= ~FB_VMODE_YWRAP;
newvar.vmode |= var->vmode & FB_VMODE_YWRAP;
setup_base_frame(fbi, &newvar, 1);
if (fbi->lccr0 & LCCR0_SDS)
lcd_writel(fbi, FBR1, fbi->fdadr[dma + 1] | 0x1);
@ -1052,9 +1064,10 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal,
return 0;
}
static void setup_base_frame(struct pxafb_info *fbi, int branch)
static void setup_base_frame(struct pxafb_info *fbi,
struct fb_var_screeninfo *var,
int branch)
{
struct fb_var_screeninfo *var = &fbi->fb.var;
struct fb_fix_screeninfo *fix = &fbi->fb.fix;
int nbytes, dma, pal, bpp = var->bits_per_pixel;
unsigned long offset;
@ -1332,7 +1345,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
#endif
setup_parallel_timing(fbi, var);
setup_base_frame(fbi, 0);
setup_base_frame(fbi, var, 0);
fbi->reg_lccr0 = fbi->lccr0 |
(LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM |

View File

@ -96,6 +96,10 @@ struct da9034_touch_pdata {
int y_inverted;
};
struct da9034_backlight_pdata {
int output_current; /* output current of WLED, from 0-31 (in mA) */
};
/* DA9030 battery charger data */
struct power_supply_info;

View File

@ -117,8 +117,6 @@ struct pxa168fb_mach_info {
unsigned invert_composite_blank:1;
unsigned invert_pix_val_ena:1;
unsigned invert_pixclock:1;
unsigned invert_vsync:1;
unsigned invert_hsync:1;
unsigned panel_rbswap:1;
unsigned active:1;
unsigned enable_lcd:1;