mirror of https://gitee.com/openkylin/linux.git
dmaengine: omap-dma: use cached CCR value when enabling DMA
We don't need to read-modify-write the CCR register; we already know what value it should contain at this point. Use the cached CCR value when setting the enable bit. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -181,7 +181,6 @@ static void omap_dma_clear_csr(struct omap_chan *c)
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static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)
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{
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struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device);
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uint32_t val;
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if (__dma_omap15xx(od->plat->dma_attr))
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c->plat->dma_write(0, CPC, c->dma_ch);
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@ -193,9 +192,8 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)
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/* Enable interrupts */
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c->plat->dma_write(d->cicr, CICR, c->dma_ch);
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val = c->plat->dma_read(CCR, c->dma_ch);
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val |= CCR_ENABLE;
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c->plat->dma_write(val, CCR, c->dma_ch);
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/* Enable channel */
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c->plat->dma_write(d->ccr | CCR_ENABLE, CCR, c->dma_ch);
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}
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static void omap_dma_stop(struct omap_chan *c)
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