mirror of https://gitee.com/openkylin/linux.git
Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-next
some amd fixes * 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux: drm/radeon/mst: cleanup code indentation drm/radeon/mst: fix regression in lane/link handling. drm/amdgpu: add invalidate_page callback for userptrs drm/amdgpu: Revert "remove the userptr rmn->lock" drm/amdgpu: clean up path handling for powerplay drm/amd/powerplay: fix memory leak of tdp_table
This commit is contained in:
Dave Airlie
commit
4604202ca8
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@ -48,7 +48,8 @@ struct amdgpu_mn {
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/* protected by adev->mn_lock */
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struct hlist_node node;
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/* objects protected by mm->mmap_sem */
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/* objects protected by lock */
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struct mutex lock;
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struct rb_root objects;
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};
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@ -72,7 +73,7 @@ static void amdgpu_mn_destroy(struct work_struct *work)
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struct amdgpu_bo *bo, *next_bo;
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mutex_lock(&adev->mn_lock);
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down_write(&rmn->mm->mmap_sem);
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mutex_lock(&rmn->lock);
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hash_del(&rmn->node);
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rbtree_postorder_for_each_entry_safe(node, next_node, &rmn->objects,
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it.rb) {
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@ -82,7 +83,7 @@ static void amdgpu_mn_destroy(struct work_struct *work)
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}
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kfree(node);
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}
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up_write(&rmn->mm->mmap_sem);
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mutex_unlock(&rmn->lock);
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mutex_unlock(&adev->mn_lock);
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mmu_notifier_unregister_no_release(&rmn->mn, rmn->mm);
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kfree(rmn);
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@ -104,6 +105,76 @@ static void amdgpu_mn_release(struct mmu_notifier *mn,
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schedule_work(&rmn->work);
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}
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/**
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* amdgpu_mn_invalidate_node - unmap all BOs of a node
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*
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* @node: the node with the BOs to unmap
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*
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* We block for all BOs and unmap them by move them
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* into system domain again.
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*/
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static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node,
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unsigned long start,
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unsigned long end)
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{
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struct amdgpu_bo *bo;
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long r;
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list_for_each_entry(bo, &node->bos, mn_list) {
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if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start, end))
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continue;
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r = amdgpu_bo_reserve(bo, true);
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if (r) {
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DRM_ERROR("(%ld) failed to reserve user bo\n", r);
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continue;
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}
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r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
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true, false, MAX_SCHEDULE_TIMEOUT);
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if (r <= 0)
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DRM_ERROR("(%ld) failed to wait for user bo\n", r);
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amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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if (r)
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DRM_ERROR("(%ld) failed to validate user bo\n", r);
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amdgpu_bo_unreserve(bo);
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}
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}
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/**
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* amdgpu_mn_invalidate_page - callback to notify about mm change
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*
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* @mn: our notifier
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* @mn: the mm this callback is about
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* @address: address of invalidate page
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*
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* Invalidation of a single page. Blocks for all BOs mapping it
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* and unmap them by move them into system domain again.
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*/
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static void amdgpu_mn_invalidate_page(struct mmu_notifier *mn,
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struct mm_struct *mm,
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unsigned long address)
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{
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struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
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struct interval_tree_node *it;
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mutex_lock(&rmn->lock);
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it = interval_tree_iter_first(&rmn->objects, address, address);
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if (it) {
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struct amdgpu_mn_node *node;
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node = container_of(it, struct amdgpu_mn_node, it);
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amdgpu_mn_invalidate_node(node, address, address);
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}
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mutex_unlock(&rmn->lock);
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}
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/**
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* amdgpu_mn_invalidate_range_start - callback to notify about mm change
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*
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@ -126,44 +197,24 @@ static void amdgpu_mn_invalidate_range_start(struct mmu_notifier *mn,
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/* notification is exclusive, but interval is inclusive */
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end -= 1;
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mutex_lock(&rmn->lock);
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it = interval_tree_iter_first(&rmn->objects, start, end);
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while (it) {
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struct amdgpu_mn_node *node;
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struct amdgpu_bo *bo;
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long r;
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node = container_of(it, struct amdgpu_mn_node, it);
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it = interval_tree_iter_next(it, start, end);
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list_for_each_entry(bo, &node->bos, mn_list) {
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if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start,
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end))
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continue;
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r = amdgpu_bo_reserve(bo, true);
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if (r) {
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DRM_ERROR("(%ld) failed to reserve user bo\n", r);
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continue;
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}
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r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
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true, false, MAX_SCHEDULE_TIMEOUT);
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if (r <= 0)
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DRM_ERROR("(%ld) failed to wait for user bo\n", r);
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amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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if (r)
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DRM_ERROR("(%ld) failed to validate user bo\n", r);
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amdgpu_bo_unreserve(bo);
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}
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amdgpu_mn_invalidate_node(node, start, end);
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}
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mutex_unlock(&rmn->lock);
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}
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static const struct mmu_notifier_ops amdgpu_mn_ops = {
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.release = amdgpu_mn_release,
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.invalidate_page = amdgpu_mn_invalidate_page,
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.invalidate_range_start = amdgpu_mn_invalidate_range_start,
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};
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@ -196,6 +247,7 @@ static struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev)
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rmn->adev = adev;
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rmn->mm = mm;
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rmn->mn.ops = &amdgpu_mn_ops;
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mutex_init(&rmn->lock);
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rmn->objects = RB_ROOT;
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r = __mmu_notifier_register(&rmn->mn, mm);
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@ -242,7 +294,7 @@ int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
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INIT_LIST_HEAD(&bos);
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down_write(&rmn->mm->mmap_sem);
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mutex_lock(&rmn->lock);
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while ((it = interval_tree_iter_first(&rmn->objects, addr, end))) {
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kfree(node);
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@ -256,7 +308,7 @@ int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
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if (!node) {
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node = kmalloc(sizeof(struct amdgpu_mn_node), GFP_KERNEL);
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if (!node) {
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up_write(&rmn->mm->mmap_sem);
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mutex_unlock(&rmn->lock);
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return -ENOMEM;
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}
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}
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@ -271,7 +323,7 @@ int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
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interval_tree_insert(&node->it, &rmn->objects);
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up_write(&rmn->mm->mmap_sem);
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mutex_unlock(&rmn->lock);
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return 0;
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}
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@ -297,7 +349,7 @@ void amdgpu_mn_unregister(struct amdgpu_bo *bo)
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return;
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}
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down_write(&rmn->mm->mmap_sem);
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mutex_lock(&rmn->lock);
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/* save the next list entry for later */
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head = bo->mn_list.next;
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@ -312,6 +364,6 @@ void amdgpu_mn_unregister(struct amdgpu_bo *bo)
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kfree(node);
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}
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up_write(&rmn->mm->mmap_sem);
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mutex_unlock(&rmn->lock);
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mutex_unlock(&adev->mn_lock);
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}
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@ -1,17 +1,17 @@
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subdir-ccflags-y += -Iinclude/drm \
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-Idrivers/gpu/drm/amd/powerplay/inc/ \
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-Idrivers/gpu/drm/amd/include/asic_reg \
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-Idrivers/gpu/drm/amd/include \
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-Idrivers/gpu/drm/amd/powerplay/smumgr\
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-Idrivers/gpu/drm/amd/powerplay/hwmgr \
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-Idrivers/gpu/drm/amd/powerplay/eventmgr
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-I$(FULL_AMD_PATH)/powerplay/inc/ \
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-I$(FULL_AMD_PATH)/include/asic_reg \
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-I$(FULL_AMD_PATH)/include \
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-I$(FULL_AMD_PATH)/powerplay/smumgr\
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-I$(FULL_AMD_PATH)/powerplay/hwmgr \
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-I$(FULL_AMD_PATH)/powerplay/eventmgr
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AMD_PP_PATH = ../powerplay
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PP_LIBS = smumgr hwmgr eventmgr
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AMD_POWERPLAY = $(addsuffix /Makefile,$(addprefix drivers/gpu/drm/amd/powerplay/,$(PP_LIBS)))
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AMD_POWERPLAY = $(addsuffix /Makefile,$(addprefix $(FULL_AMD_PATH)/powerplay/,$(PP_LIBS)))
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include $(AMD_POWERPLAY)
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@ -512,8 +512,10 @@ static int get_cac_tdp_table(
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hwmgr->dyn_state.cac_dtp_table = kzalloc(table_size, GFP_KERNEL);
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if (NULL == hwmgr->dyn_state.cac_dtp_table)
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if (NULL == hwmgr->dyn_state.cac_dtp_table) {
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kfree(tdp_table);
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return -ENOMEM;
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}
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memset(hwmgr->dyn_state.cac_dtp_table, 0x00, table_size);
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@ -510,6 +510,7 @@ static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
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{
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struct radeon_encoder_mst *mst_enc;
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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struct radeon_connector_atom_dig *dig_connector;
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int bpp = 24;
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mst_enc = radeon_encoder->enc_priv;
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@ -523,22 +524,11 @@ static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
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drm_mode_set_crtcinfo(adjusted_mode, 0);
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{
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struct radeon_connector_atom_dig *dig_connector;
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int ret;
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dig_connector = mst_enc->connector->con_priv;
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ret = radeon_dp_get_dp_link_config(&mst_enc->connector->base,
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dig_connector->dpcd, adjusted_mode->clock,
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&dig_connector->dp_lane_count,
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&dig_connector->dp_clock);
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if (ret) {
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dig_connector->dp_lane_count = 0;
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dig_connector->dp_clock = 0;
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}
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DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector,
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dig_connector->dp_lane_count, dig_connector->dp_clock);
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}
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dig_connector = mst_enc->connector->con_priv;
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dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd);
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dig_connector->dp_clock = drm_dp_max_link_rate(dig_connector->dpcd);
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DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector,
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dig_connector->dp_lane_count, dig_connector->dp_clock);
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return true;
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}
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