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[SCSI] tmscsim: remove bogus endianness conversions 

cpu_to_le32 endianness conversions in tmscsim.c, followed by
arithmetic operations don't look correct. Besides, {in,out}[wl]
already perform the necessary conversions. Further, bus addresses
of request buffers are guaranteed to be (mapped) under 4G by
current scsi- and block-layer defaults. This could be explicitly
enforced by using blk_queue_bounce_limit(), which, however,
doesn't seem to be the common practice among SCSI drivers.

Signed-off-by: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
This commit is contained in:
Guennadi Liakhovetski 2007-05-04 22:59:40 +02:00 committed by James Bottomley
parent 860bfecf71
commit 46e5ba2b64
2 changed files with 17 additions and 22 deletions
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27
drivers/scsi/tmscsim.c
View File

@ -778,8 +778,8 @@ dc390_DataOut_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
pSRB->pSegmentList++;
psgl = pSRB->pSegmentList;
pSRB->SGBusAddr = cpu_to_le32(pci_dma_lo32(sg_dma_address(psgl)));
pSRB->SGToBeXferLen = cpu_to_le32(sg_dma_len(psgl));
pSRB->SGBusAddr = sg_dma_address(psgl);
pSRB->SGToBeXferLen = sg_dma_len(psgl);
}
else
pSRB->SGToBeXferLen = 0;
@ -842,7 +842,7 @@ dc390_DataIn_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
DEBUG1(ResidCnt = ((unsigned long) DC390_read8 (CtcReg_High) << 16) \
+ ((unsigned long) DC390_read8 (CtcReg_Mid) << 8) \
+ ((unsigned long) DC390_read8 (CtcReg_Low)));
DEBUG1(printk (KERN_DEBUG "Count_2_Zero (ResidCnt=%i,ToBeXfer=%li),", ResidCnt, pSRB->SGToBeXferLen));
DEBUG1(printk (KERN_DEBUG "Count_2_Zero (ResidCnt=%u,ToBeXfer=%lu),", ResidCnt, pSRB->SGToBeXferLen));
DC390_write8 (DMA_Cmd, READ_DIRECTION+DMA_IDLE_CMD);
@ -853,8 +853,8 @@ dc390_DataIn_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
pSRB->pSegmentList++;
psgl = pSRB->pSegmentList;
pSRB->SGBusAddr = cpu_to_le32(pci_dma_lo32(sg_dma_address(psgl)));
pSRB->SGToBeXferLen = cpu_to_le32(sg_dma_len(psgl));
pSRB->SGBusAddr = sg_dma_address(psgl);
pSRB->SGToBeXferLen = sg_dma_len(psgl);
}
else
pSRB->SGToBeXferLen = 0;
@ -921,11 +921,12 @@ dc390_DataIn_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
ptr = (u8 *) bus_to_virt( pSRB->SGBusAddr );
*ptr = bval;
pSRB->SGBusAddr++; xferCnt++;
pSRB->SGBusAddr++;
xferCnt++;
pSRB->TotalXferredLen++;
pSRB->SGToBeXferLen--;
}
DEBUG1(printk (KERN_DEBUG "Xfered: %li, Total: %li, Remaining: %li\n", xferCnt,\
DEBUG1(printk (KERN_DEBUG "Xfered: %lu, Total: %lu, Remaining: %lu\n", xferCnt,\
pSRB->TotalXferredLen, pSRB->SGToBeXferLen));
}
@ -1157,14 +1158,14 @@ dc390_restore_ptr (struct dc390_acb* pACB, struct dc390_srb* pSRB)
{
pSRB->pSegmentList++;
psgl = pSRB->pSegmentList;
pSRB->SGBusAddr = cpu_to_le32(pci_dma_lo32(sg_dma_address(psgl)));
pSRB->SGToBeXferLen = cpu_to_le32(sg_dma_len(psgl));
pSRB->SGBusAddr = sg_dma_address(psgl);
pSRB->SGToBeXferLen = sg_dma_len(psgl);
}
else
pSRB->SGToBeXferLen = 0;
}
pSRB->SGToBeXferLen -= (pSRB->Saved_Ptr - pSRB->TotalXferredLen);
pSRB->SGBusAddr += (pSRB->Saved_Ptr - pSRB->TotalXferredLen);
pSRB->SGToBeXferLen -= pSRB->Saved_Ptr - pSRB->TotalXferredLen;
pSRB->SGBusAddr += pSRB->Saved_Ptr - pSRB->TotalXferredLen;
printk (KERN_INFO "DC390: Pointer restored. Segment %i, Total %li, Bus %08lx\n",
pSRB->SGIndex, pSRB->Saved_Ptr, pSRB->SGBusAddr);
@ -1315,8 +1316,8 @@ dc390_DataIO_Comm( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 ioDir)
if( !pSRB->SGToBeXferLen )
{
psgl = pSRB->pSegmentList;
pSRB->SGBusAddr = cpu_to_le32(pci_dma_lo32(sg_dma_address(psgl)));
pSRB->SGToBeXferLen = cpu_to_le32(sg_dma_len(psgl));
pSRB->SGBusAddr = sg_dma_address(psgl);
pSRB->SGToBeXferLen = sg_dma_len(psgl);
DEBUG1(printk (KERN_DEBUG " DC390: Next SG segment."));
}
lval = pSRB->SGToBeXferLen;

12
drivers/scsi/tmscsim.h
View File

@ -19,14 +19,6 @@
#define SEL_TIMEOUT 153 /* 250 ms selection timeout (@ 40 MHz) */
#define pci_dma_lo32(a) (a & 0xffffffff)
typedef u8 UCHAR; /* 8 bits */
typedef u16 USHORT; /* 16 bits */
typedef u32 UINT; /* 32 bits */
typedef unsigned long ULONG; /* 32/64 bits */
/*
;-----------------------------------------------------------------------
; SCSI Request Block
@ -43,7 +35,9 @@ struct scatterlist *pSegmentList;
struct scatterlist Segmentx; /* make a one entry of S/G list table */
unsigned long SGBusAddr; /*;a segment starting address as seen by AM53C974A*/
unsigned long SGBusAddr; /*;a segment starting address as seen by AM53C974A
in CPU endianness. We're only getting 32-bit bus
addresses by default */
unsigned long SGToBeXferLen; /*; to be xfer length */
unsigned long TotalXferredLen;
unsigned long SavedTotXLen;