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dt-bindings: reset: meson8b: fix duplicate reset IDs 

According to the public S805 datasheet the RESET2 register uses the
following bits for the PIC_DC, PSC and NAND reset lines:
- PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3)
- PSC is at bit 4 (meaning: RESET_VD_RMEM + 4)
- NAND is at bit 5 (meaning: RESET_VD_RMEM + 4)

Update the reset IDs of these three reset lines so they don't conflict
with PIC_DC and map to the actual hardware reset lines.

Fixes: 79795e20a1 ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Martin Blumenstingl 2019-11-30 19:53:37 +01:00 committed by Kevin Hilman
parent c67aafd60d
commit 4881873f4c
1 changed files with 3 additions and 3 deletions
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6
include/dt-bindings/reset/amlogic,meson8b-reset.h
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@ -46,9 +46,9 @@
#define RESET_VD_RMEM 64
#define RESET_AUDIN 65
#define RESET_DBLK 66
#define RESET_PIC_DC 66
#define RESET_PSC 66
#define RESET_NAND 66
#define RESET_PIC_DC 67
#define RESET_PSC 68
#define RESET_NAND 69
#define RESET_GE2D 70
#define RESET_PARSER_REG 71
#define RESET_PARSER_FETCH 72