mirror of https://gitee.com/openkylin/linux.git
ARMv8 Juno update for v5.5
Single patch to add support for Mali GPU on all versions of Juno. Though it's disabled by default, it is very useful to test panfrost drivers. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAl22ZX8ACgkQAEG6vDF+ 4piRLQ//cZ6Gq/ZoE7ebmyQxooY0tnmfAyq6cZgGqR6DZUKvZLnShSAnUt/ojMWO P8Ske10LkRU4yRjjkUhjELho5vMvz2TVTlZ5xX95Yto9+IbAIfox9XnwCp0amznx B4VgksPf74SOKPKACaKX5xMZHURvOdWd0k/rV7XpS4WLnmRLkYC5XPvj/dU1Ycp1 4fV55NU5DQ0kCqkY9eRJn4RPHLlEloakvmvNgYblYPD3jC4DuGt+y80PURGuN7b0 +fWNQpRVMRZRm7nocvpj64PMWJispRrFboJxv+Gu+IH3R/NBn7uZL9pGRUCP3ibh LKaQXsCz3rq4gq9FqtDaykMco82x1U8DPjfjyqukk0eYn1h1Yq60iJeAacgieAiM xPK1AZGmUiPSa4IXGnHmYnEvyukZxPQr6ZPmw4n6Fkx8Z1ycPkuehkZ7RQncIpPS VhBl1voS1l89EWDcm+vrJWr/RhHGQ2b3NicsOLwtmdtQcJYbakgJw1/QlFkw+FfP GpZJU2Yww04ErBuF+jiMOfaYGKV62qZj0CTuKIUdbEeKLMJpuANE/mZopCDLYURY Hz5QPmpm6VhLLHPZa3zzOOShlcOLHqpY8QssdMKjUBHu//UgrtlJJNZAgiodqAgo TIZK0yttqC4O1yq96Z3gY0y3COapLQsBiJSgtcjn7S8IZ7zci10= =W+dh -----END PGP SIGNATURE----- Merge tag 'juno-update-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt ARMv8 Juno update for v5.5 Single patch to add support for Mali GPU on all versions of Juno. Though it's disabled by default, it is very useful to test panfrost drivers. * tag 'juno-update-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: add GPU subsystem Link: https://lore.kernel.org/r/20191028040022.GC20568@e107533-lin.cambridge.arm.com Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
49067a8a6f
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@ -22,6 +22,10 @@ properties:
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- enum:
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- amlogic,meson-gxm-mali
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- const: arm,mali-t820
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- items:
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- enum:
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- arm,juno-mali
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- const: arm,mali-t624
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- items:
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- enum:
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- rockchip,rk3288-mali
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@ -39,7 +43,6 @@ properties:
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- samsung,exynos5433-mali
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- const: arm,mali-t760
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# "arm,mali-t624"
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# "arm,mali-t628"
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# "arm,mali-t830"
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# "arm,mali-t880"
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@ -35,6 +35,18 @@ mailbox: mhu@2b1f0000 {
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clock-names = "apb_pclk";
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};
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smmu_gpu: iommu@2b400000 {
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compatible = "arm,mmu-400", "arm,smmu-v1";
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reg = <0x0 0x2b400000 0x0 0x10000>;
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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#global-interrupts = <1>;
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power-domains = <&scpi_devpd 1>;
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dma-coherent;
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status = "disabled";
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};
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smmu_pcie: iommu@2b500000 {
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compatible = "arm,mmu-401", "arm,smmu-v1";
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reg = <0x0 0x2b500000 0x0 0x10000>;
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@ -487,6 +499,21 @@ cluster1_etm3_out_port: endpoint {
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};
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};
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gpu: gpu@2d000000 {
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compatible = "arm,juno-mali", "arm,mali-t624";
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reg = <0 0x2d000000 0 0x10000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "gpu", "job", "mmu";
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clocks = <&scpi_dvfs 2>;
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power-domains = <&scpi_devpd 1>;
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dma-coherent;
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/* The SMMU is only really of interest to bare-metal hypervisors */
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/* iommus = <&smmu_gpu 0>; */
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status = "disabled";
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};
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sram: sram@2e000000 {
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compatible = "arm,juno-sram-ns", "mmio-sram";
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reg = <0x0 0x2e000000 0x0 0x8000>;
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