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MIPS: TXx9: Default machine_restart using watchdog reset 

Add default machine_restart routine using watchdog reset of TX4927 and
TX4938.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Atsushi Nemoto 2008-08-19 22:55:15 +09:00 committed by Ralf Baechle
parent d75a40e90e
commit 496a3b5c2c
4 changed files with 72 additions and 0 deletions
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15
arch/mips/txx9/generic/setup.c
View File

@ -29,6 +29,7 @@
#include <asm/r4kcache.h>
#include <asm/txx9/generic.h>
#include <asm/txx9/pci.h>
#include <asm/txx9tmr.h>
#ifdef CONFIG_CPU_TX49XX
#include <asm/txx9/tx4938.h>
#endif
@ -444,6 +445,20 @@ void __init txx9_wdt_init(unsigned long base)
platform_device_register_simple("txx9wdt", -1, &res, 1);
}
void txx9_wdt_now(unsigned long base)
{
struct txx9_tmr_reg __iomem *tmrptr =
ioremap(base, sizeof(struct txx9_tmr_reg));
/* disable watch dog timer */
__raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
__raw_writel(0, &tmrptr->tcr);
/* kick watchdog */
__raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
__raw_writel(1, &tmrptr->cpra); /* immediate */
__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
&tmrptr->tcr);
}
/* SPI support */
void __init txx9_spi_init(int busid, unsigned long base, int irq)
{

28
arch/mips/txx9/generic/setup_tx4927.c
View File

@ -15,6 +15,7 @@
#include <linux/delay.h>
#include <linux/param.h>
#include <linux/mtd/physmap.h>
#include <asm/reboot.h>
#include <asm/txx9irq.h>
#include <asm/txx9tmr.h>
#include <asm/txx9pio.h>
@ -23,6 +24,10 @@
static void __init tx4927_wdr_init(void)
{
/* report watchdog reset status */
if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST)
pr_warning("Watchdog reset detected at 0x%lx\n",
read_c0_errorepc());
/* clear WatchDogReset (W1C) */
tx4927_ccfg_set(TX4927_CCFG_WDRST);
/* do reset on watchdog */
@ -34,6 +39,27 @@ void __init tx4927_wdt_init(void)
txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
}
static void tx4927_machine_restart(char *command)
{
local_irq_disable();
pr_emerg("Rebooting (with %s watchdog reset)...\n",
(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) ?
"external" : "internal");
/* clear watchdog status */
tx4927_ccfg_set(TX4927_CCFG_WDRST); /* W1C */
txx9_wdt_now(TX4927_TMR_REG(2) & 0xfffffffffULL);
while (!(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST))
;
mdelay(10);
if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) {
pr_emerg("Rebooting (with internal watchdog reset)...\n");
/* External WDRST failed. Do internal watchdog reset */
tx4927_ccfg_clear(TX4927_CCFG_WDREXEN);
}
/* fallback */
(*_machine_halt)();
}
static struct resource tx4927_sdram_resource[4];
void __init tx4927_setup(void)
@ -169,6 +195,8 @@ void __init tx4927_setup(void)
txx9_gpio_init(TX4927_PIO_REG & 0xfffffffffULL, 0, TX4927_NUM_PIO);
__raw_writel(0, &tx4927_pioptr->maskcpu);
__raw_writel(0, &tx4927_pioptr->maskext);
_machine_restart = tx4927_machine_restart;
}
void __init tx4927_time_init(unsigned int tmrnr)

28
arch/mips/txx9/generic/setup_tx4938.c
View File

@ -15,6 +15,7 @@
#include <linux/delay.h>
#include <linux/param.h>
#include <linux/mtd/physmap.h>
#include <asm/reboot.h>
#include <asm/txx9irq.h>
#include <asm/txx9tmr.h>
#include <asm/txx9pio.h>
@ -23,6 +24,10 @@
static void __init tx4938_wdr_init(void)
{
/* report watchdog reset status */
if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST)
pr_warning("Watchdog reset detected at 0x%lx\n",
read_c0_errorepc());
/* clear WatchDogReset (W1C) */
tx4938_ccfg_set(TX4938_CCFG_WDRST);
/* do reset on watchdog */
@ -34,6 +39,27 @@ void __init tx4938_wdt_init(void)
txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
}
static void tx4938_machine_restart(char *command)
{
local_irq_disable();
pr_emerg("Rebooting (with %s watchdog reset)...\n",
(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) ?
"external" : "internal");
/* clear watchdog status */
tx4938_ccfg_set(TX4938_CCFG_WDRST); /* W1C */
txx9_wdt_now(TX4938_TMR_REG(2) & 0xfffffffffULL);
while (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST))
;
mdelay(10);
if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) {
pr_emerg("Rebooting (with internal watchdog reset)...\n");
/* External WDRST failed. Do internal watchdog reset */
tx4938_ccfg_clear(TX4938_CCFG_WDREXEN);
}
/* fallback */
(*_machine_halt)();
}
static struct resource tx4938_sdram_resource[4];
static struct resource tx4938_sram_resource;
@ -229,6 +255,8 @@ void __init tx4938_setup(void)
TX4938_CLKCTR_ETH1CKD);
}
}
_machine_restart = tx4938_machine_restart;
}
void __init tx4938_time_init(unsigned int tmrnr)

1
include/asm-mips/txx9/generic.h
View File

@ -45,6 +45,7 @@ extern int (*txx9_irq_dispatch)(int pending);
char *prom_getcmdline(void);
const char *prom_getenv(const char *name);
void txx9_wdt_init(unsigned long base);
void txx9_wdt_now(unsigned long base);
void txx9_spi_init(int busid, unsigned long base, int irq);
void txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr);
void txx9_sio_init(unsigned long baseaddr, int irq,