mirror of https://gitee.com/openkylin/linux.git
mlxsw: reg: Share direction enum between SBPR, SBCM, SBPM
Same field, same values, so share the same enum. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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b2f10571b9
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497e8592c6
drivers/net/ethernet/mellanox/mlxsw
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@ -3476,9 +3476,10 @@ static const struct mlxsw_reg_info mlxsw_reg_sbpr = {
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.len = MLXSW_REG_SBPR_LEN,
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.len = MLXSW_REG_SBPR_LEN,
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};
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};
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enum mlxsw_reg_sbpr_dir {
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/* shared direstion enum for SBPR, SBCM, SBPM */
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MLXSW_REG_SBPR_DIR_INGRESS,
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enum mlxsw_reg_sbxx_dir {
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MLXSW_REG_SBPR_DIR_EGRESS,
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MLXSW_REG_SBXX_DIR_INGRESS,
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MLXSW_REG_SBXX_DIR_EGRESS,
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};
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};
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/* reg_sbpr_dir
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/* reg_sbpr_dir
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@ -3511,7 +3512,7 @@ enum mlxsw_reg_sbpr_mode {
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MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4);
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MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4);
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static inline void mlxsw_reg_sbpr_pack(char *payload, u8 pool,
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static inline void mlxsw_reg_sbpr_pack(char *payload, u8 pool,
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enum mlxsw_reg_sbpr_dir dir,
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enum mlxsw_reg_sbxx_dir dir,
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enum mlxsw_reg_sbpr_mode mode, u32 size)
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enum mlxsw_reg_sbpr_mode mode, u32 size)
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{
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{
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MLXSW_REG_ZERO(sbpr, payload);
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MLXSW_REG_ZERO(sbpr, payload);
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@ -3553,11 +3554,6 @@ MLXSW_ITEM32(reg, sbcm, local_port, 0x00, 16, 8);
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*/
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*/
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MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
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MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
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enum mlxsw_reg_sbcm_dir {
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MLXSW_REG_SBCM_DIR_INGRESS,
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MLXSW_REG_SBCM_DIR_EGRESS,
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};
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/* reg_sbcm_dir
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/* reg_sbcm_dir
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* Direction.
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* Direction.
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* Access: Index
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* Access: Index
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@ -3590,7 +3586,7 @@ MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24);
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MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
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MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
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static inline void mlxsw_reg_sbcm_pack(char *payload, u8 local_port, u8 pg_buff,
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static inline void mlxsw_reg_sbcm_pack(char *payload, u8 local_port, u8 pg_buff,
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enum mlxsw_reg_sbcm_dir dir,
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enum mlxsw_reg_sbxx_dir dir,
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u32 min_buff, u32 max_buff, u8 pool)
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u32 min_buff, u32 max_buff, u8 pool)
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{
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{
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MLXSW_REG_ZERO(sbcm, payload);
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MLXSW_REG_ZERO(sbcm, payload);
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@ -3630,11 +3626,6 @@ MLXSW_ITEM32(reg, sbpm, local_port, 0x00, 16, 8);
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*/
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*/
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MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
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MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
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enum mlxsw_reg_sbpm_dir {
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MLXSW_REG_SBPM_DIR_INGRESS,
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MLXSW_REG_SBPM_DIR_EGRESS,
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};
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/* reg_sbpm_dir
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/* reg_sbpm_dir
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* Direction.
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* Direction.
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* Access: Index
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* Access: Index
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@ -3661,7 +3652,7 @@ MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24);
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MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
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MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
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static inline void mlxsw_reg_sbpm_pack(char *payload, u8 local_port, u8 pool,
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static inline void mlxsw_reg_sbpm_pack(char *payload, u8 local_port, u8 pool,
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enum mlxsw_reg_sbpm_dir dir,
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enum mlxsw_reg_sbxx_dir dir,
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u32 min_buff, u32 max_buff)
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u32 min_buff, u32 max_buff)
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{
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{
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MLXSW_REG_ZERO(sbpm, payload);
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MLXSW_REG_ZERO(sbpm, payload);
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@ -110,7 +110,7 @@ static int mlxsw_sp_port_headroom_init(struct mlxsw_sp_port *mlxsw_sp_port)
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struct mlxsw_sp_sb_pool {
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struct mlxsw_sp_sb_pool {
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u8 pool;
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u8 pool;
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enum mlxsw_reg_sbpr_dir dir;
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enum mlxsw_reg_sbxx_dir dir;
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enum mlxsw_reg_sbpr_mode mode;
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enum mlxsw_reg_sbpr_mode mode;
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u32 size;
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u32 size;
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};
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};
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@ -129,11 +129,11 @@ struct mlxsw_sp_sb_pool {
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}
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}
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#define MLXSW_SP_SB_POOL_INGRESS(_pool, _size) \
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#define MLXSW_SP_SB_POOL_INGRESS(_pool, _size) \
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MLXSW_SP_SB_POOL(_pool, MLXSW_REG_SBPR_DIR_INGRESS, \
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MLXSW_SP_SB_POOL(_pool, MLXSW_REG_SBXX_DIR_INGRESS, \
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MLXSW_REG_SBPR_MODE_DYNAMIC, _size)
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MLXSW_REG_SBPR_MODE_DYNAMIC, _size)
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#define MLXSW_SP_SB_POOL_EGRESS(_pool, _size) \
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#define MLXSW_SP_SB_POOL_EGRESS(_pool, _size) \
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MLXSW_SP_SB_POOL(_pool, MLXSW_REG_SBPR_DIR_EGRESS, \
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MLXSW_SP_SB_POOL(_pool, MLXSW_REG_SBXX_DIR_EGRESS, \
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MLXSW_REG_SBPR_MODE_DYNAMIC, _size)
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MLXSW_REG_SBPR_MODE_DYNAMIC, _size)
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static const struct mlxsw_sp_sb_pool mlxsw_sp_sb_pools[] = {
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static const struct mlxsw_sp_sb_pool mlxsw_sp_sb_pools[] = {
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@ -173,7 +173,7 @@ struct mlxsw_sp_sb_cm {
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u8 pg;
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u8 pg;
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u8 tc;
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u8 tc;
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} u;
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} u;
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enum mlxsw_reg_sbcm_dir dir;
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enum mlxsw_reg_sbxx_dir dir;
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u32 min_buff;
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u32 min_buff;
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u32 max_buff;
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u32 max_buff;
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u8 pool;
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u8 pool;
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@ -189,15 +189,15 @@ struct mlxsw_sp_sb_cm {
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}
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}
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#define MLXSW_SP_SB_CM_INGRESS(_pg, _min_buff, _max_buff) \
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#define MLXSW_SP_SB_CM_INGRESS(_pg, _min_buff, _max_buff) \
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MLXSW_SP_SB_CM(_pg, MLXSW_REG_SBCM_DIR_INGRESS, \
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MLXSW_SP_SB_CM(_pg, MLXSW_REG_SBXX_DIR_INGRESS, \
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_min_buff, _max_buff, 0)
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_min_buff, _max_buff, 0)
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#define MLXSW_SP_SB_CM_EGRESS(_tc, _min_buff, _max_buff) \
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#define MLXSW_SP_SB_CM_EGRESS(_tc, _min_buff, _max_buff) \
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MLXSW_SP_SB_CM(_tc, MLXSW_REG_SBCM_DIR_EGRESS, \
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MLXSW_SP_SB_CM(_tc, MLXSW_REG_SBXX_DIR_EGRESS, \
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_min_buff, _max_buff, 0)
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_min_buff, _max_buff, 0)
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#define MLXSW_SP_CPU_PORT_SB_CM_EGRESS(_tc) \
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#define MLXSW_SP_CPU_PORT_SB_CM_EGRESS(_tc) \
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MLXSW_SP_SB_CM(_tc, MLXSW_REG_SBCM_DIR_EGRESS, 104, 2, 3)
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MLXSW_SP_SB_CM(_tc, MLXSW_REG_SBXX_DIR_EGRESS, 104, 2, 3)
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static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms[] = {
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static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms[] = {
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MLXSW_SP_SB_CM_INGRESS(0, MLXSW_SP_BYTES_TO_CELLS(10000), 8),
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MLXSW_SP_SB_CM_INGRESS(0, MLXSW_SP_BYTES_TO_CELLS(10000), 8),
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@ -304,7 +304,7 @@ static int mlxsw_sp_cpu_port_sb_cms_init(struct mlxsw_sp *mlxsw_sp)
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struct mlxsw_sp_sb_pm {
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struct mlxsw_sp_sb_pm {
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u8 pool;
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u8 pool;
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enum mlxsw_reg_sbpm_dir dir;
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enum mlxsw_reg_sbxx_dir dir;
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u32 min_buff;
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u32 min_buff;
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u32 max_buff;
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u32 max_buff;
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};
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};
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@ -318,11 +318,11 @@ struct mlxsw_sp_sb_pm {
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}
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}
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#define MLXSW_SP_SB_PM_INGRESS(_pool, _min_buff, _max_buff) \
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#define MLXSW_SP_SB_PM_INGRESS(_pool, _min_buff, _max_buff) \
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MLXSW_SP_SB_PM(_pool, MLXSW_REG_SBPM_DIR_INGRESS, \
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MLXSW_SP_SB_PM(_pool, MLXSW_REG_SBXX_DIR_INGRESS, \
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_min_buff, _max_buff)
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_min_buff, _max_buff)
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#define MLXSW_SP_SB_PM_EGRESS(_pool, _min_buff, _max_buff) \
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#define MLXSW_SP_SB_PM_EGRESS(_pool, _min_buff, _max_buff) \
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MLXSW_SP_SB_PM(_pool, MLXSW_REG_SBPM_DIR_EGRESS, \
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MLXSW_SP_SB_PM(_pool, MLXSW_REG_SBXX_DIR_EGRESS, \
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_min_buff, _max_buff)
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_min_buff, _max_buff)
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static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms[] = {
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static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms[] = {
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