mirror of https://gitee.com/openkylin/linux.git
ASoC: arizona: Improve handling of setting REFCLK to 0
This patch suppresses calculation of REFCLK parameters when the REFCLK source frequency is set to zero, additionally it will consider a source frequency of zero as the REFCLK being disabled and switch to using the SYNCCLK. Reported-by: Kyung Kwee Ryu <Kyung-Kwee.Ryu@wolfsonmicro.com> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -1477,21 +1477,25 @@ static void arizona_enable_fll(struct arizona_fll *fll,
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{
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{
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struct arizona *arizona = fll->arizona;
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struct arizona *arizona = fll->arizona;
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int ret;
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int ret;
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bool use_sync = false;
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/*
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/*
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* If we have both REFCLK and SYNCCLK then enable both,
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* If we have both REFCLK and SYNCCLK then enable both,
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* otherwise apply the SYNCCLK settings to REFCLK.
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* otherwise apply the SYNCCLK settings to REFCLK.
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*/
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*/
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if (fll->ref_src >= 0 && fll->ref_src != fll->sync_src) {
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if (fll->ref_src >= 0 && fll->ref_freq &&
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fll->ref_src != fll->sync_src) {
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regmap_update_bits(arizona->regmap, fll->base + 5,
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regmap_update_bits(arizona->regmap, fll->base + 5,
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ARIZONA_FLL1_OUTDIV_MASK,
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ARIZONA_FLL1_OUTDIV_MASK,
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ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
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ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
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arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,
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arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,
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false);
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false);
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if (fll->sync_src >= 0)
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if (fll->sync_src >= 0) {
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arizona_apply_fll(arizona, fll->base + 0x10, sync,
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arizona_apply_fll(arizona, fll->base + 0x10, sync,
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fll->sync_src, true);
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fll->sync_src, true);
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use_sync = true;
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}
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} else if (fll->sync_src >= 0) {
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} else if (fll->sync_src >= 0) {
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regmap_update_bits(arizona->regmap, fll->base + 5,
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regmap_update_bits(arizona->regmap, fll->base + 5,
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ARIZONA_FLL1_OUTDIV_MASK,
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ARIZONA_FLL1_OUTDIV_MASK,
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@ -1511,7 +1515,7 @@ static void arizona_enable_fll(struct arizona_fll *fll,
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* Increase the bandwidth if we're not using a low frequency
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* Increase the bandwidth if we're not using a low frequency
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* sync source.
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* sync source.
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*/
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*/
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if (fll->sync_src >= 0 && fll->sync_freq > 100000)
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if (use_sync && fll->sync_freq > 100000)
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regmap_update_bits(arizona->regmap, fll->base + 0x17,
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regmap_update_bits(arizona->regmap, fll->base + 0x17,
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ARIZONA_FLL1_SYNC_BW, 0);
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ARIZONA_FLL1_SYNC_BW, 0);
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else
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else
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@ -1526,8 +1530,7 @@ static void arizona_enable_fll(struct arizona_fll *fll,
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regmap_update_bits(arizona->regmap, fll->base + 1,
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regmap_update_bits(arizona->regmap, fll->base + 1,
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ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
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ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
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if (fll->ref_src >= 0 && fll->sync_src >= 0 &&
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if (use_sync)
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fll->ref_src != fll->sync_src)
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regmap_update_bits(arizona->regmap, fll->base + 0x11,
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regmap_update_bits(arizona->regmap, fll->base + 0x11,
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ARIZONA_FLL1_SYNC_ENA,
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ARIZONA_FLL1_SYNC_ENA,
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ARIZONA_FLL1_SYNC_ENA);
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ARIZONA_FLL1_SYNC_ENA);
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@ -1561,10 +1564,12 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
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if (fll->ref_src == source && fll->ref_freq == Fref)
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if (fll->ref_src == source && fll->ref_freq == Fref)
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return 0;
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return 0;
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if (fll->fout && Fref > 0) {
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if (fll->fout) {
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ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);
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if (Fref > 0) {
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if (ret != 0)
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ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);
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return ret;
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if (ret != 0)
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return ret;
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}
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if (fll->sync_src >= 0) {
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if (fll->sync_src >= 0) {
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ret = arizona_calc_fll(fll, &sync, fll->sync_freq,
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ret = arizona_calc_fll(fll, &sync, fll->sync_freq,
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