mirror of https://gitee.com/openkylin/linux.git
IB/mlx5: Add debug control parameters for congestion control
This patch adds debug control parameters for congestion control which can be read or written through debugfs. They are for reaction point and notification point nodes. These control parameters are as below: +------------------------------+-----------------------------------------+ | Name | Description | |------------------------------+-----------------------------------------| |rp_clamp_tgt_rate | When set target rate is updated to | | | current rate | |------------------------------+-----------------------------------------| |rp_clamp_tgt_rate_ati | When set update target rate based on | | | timer as well | |------------------------------+-----------------------------------------| |rp_time_reset | time between rate increase if no | | | CNP is received unit in usec | |------------------------------+-----------------------------------------| |rp_byte_reset | Number of bytes between rate inease if | | | no CNP is received | |------------------------------+-----------------------------------------| |rp_threshold | Threshold for reaction point rate | | | control | |------------------------------+-----------------------------------------| |rp_ai_rate | Rate for target rate, unit in Mbps | |------------------------------+-----------------------------------------| |rp_hai_rate | Rate for hyper increase state | | | unit in Mbps | |------------------------------+-----------------------------------------| |rp_min_dec_fac | Minimum factor by which the current | | | transmit rate can be changed when | | | processing a CNP, unit is percerntage | |------------------------------+-----------------------------------------| |rp_min_rate | Minimum value for rate limit, | | | unit in Mbps | |------------------------------+-----------------------------------------| |rp_rate_to_set_on_first_cnp | Rate that is set when first CNP is | | | received, unit is Mbps | |------------------------------+-----------------------------------------| |rp_dce_tcp_g | Used to calculate alpha | |------------------------------+-----------------------------------------| |rp_dce_tcp_rtt | Time between updates of alpha value, | | | unit is usec | |------------------------------+-----------------------------------------| |rp_rate_reduce_monitor_period | Minimum time between consecutive rate | | | reductions | |------------------------------+-----------------------------------------| |rp_initial_alpha_value | Initial value of alpha | |------------------------------+-----------------------------------------| |rp_gd | When CNP is received, flow rate is | | | reduced based on gd, rp_gd is given as | | | log2(rp_gd) | |------------------------------+-----------------------------------------| |np_cnp_dscp | dscp code point for generated cnp | |------------------------------+-----------------------------------------| |np_cnp_prio_mode | 802.1p priority for generated cnp | |------------------------------+-----------------------------------------| |np_cnp_prio | cnp priority mode | +------------------------------+-----------------------------------------+ Signed-off-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Daniel Jurgens <danielj@mellanox.com> Reviewed-by: Eli Cohen <eli@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Parav Pandit
Doug Ledford
parent
fd65f1b8ee
commit
4a2da0b8c0
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@ -1,4 +1,4 @@
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obj-$(CONFIG_MLX5_INFINIBAND) += mlx5_ib.o
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obj-$(CONFIG_MLX5_INFINIBAND) += mlx5_ib.o
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mlx5_ib-y := main.o cq.o doorbell.o qp.o mem.o srq.o mr.o ah.o mad.o gsi.o ib_virt.o cmd.o
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mlx5_ib-y := main.o cq.o doorbell.o qp.o mem.o srq.o mr.o ah.o mad.o gsi.o ib_virt.o cmd.o cong.o
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mlx5_ib-$(CONFIG_INFINIBAND_ON_DEMAND_PAGING) += odp.o
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mlx5_ib-$(CONFIG_INFINIBAND_ON_DEMAND_PAGING) += odp.o
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@ -57,3 +57,23 @@ int mlx5_cmd_query_cong_counter(struct mlx5_core_dev *dev,
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MLX5_SET(query_cong_statistics_in, in, clear, reset);
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MLX5_SET(query_cong_statistics_in, in, clear, reset);
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return mlx5_cmd_exec(dev, in, sizeof(in), out, out_size);
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return mlx5_cmd_exec(dev, in, sizeof(in), out, out_size);
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}
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}
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int mlx5_cmd_query_cong_params(struct mlx5_core_dev *dev, int cong_point,
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void *out, int out_size)
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{
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u32 in[MLX5_ST_SZ_DW(query_cong_params_in)] = { };
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MLX5_SET(query_cong_params_in, in, opcode,
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MLX5_CMD_OP_QUERY_CONG_PARAMS);
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MLX5_SET(query_cong_params_in, in, cong_protocol, cong_point);
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return mlx5_cmd_exec(dev, in, sizeof(in), out, out_size);
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}
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int mlx5_cmd_modify_cong_params(struct mlx5_core_dev *dev,
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void *in, int in_size)
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{
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u32 out[MLX5_ST_SZ_DW(modify_cong_params_out)] = { };
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return mlx5_cmd_exec(dev, in, in_size, out, sizeof(out));
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}
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@ -39,4 +39,8 @@
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int mlx5_cmd_null_mkey(struct mlx5_core_dev *dev, u32 *null_mkey);
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int mlx5_cmd_null_mkey(struct mlx5_core_dev *dev, u32 *null_mkey);
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int mlx5_cmd_query_cong_counter(struct mlx5_core_dev *dev,
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int mlx5_cmd_query_cong_counter(struct mlx5_core_dev *dev,
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bool reset, void *out, int out_size);
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bool reset, void *out, int out_size);
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int mlx5_cmd_query_cong_params(struct mlx5_core_dev *dev, int cong_point,
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void *out, int out_size);
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int mlx5_cmd_modify_cong_params(struct mlx5_core_dev *mdev,
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void *in, int in_size);
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#endif /* MLX5_IB_CMD_H */
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#endif /* MLX5_IB_CMD_H */
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@ -0,0 +1,421 @@
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/*
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* Copyright (c) 2013-2017, Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/debugfs.h>
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#include "mlx5_ib.h"
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#include "cmd.h"
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enum mlx5_ib_cong_node_type {
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MLX5_IB_RROCE_ECN_RP = 1,
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MLX5_IB_RROCE_ECN_NP = 2,
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};
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static const char * const mlx5_ib_dbg_cc_name[] = {
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"rp_clamp_tgt_rate",
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"rp_clamp_tgt_rate_ati",
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"rp_time_reset",
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"rp_byte_reset",
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"rp_threshold",
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"rp_ai_rate",
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"rp_hai_rate",
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"rp_min_dec_fac",
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"rp_min_rate",
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"rp_rate_to_set_on_first_cnp",
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"rp_dce_tcp_g",
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"rp_dce_tcp_rtt",
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"rp_rate_reduce_monitor_period",
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"rp_initial_alpha_value",
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"rp_gd",
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"np_cnp_dscp",
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"np_cnp_prio_mode",
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"np_cnp_prio",
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};
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#define MLX5_IB_RP_CLAMP_TGT_RATE_ATTR BIT(1)
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#define MLX5_IB_RP_CLAMP_TGT_RATE_ATI_ATTR BIT(2)
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#define MLX5_IB_RP_TIME_RESET_ATTR BIT(3)
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#define MLX5_IB_RP_BYTE_RESET_ATTR BIT(4)
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#define MLX5_IB_RP_THRESHOLD_ATTR BIT(5)
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#define MLX5_IB_RP_AI_RATE_ATTR BIT(7)
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#define MLX5_IB_RP_HAI_RATE_ATTR BIT(8)
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#define MLX5_IB_RP_MIN_DEC_FAC_ATTR BIT(9)
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#define MLX5_IB_RP_MIN_RATE_ATTR BIT(10)
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#define MLX5_IB_RP_RATE_TO_SET_ON_FIRST_CNP_ATTR BIT(11)
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#define MLX5_IB_RP_DCE_TCP_G_ATTR BIT(12)
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#define MLX5_IB_RP_DCE_TCP_RTT_ATTR BIT(13)
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#define MLX5_IB_RP_RATE_REDUCE_MONITOR_PERIOD_ATTR BIT(14)
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#define MLX5_IB_RP_INITIAL_ALPHA_VALUE_ATTR BIT(15)
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#define MLX5_IB_RP_GD_ATTR BIT(16)
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#define MLX5_IB_NP_CNP_DSCP_ATTR BIT(3)
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#define MLX5_IB_NP_CNP_PRIO_MODE_ATTR BIT(4)
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static enum mlx5_ib_cong_node_type
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mlx5_ib_param_to_node(enum mlx5_ib_dbg_cc_types param_offset)
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{
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if (param_offset >= MLX5_IB_DBG_CC_RP_CLAMP_TGT_RATE &&
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param_offset <= MLX5_IB_DBG_CC_RP_GD)
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return MLX5_IB_RROCE_ECN_RP;
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else
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return MLX5_IB_RROCE_ECN_NP;
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}
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static u32 mlx5_get_cc_param_val(void *field, int offset)
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{
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switch (offset) {
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case MLX5_IB_DBG_CC_RP_CLAMP_TGT_RATE:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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clamp_tgt_rate);
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case MLX5_IB_DBG_CC_RP_CLAMP_TGT_RATE_ATI:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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clamp_tgt_rate_after_time_inc);
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case MLX5_IB_DBG_CC_RP_TIME_RESET:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rpg_time_reset);
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case MLX5_IB_DBG_CC_RP_BYTE_RESET:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rpg_byte_reset);
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case MLX5_IB_DBG_CC_RP_THRESHOLD:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rpg_threshold);
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case MLX5_IB_DBG_CC_RP_AI_RATE:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rpg_ai_rate);
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case MLX5_IB_DBG_CC_RP_HAI_RATE:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rpg_hai_rate);
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case MLX5_IB_DBG_CC_RP_MIN_DEC_FAC:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rpg_min_dec_fac);
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case MLX5_IB_DBG_CC_RP_MIN_RATE:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rpg_min_rate);
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case MLX5_IB_DBG_CC_RP_RATE_TO_SET_ON_FIRST_CNP:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rate_to_set_on_first_cnp);
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case MLX5_IB_DBG_CC_RP_DCE_TCP_G:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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dce_tcp_g);
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case MLX5_IB_DBG_CC_RP_DCE_TCP_RTT:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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dce_tcp_rtt);
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case MLX5_IB_DBG_CC_RP_RATE_REDUCE_MONITOR_PERIOD:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rate_reduce_monitor_period);
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case MLX5_IB_DBG_CC_RP_INITIAL_ALPHA_VALUE:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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initial_alpha_value);
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case MLX5_IB_DBG_CC_RP_GD:
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return MLX5_GET(cong_control_r_roce_ecn_rp, field,
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rpg_gd);
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case MLX5_IB_DBG_CC_NP_CNP_DSCP:
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return MLX5_GET(cong_control_r_roce_ecn_np, field,
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cnp_dscp);
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case MLX5_IB_DBG_CC_NP_CNP_PRIO_MODE:
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return MLX5_GET(cong_control_r_roce_ecn_np, field,
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cnp_prio_mode);
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case MLX5_IB_DBG_CC_NP_CNP_PRIO:
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return MLX5_GET(cong_control_r_roce_ecn_np, field,
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cnp_802p_prio);
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default:
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return 0;
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}
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}
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static void mlx5_ib_set_cc_param_mask_val(void *field, int offset,
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u32 var, u32 *attr_mask)
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{
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switch (offset) {
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case MLX5_IB_DBG_CC_RP_CLAMP_TGT_RATE:
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*attr_mask |= MLX5_IB_RP_CLAMP_TGT_RATE_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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clamp_tgt_rate, var);
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break;
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case MLX5_IB_DBG_CC_RP_CLAMP_TGT_RATE_ATI:
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*attr_mask |= MLX5_IB_RP_CLAMP_TGT_RATE_ATI_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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clamp_tgt_rate_after_time_inc, var);
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break;
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case MLX5_IB_DBG_CC_RP_TIME_RESET:
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*attr_mask |= MLX5_IB_RP_TIME_RESET_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rpg_time_reset, var);
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break;
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case MLX5_IB_DBG_CC_RP_BYTE_RESET:
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*attr_mask |= MLX5_IB_RP_BYTE_RESET_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rpg_byte_reset, var);
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break;
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case MLX5_IB_DBG_CC_RP_THRESHOLD:
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*attr_mask |= MLX5_IB_RP_THRESHOLD_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rpg_threshold, var);
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break;
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case MLX5_IB_DBG_CC_RP_AI_RATE:
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*attr_mask |= MLX5_IB_RP_AI_RATE_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rpg_ai_rate, var);
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break;
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case MLX5_IB_DBG_CC_RP_HAI_RATE:
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*attr_mask |= MLX5_IB_RP_HAI_RATE_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rpg_hai_rate, var);
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break;
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case MLX5_IB_DBG_CC_RP_MIN_DEC_FAC:
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*attr_mask |= MLX5_IB_RP_MIN_DEC_FAC_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rpg_min_dec_fac, var);
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break;
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case MLX5_IB_DBG_CC_RP_MIN_RATE:
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*attr_mask |= MLX5_IB_RP_MIN_RATE_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rpg_min_rate, var);
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break;
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case MLX5_IB_DBG_CC_RP_RATE_TO_SET_ON_FIRST_CNP:
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*attr_mask |= MLX5_IB_RP_RATE_TO_SET_ON_FIRST_CNP_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rate_to_set_on_first_cnp, var);
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break;
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case MLX5_IB_DBG_CC_RP_DCE_TCP_G:
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*attr_mask |= MLX5_IB_RP_DCE_TCP_G_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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dce_tcp_g, var);
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break;
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case MLX5_IB_DBG_CC_RP_DCE_TCP_RTT:
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*attr_mask |= MLX5_IB_RP_DCE_TCP_RTT_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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dce_tcp_rtt, var);
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break;
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case MLX5_IB_DBG_CC_RP_RATE_REDUCE_MONITOR_PERIOD:
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*attr_mask |= MLX5_IB_RP_RATE_REDUCE_MONITOR_PERIOD_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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rate_reduce_monitor_period, var);
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break;
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case MLX5_IB_DBG_CC_RP_INITIAL_ALPHA_VALUE:
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*attr_mask |= MLX5_IB_RP_INITIAL_ALPHA_VALUE_ATTR;
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MLX5_SET(cong_control_r_roce_ecn_rp, field,
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initial_alpha_value, var);
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break;
|
||||||
|
case MLX5_IB_DBG_CC_RP_GD:
|
||||||
|
*attr_mask |= MLX5_IB_RP_GD_ATTR;
|
||||||
|
MLX5_SET(cong_control_r_roce_ecn_rp, field,
|
||||||
|
rpg_gd, var);
|
||||||
|
break;
|
||||||
|
case MLX5_IB_DBG_CC_NP_CNP_DSCP:
|
||||||
|
*attr_mask |= MLX5_IB_NP_CNP_DSCP_ATTR;
|
||||||
|
MLX5_SET(cong_control_r_roce_ecn_np, field, cnp_dscp, var);
|
||||||
|
break;
|
||||||
|
case MLX5_IB_DBG_CC_NP_CNP_PRIO_MODE:
|
||||||
|
*attr_mask |= MLX5_IB_NP_CNP_PRIO_MODE_ATTR;
|
||||||
|
MLX5_SET(cong_control_r_roce_ecn_np, field, cnp_prio_mode, var);
|
||||||
|
break;
|
||||||
|
case MLX5_IB_DBG_CC_NP_CNP_PRIO:
|
||||||
|
*attr_mask |= MLX5_IB_NP_CNP_PRIO_MODE_ATTR;
|
||||||
|
MLX5_SET(cong_control_r_roce_ecn_np, field, cnp_prio_mode, 0);
|
||||||
|
MLX5_SET(cong_control_r_roce_ecn_np, field, cnp_802p_prio, var);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static int mlx5_ib_get_cc_params(struct mlx5_ib_dev *dev, int offset, u32 *var)
|
||||||
|
{
|
||||||
|
int outlen = MLX5_ST_SZ_BYTES(query_cong_params_out);
|
||||||
|
void *out;
|
||||||
|
void *field;
|
||||||
|
int err;
|
||||||
|
enum mlx5_ib_cong_node_type node;
|
||||||
|
|
||||||
|
out = kvzalloc(outlen, GFP_KERNEL);
|
||||||
|
if (!out)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
node = mlx5_ib_param_to_node(offset);
|
||||||
|
|
||||||
|
err = mlx5_cmd_query_cong_params(dev->mdev, node, out, outlen);
|
||||||
|
if (err)
|
||||||
|
goto free;
|
||||||
|
|
||||||
|
field = MLX5_ADDR_OF(query_cong_params_out, out, congestion_parameters);
|
||||||
|
*var = mlx5_get_cc_param_val(field, offset);
|
||||||
|
|
||||||
|
free:
|
||||||
|
kvfree(out);
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int mlx5_ib_set_cc_params(struct mlx5_ib_dev *dev, int offset, u32 var)
|
||||||
|
{
|
||||||
|
int inlen = MLX5_ST_SZ_BYTES(modify_cong_params_in);
|
||||||
|
void *in;
|
||||||
|
void *field;
|
||||||
|
enum mlx5_ib_cong_node_type node;
|
||||||
|
u32 attr_mask = 0;
|
||||||
|
int err;
|
||||||
|
|
||||||
|
in = kvzalloc(inlen, GFP_KERNEL);
|
||||||
|
if (!in)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
MLX5_SET(modify_cong_params_in, in, opcode,
|
||||||
|
MLX5_CMD_OP_MODIFY_CONG_PARAMS);
|
||||||
|
|
||||||
|
node = mlx5_ib_param_to_node(offset);
|
||||||
|
MLX5_SET(modify_cong_params_in, in, cong_protocol, node);
|
||||||
|
|
||||||
|
field = MLX5_ADDR_OF(modify_cong_params_in, in, congestion_parameters);
|
||||||
|
mlx5_ib_set_cc_param_mask_val(field, offset, var, &attr_mask);
|
||||||
|
|
||||||
|
field = MLX5_ADDR_OF(modify_cong_params_in, in, field_select);
|
||||||
|
MLX5_SET(field_select_r_roce_rp, field, field_select_r_roce_rp,
|
||||||
|
attr_mask);
|
||||||
|
|
||||||
|
err = mlx5_cmd_modify_cong_params(dev->mdev, in, inlen);
|
||||||
|
kvfree(in);
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
static ssize_t set_param(struct file *filp, const char __user *buf,
|
||||||
|
size_t count, loff_t *pos)
|
||||||
|
{
|
||||||
|
struct mlx5_ib_dbg_param *param = filp->private_data;
|
||||||
|
int offset = param->offset;
|
||||||
|
char lbuf[11] = { };
|
||||||
|
u32 var;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
if (count > sizeof(lbuf))
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
if (copy_from_user(lbuf, buf, count))
|
||||||
|
return -EFAULT;
|
||||||
|
|
||||||
|
lbuf[sizeof(lbuf) - 1] = '\0';
|
||||||
|
|
||||||
|
if (kstrtou32(lbuf, 0, &var))
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
ret = mlx5_ib_set_cc_params(param->dev, offset, var);
|
||||||
|
return ret ? ret : count;
|
||||||
|
}
|
||||||
|
|
||||||
|
static ssize_t get_param(struct file *filp, char __user *buf, size_t count,
|
||||||
|
loff_t *pos)
|
||||||
|
{
|
||||||
|
struct mlx5_ib_dbg_param *param = filp->private_data;
|
||||||
|
int offset = param->offset;
|
||||||
|
u32 var = 0;
|
||||||
|
int ret;
|
||||||
|
char lbuf[11];
|
||||||
|
|
||||||
|
if (*pos)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
ret = mlx5_ib_get_cc_params(param->dev, offset, &var);
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = snprintf(lbuf, sizeof(lbuf), "%d\n", var);
|
||||||
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
if (copy_to_user(buf, lbuf, ret))
|
||||||
|
return -EFAULT;
|
||||||
|
|
||||||
|
*pos += ret;
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct file_operations dbg_cc_fops = {
|
||||||
|
.owner = THIS_MODULE,
|
||||||
|
.open = simple_open,
|
||||||
|
.write = set_param,
|
||||||
|
.read = get_param,
|
||||||
|
};
|
||||||
|
|
||||||
|
void mlx5_ib_cleanup_cong_debugfs(struct mlx5_ib_dev *dev)
|
||||||
|
{
|
||||||
|
if (!mlx5_debugfs_root ||
|
||||||
|
!dev->dbg_cc_params ||
|
||||||
|
!dev->dbg_cc_params->root)
|
||||||
|
return;
|
||||||
|
|
||||||
|
debugfs_remove_recursive(dev->dbg_cc_params->root);
|
||||||
|
kfree(dev->dbg_cc_params);
|
||||||
|
dev->dbg_cc_params = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
int mlx5_ib_init_cong_debugfs(struct mlx5_ib_dev *dev)
|
||||||
|
{
|
||||||
|
struct mlx5_ib_dbg_cc_params *dbg_cc_params;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
if (!mlx5_debugfs_root)
|
||||||
|
goto out;
|
||||||
|
|
||||||
|
if (!MLX5_CAP_GEN(dev->mdev, cc_query_allowed) ||
|
||||||
|
!MLX5_CAP_GEN(dev->mdev, cc_modify_allowed))
|
||||||
|
goto out;
|
||||||
|
|
||||||
|
dbg_cc_params = kzalloc(sizeof(*dbg_cc_params), GFP_KERNEL);
|
||||||
|
if (!dbg_cc_params)
|
||||||
|
goto out;
|
||||||
|
|
||||||
|
dev->dbg_cc_params = dbg_cc_params;
|
||||||
|
|
||||||
|
dbg_cc_params->root = debugfs_create_dir("cc_params",
|
||||||
|
dev->mdev->priv.dbg_root);
|
||||||
|
if (!dbg_cc_params->root)
|
||||||
|
goto err;
|
||||||
|
|
||||||
|
for (i = 0; i < MLX5_IB_DBG_CC_MAX; i++) {
|
||||||
|
dbg_cc_params->params[i].offset = i;
|
||||||
|
dbg_cc_params->params[i].dev = dev;
|
||||||
|
dbg_cc_params->params[i].dentry =
|
||||||
|
debugfs_create_file(mlx5_ib_dbg_cc_name[i],
|
||||||
|
0600, dbg_cc_params->root,
|
||||||
|
&dbg_cc_params->params[i],
|
||||||
|
&dbg_cc_fops);
|
||||||
|
if (!dbg_cc_params->params[i].dentry)
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
out: return 0;
|
||||||
|
|
||||||
|
err:
|
||||||
|
mlx5_ib_warn(dev, "cong debugfs failure\n");
|
||||||
|
mlx5_ib_cleanup_cong_debugfs(dev);
|
||||||
|
/*
|
||||||
|
* We don't want to fail driver if debugfs failed to initialize,
|
||||||
|
* so we are not forwarding error to the user.
|
||||||
|
*/
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
@ -3838,9 +3838,13 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
|
||||||
goto err_odp;
|
goto err_odp;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
err = mlx5_ib_init_cong_debugfs(dev);
|
||||||
|
if (err)
|
||||||
|
goto err_cnt;
|
||||||
|
|
||||||
dev->mdev->priv.uar = mlx5_get_uars_page(dev->mdev);
|
dev->mdev->priv.uar = mlx5_get_uars_page(dev->mdev);
|
||||||
if (!dev->mdev->priv.uar)
|
if (!dev->mdev->priv.uar)
|
||||||
goto err_cnt;
|
goto err_cong;
|
||||||
|
|
||||||
err = mlx5_alloc_bfreg(dev->mdev, &dev->bfreg, false, false);
|
err = mlx5_alloc_bfreg(dev->mdev, &dev->bfreg, false, false);
|
||||||
if (err)
|
if (err)
|
||||||
|
|
@ -3889,6 +3893,8 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
|
||||||
mlx5_put_uars_page(dev->mdev, dev->mdev->priv.uar);
|
mlx5_put_uars_page(dev->mdev, dev->mdev->priv.uar);
|
||||||
|
|
||||||
err_cnt:
|
err_cnt:
|
||||||
|
mlx5_ib_cleanup_cong_debugfs(dev);
|
||||||
|
err_cong:
|
||||||
if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
|
if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
|
||||||
mlx5_ib_dealloc_counters(dev);
|
mlx5_ib_dealloc_counters(dev);
|
||||||
|
|
||||||
|
|
@ -3923,6 +3929,7 @@ static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context)
|
||||||
mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
|
mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
|
||||||
mlx5_free_bfreg(dev->mdev, &dev->bfreg);
|
mlx5_free_bfreg(dev->mdev, &dev->bfreg);
|
||||||
mlx5_put_uars_page(dev->mdev, mdev->priv.uar);
|
mlx5_put_uars_page(dev->mdev, mdev->priv.uar);
|
||||||
|
mlx5_ib_cleanup_cong_debugfs(dev);
|
||||||
if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
|
if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
|
||||||
mlx5_ib_dealloc_counters(dev);
|
mlx5_ib_dealloc_counters(dev);
|
||||||
destroy_umrc_res(dev);
|
destroy_umrc_res(dev);
|
||||||
|
|
|
||||||
|
|
@ -619,6 +619,39 @@ struct mlx5_roce {
|
||||||
enum ib_port_state last_port_state;
|
enum ib_port_state last_port_state;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct mlx5_ib_dbg_param {
|
||||||
|
int offset;
|
||||||
|
struct mlx5_ib_dev *dev;
|
||||||
|
struct dentry *dentry;
|
||||||
|
};
|
||||||
|
|
||||||
|
enum mlx5_ib_dbg_cc_types {
|
||||||
|
MLX5_IB_DBG_CC_RP_CLAMP_TGT_RATE,
|
||||||
|
MLX5_IB_DBG_CC_RP_CLAMP_TGT_RATE_ATI,
|
||||||
|
MLX5_IB_DBG_CC_RP_TIME_RESET,
|
||||||
|
MLX5_IB_DBG_CC_RP_BYTE_RESET,
|
||||||
|
MLX5_IB_DBG_CC_RP_THRESHOLD,
|
||||||
|
MLX5_IB_DBG_CC_RP_AI_RATE,
|
||||||
|
MLX5_IB_DBG_CC_RP_HAI_RATE,
|
||||||
|
MLX5_IB_DBG_CC_RP_MIN_DEC_FAC,
|
||||||
|
MLX5_IB_DBG_CC_RP_MIN_RATE,
|
||||||
|
MLX5_IB_DBG_CC_RP_RATE_TO_SET_ON_FIRST_CNP,
|
||||||
|
MLX5_IB_DBG_CC_RP_DCE_TCP_G,
|
||||||
|
MLX5_IB_DBG_CC_RP_DCE_TCP_RTT,
|
||||||
|
MLX5_IB_DBG_CC_RP_RATE_REDUCE_MONITOR_PERIOD,
|
||||||
|
MLX5_IB_DBG_CC_RP_INITIAL_ALPHA_VALUE,
|
||||||
|
MLX5_IB_DBG_CC_RP_GD,
|
||||||
|
MLX5_IB_DBG_CC_NP_CNP_DSCP,
|
||||||
|
MLX5_IB_DBG_CC_NP_CNP_PRIO_MODE,
|
||||||
|
MLX5_IB_DBG_CC_NP_CNP_PRIO,
|
||||||
|
MLX5_IB_DBG_CC_MAX,
|
||||||
|
};
|
||||||
|
|
||||||
|
struct mlx5_ib_dbg_cc_params {
|
||||||
|
struct dentry *root;
|
||||||
|
struct mlx5_ib_dbg_param params[MLX5_IB_DBG_CC_MAX];
|
||||||
|
};
|
||||||
|
|
||||||
struct mlx5_ib_dev {
|
struct mlx5_ib_dev {
|
||||||
struct ib_device ib_dev;
|
struct ib_device ib_dev;
|
||||||
struct mlx5_core_dev *mdev;
|
struct mlx5_core_dev *mdev;
|
||||||
|
|
@ -655,6 +688,7 @@ struct mlx5_ib_dev {
|
||||||
struct mlx5_ib_port *port;
|
struct mlx5_ib_port *port;
|
||||||
struct mlx5_sq_bfreg bfreg;
|
struct mlx5_sq_bfreg bfreg;
|
||||||
struct mlx5_sq_bfreg fp_bfreg;
|
struct mlx5_sq_bfreg fp_bfreg;
|
||||||
|
struct mlx5_ib_dbg_cc_params *dbg_cc_params;
|
||||||
|
|
||||||
/* protect the user_td */
|
/* protect the user_td */
|
||||||
struct mutex lb_mutex;
|
struct mutex lb_mutex;
|
||||||
|
|
@ -909,6 +943,9 @@ __be16 mlx5_get_roce_udp_sport(struct mlx5_ib_dev *dev, u8 port_num,
|
||||||
int mlx5_get_roce_gid_type(struct mlx5_ib_dev *dev, u8 port_num,
|
int mlx5_get_roce_gid_type(struct mlx5_ib_dev *dev, u8 port_num,
|
||||||
int index, enum ib_gid_type *gid_type);
|
int index, enum ib_gid_type *gid_type);
|
||||||
|
|
||||||
|
void mlx5_ib_cleanup_cong_debugfs(struct mlx5_ib_dev *dev);
|
||||||
|
int mlx5_ib_init_cong_debugfs(struct mlx5_ib_dev *dev);
|
||||||
|
|
||||||
/* GSI QP helper functions */
|
/* GSI QP helper functions */
|
||||||
struct ib_qp *mlx5_ib_gsi_create_qp(struct ib_pd *pd,
|
struct ib_qp *mlx5_ib_gsi_create_qp(struct ib_pd *pd,
|
||||||
struct ib_qp_init_attr *init_attr);
|
struct ib_qp_init_attr *init_attr);
|
||||||
|
|
|
||||||
|
|
@ -1188,7 +1188,8 @@ struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
|
||||||
|
|
||||||
u8 reserved_at_c0[0x12];
|
u8 reserved_at_c0[0x12];
|
||||||
u8 cnp_dscp[0x6];
|
u8 cnp_dscp[0x6];
|
||||||
u8 reserved_at_d8[0x5];
|
u8 reserved_at_d8[0x4];
|
||||||
|
u8 cnp_prio_mode[0x1];
|
||||||
u8 cnp_802p_prio[0x3];
|
u8 cnp_802p_prio[0x3];
|
||||||
|
|
||||||
u8 reserved_at_e0[0x720];
|
u8 reserved_at_e0[0x720];
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue