mirror of https://gitee.com/openkylin/linux.git
staging: iio: adc: ad7192: Remove platform data
This patch removes the reference voltage entry from the platform_data structure. This is no longer needed since the reference voltage is obtained from the device tree. With this we also remove the entire ad7192.h file. The undefined reference voltage warning is promoted to an error signaling a problem with the device tree. Signed-off-by: Mircea Caprioru <mircea.caprioru@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -25,8 +25,6 @@
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/adc/ad_sigma_delta.h>
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#include "ad7192.h"
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/* Registers */
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#define AD7192_REG_COMM 0 /* Communications Register (WO, 8-bit) */
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#define AD7192_REG_STAT 0 /* Status Register (RO, 8-bit) */
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@ -666,16 +664,10 @@ static int ad7192_channels_config(struct iio_dev *indio_dev)
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static int ad7192_probe(struct spi_device *spi)
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{
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const struct ad7192_platform_data *pdata = dev_get_platdata(&spi->dev);
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struct ad7192_state *st;
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struct iio_dev *indio_dev;
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int ret, voltage_uv = 0;
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if (!pdata) {
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dev_err(&spi->dev, "no platform data?\n");
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return -ENODEV;
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}
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if (!spi->irq) {
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dev_err(&spi->dev, "no IRQ?\n");
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return -ENODEV;
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@ -713,12 +705,10 @@ static int ad7192_probe(struct spi_device *spi)
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voltage_uv = regulator_get_voltage(st->avdd);
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if (pdata->vref_mv)
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st->int_vref_mv = pdata->vref_mv;
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else if (voltage_uv)
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if (voltage_uv)
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st->int_vref_mv = voltage_uv / 1000;
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else
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dev_warn(&spi->dev, "reference voltage undefined\n");
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dev_err(&spi->dev, "Device tree error, reference voltage undefined\n");
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spi_set_drvdata(spi, indio_dev);
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st->devid = spi_get_device_id(spi)->driver_data;
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@ -1,37 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AD7190 AD7192 AD7195 SPI ADC driver
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*
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* Copyright 2011 Analog Devices Inc.
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*/
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#ifndef IIO_ADC_AD7192_H_
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#define IIO_ADC_AD7192_H_
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/*
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* TODO: struct ad7192_platform_data needs to go into include/linux/iio
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*/
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/**
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* struct ad7192_platform_data - platform/board specific information
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* @vref_mv: the external reference voltage in millivolt
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* @clock_source_sel: [0..3]
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* 0 External 4.92 MHz clock connected from MCLK1 to MCLK2
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* 1 External Clock applied to MCLK2
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* 2 Internal 4.92 MHz Clock not available at the MCLK2 pin
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* 3 Internal 4.92 MHz Clock available at the MCLK2 pin
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* @ext_clk_Hz: the external clock frequency in Hz, if not set
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* the driver uses the internal clock (16.776 MHz)
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* @refin2_en: REFIN1/REFIN2 Reference Select (AD7190/2 only)
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* @rej60_en: 50/60Hz notch filter enable
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* @sinc3_en: SINC3 filter enable (default SINC4)
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* @chop_en: CHOP mode enable
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* @buf_en: buffered input mode enable
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* @unipolar_en: unipolar mode enable
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* @burnout_curr_en: constant current generators on AIN(+|-) enable
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*/
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struct ad7192_platform_data {
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u16 vref_mv;
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};
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#endif /* IIO_ADC_AD7192_H_ */
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