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arm64: docs: Fix typos in ELF hwcaps 

Fix some typos in our hwcap documentation, where we refer to the wrong
ID register for some of the capabilities.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
[will: fix amusing binary constants]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Giacomo Travaglini 2018-10-01 15:24:47 +01:00 committed by Catalin Marinas
parent 2ba0dacbae
commit 4bfbe5eee3
1 changed files with 4 additions and 4 deletions
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8
Documentation/arm64/elf_hwcaps.txt
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@ -78,11 +78,11 @@ HWCAP_EVTSTRM
HWCAP_AES HWCAP_AES
Functionality implied by ID_AA64ISAR1_EL1.AES == 0b0001. Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.
HWCAP_PMULL HWCAP_PMULL
Functionality implied by ID_AA64ISAR1_EL1.AES == 0b0010. Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010.
HWCAP_SHA1 HWCAP_SHA1
@ -153,7 +153,7 @@ HWCAP_ASIMDDP
HWCAP_SHA512 HWCAP_SHA512
Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0002. Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010.
HWCAP_SVE HWCAP_SVE
@ -173,7 +173,7 @@ HWCAP_USCAT
HWCAP_ILRCPC HWCAP_ILRCPC
Functionality implied by ID_AA64ISR1_EL1.LRCPC == 0b0002. Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010.
HWCAP_FLAGM HWCAP_FLAGM