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arm64: dts: allwinner: h6: Add support for RTC and fix the clock tree 

This patch adds RTC node and fixes the clock properties and nodes
to reflect the real clock tree.

The device nodes for the internal oscillator and osc32k are removed,
as these clocks are now provided by the RTC device. Clock references
are fixed accordingly, too.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Ondrej Jirman 2019-08-20 17:19:34 +02:00 committed by Maxime Ripard
parent d2b9c64443
commit 4cdc12a3ef
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
1 changed files with 16 additions and 14 deletions
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30
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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@ -56,14 +56,6 @@ de: display-engine {
status = "disabled";
};
iosc: internal-osc-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <16000000>;
clock-accuracy = <300000000>;
clock-output-names = "iosc";
};
osc24M: osc24M_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@ -71,11 +63,11 @@ osc24M: osc24M_clk {
clock-output-names = "osc24M";
};
osc32k: osc32k_clk {
ext_osc32k: ext_osc32k_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
clock-output-names = "ext_osc32k";
};
psci {
@ -197,7 +189,7 @@ ve_sram: sram-section@0 {
ccu: clock@3001000 {
compatible = "allwinner,sun50i-h6-ccu";
reg = <0x03001000 0x1000>;
clocks = <&osc24M>, <&osc32k>, <&iosc>;
clocks = <&osc24M>, <&rtc 0>, <&rtc 2>;
clock-names = "hosc", "losc", "iosc";
#clock-cells = <1>;
#reset-cells = <1>;
@ -236,7 +228,7 @@ pio: pinctrl@300b000 {
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>;
clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@ -710,10 +702,20 @@ tcon_tv_out_tcon_top: endpoint@1 {
};
};
rtc: rtc@7000000 {
compatible = "allwinner,sun50i-h6-rtc";
reg = <0x07000000 0x400>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clock-output-names = "osc32k", "osc32k-out", "iosc";
clocks = <&ext_osc32k>;
#clock-cells = <1>;
};
r_ccu: clock@7010000 {
compatible = "allwinner,sun50i-h6-r-ccu";
reg = <0x07010000 0x400>;
clocks = <&osc24M>, <&osc32k>, <&iosc>,
clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
<&ccu CLK_PLL_PERIPH0>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
@ -741,7 +743,7 @@ r_pio: pinctrl@7022000 {
reg = <0x07022000 0x400>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&osc32k>;
clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;